CN114005849A - Preparation method of micro light-emitting diode - Google Patents
Preparation method of micro light-emitting diode Download PDFInfo
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- CN114005849A CN114005849A CN202111265113.0A CN202111265113A CN114005849A CN 114005849 A CN114005849 A CN 114005849A CN 202111265113 A CN202111265113 A CN 202111265113A CN 114005849 A CN114005849 A CN 114005849A
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- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
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Abstract
The invention provides a preparation method of a micro light-emitting diode, which is characterized in that a chemical etching process, a passivation process and a physical bombardment process are sequentially and circularly utilized to operate an epitaxial layer and a substrate until the splitting is completed, so that a single micro light-emitting diode is formed, the splitting mode can reduce the line width of a formed scribing groove, and the number of micro light-emitting diodes which can be produced by a unit is increased; the intensity of the micro light-emitting diode can be enhanced without mechanical damage caused by cutting and scratching, so that the yield of the micro light-emitting diode is improved; and the splinters and the side wall patterns of the micro light-emitting diodes are formed together, so that the processing steps are simplified, the cost is reduced, meanwhile, the micro light-emitting diodes with polygonal shapes which are difficult to obtain by cutting and scratching can be manufactured, and the manufacturability is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a preparation method of a micro light-emitting diode.
Background
The III-V semiconductor LED (Light-emitting diode) industry is one of the most attractive industries in recent years, and LED has been developed to date, and has the advantages of energy saving, high efficiency, fast response time, long life, no mercury, environmental protection, and the like, and thus is considered to be one of the best Light sources for green energy-saving illumination of new generations.
In order to improve the light emitting intensity of the LED chip, the photoelectric conversion efficiency of the LED chip needs to be improved, and the photoelectric conversion efficiency of the LED chip includes two parts: internal quantum efficiency and external quantum efficiency. Wherein, the internal quantum efficiency refers to the efficiency of generating photons by the recombination of electron-hole pairs in the LED junction region; external quantum efficiency refers to the overall efficiency of extracting photons generated by the LED junction region out of the LED chip. With the perfection of epitaxial growth technology and the development of multiple quantum well structure, the internal quantum efficiency of high-brightness LED chips is close to 100%, but the external quantum efficiency is only 3-30%, which is mainly caused by the escape of light, and therefore, the light extraction efficiency of LED chips has become the main technical bottleneck of high-brightness LED chips. Factors that cause light to escape are: absorption of light by lattice defects, absorption of light by the substrate, loss of light due to total reflection at each interface during the exit process, and the like. For example, since the reflection coefficients of GaN and air are 2.5 and 1, respectively, according to snell's law, only light having an incident angle smaller than the critical angle (about 23 °) can be emitted into air, while light having an incident angle equal to or larger than the critical angle can be reflected back and forth inside GaN until being self-absorbed.
The existing technical approaches for improving the light extraction efficiency of an LED chip mainly include a chip plasticity technique, a Distributed Bragg Reflector (DBR) technique, a flip-chip technique, a surface roughening technique, a photonic crystal technique, and the like. These techniques improve the light emission luminance of the LED chip to various degrees, but they all focus on improving the light extraction efficiency of the front surface of the LED chip. However, the light emitting property of the LED chip is spontaneous emission, has no directivity, and can be approximately regarded as isotropic light emission. Therefore, the above techniques do not improve the light extraction efficiency of the side light emission of the LED chip. At present, the LED chip can be prepared into polygons such as a hexagon or a parallelogram, the total reflection of light rays on one side surface of the LED chip can be emitted from the other side surface by changing the inner angle of the polygon, so that the purpose of improving the light extraction efficiency is achieved, but the polygonal LED chip has certain difficulty in the aspect of chip cutting and is not beneficial to large-scale mass production. With the miniaturization development of the LED chip (Mini/Micro LED), the size of the LED chip becomes smaller and smaller, the main light emitting surface of the LED chip is changed from the upper surface to the lower surface to the side surface, the polygonal LED chip is more and more difficult to manufacture by cutting and scribing, the proportion of subsurface damage caused by scribing is increased, and the photoelectric performance of the LED chip is greatly weakened. In addition, in the LED market, the methods of general laser cutting, laser stealth cutting, diamond-knife wheel cutting, etc. are most commonly used for cutting LED chips, and all of these cutting methods require a scribing groove line width of 20 μm to 100 μm, and some older equipment need to cut the scribing groove to 150 μm, however, the wider the scribing groove, the smaller the number of LED chips that can be produced by a unit, and therefore how to reduce the scribing groove is one of the important issues of the LED epitaxial factories.
Disclosure of Invention
The invention aims to provide a preparation method of a micro light-emitting diode, which aims to improve the light-emitting efficiency of the micro light-emitting diode and reduce the width of a scribing groove.
In order to achieve the above object, the present invention provides a method for manufacturing a micro light emitting diode, comprising:
providing a substrate, wherein an epitaxial layer is formed on the substrate; and the number of the first and second groups,
and sequentially and circularly utilizing a chemical etching process, a passivation process and a physical bombardment process to operate the epitaxial layer and the substrate until the splitting is completed, so as to form a single micro light-emitting diode.
Optionally, electrode sets corresponding to the micro light emitting diodes one to one are formed on the epitaxial layer, where the electrode sets include at least one electrode, and before etching the epitaxial layer and the substrate, the method further includes:
forming side walls corresponding to each electrode group, wherein the side walls at least cover the side walls of the electrodes, and gaps are formed between the side walls corresponding to the adjacent electrode groups to expose part of the epitaxial layer;
etching the epitaxial layer and the substrate by taking the side wall as a mask to finish splitting; and the number of the first and second groups,
and removing the side wall.
Optionally, the electrode group includes two electrodes, and the sidewall covers sidewalls of the two electrodes and fills a region between the two electrodes.
Optionally, the width dimension between two of the electrodes in the same electrode group is smaller than the width dimension between the electrodes in different electrode groups.
Optionally, the electrode group includes a second electrode, a metal layer is disposed on a surface of the substrate facing away from the epitaxial layer, and the sidewall covers a sidewall of the second electrode; and the number of the first and second groups,
and after the epitaxial layer and the substrate are etched by taking the side walls as masks, splitting the metal layer to enable the metal layer to be split into a plurality of first electrodes which correspond to the second electrodes one to one, and finishing splitting.
Optionally, the step of forming the side wall corresponding to each electrode group includes:
conformally forming a mask layer on the epitaxial layer and the electrode set; and the number of the first and second groups,
and etching the mask layer by adopting an ICP (inductively coupled plasma) etching process to form the side wall.
Optionally, the mask layer is made of silicon oxide and/or silicon nitride, and the process gas of the ICP etching process is CF4And CHF4At least one of (1).
Optionally, the thickness of the mask layer is
Optionally, after the splitting is completed and before the removing of the side wall, the method further includes:
and coarsening the side wall of the LED chip.
Optionally, the step of operating the epitaxial layer and the substrate by sequentially and cyclically utilizing a chemical etching process, a passivation process and a physical bombardment process includes:
etching the substrate by using the chemical etching process to form a groove;
converting the process gas, and forming a passivation layer on the inner wall of the groove by using the passivation process;
converting the process gas again, and removing the part of the passivation layer on the bottom wall of the groove by using the physical bombardment process;
and circulating the steps, and forming one groove once every circulation until all the grooves penetrate the substrate and the epitaxial layer to form a scribing groove, so that the splitting is finished.
Optionally, the width of the scribe line gradually decreases along a direction from the epitaxial layer to the substrate.
Optionally, the maximum lateral width dimension of the scribe line is 2 μm to 6 μm, and the minimum lateral width dimension of the scribe line is 1 μm to 5 μm.
Optionally, the process gas of the chemical etching process is Cl2、BCl3、SiCl4、I2、Br2、SF6、CH4、CF4And CHF4At least one of (1).
Optionally, the process gas of the passivation process is C4F8、CH4And C2H2At least one of them.
Optionally, the process gas of the physical bombardment process is Ar and/or O2。
Optionally, the conversion time of the chemical etching process, the passivation process and the physical bombardment process is 5 s-10 s.
Optionally, the conversion time of the chemical etching process, the passivation process and the physical bombardment process is the same or different.
Optionally, after the splitting is completed, the passivation layer on the sidewall of each groove is removed.
Optionally, the side wall of the micro light emitting diode has a plurality of concave parts, the concave parts are continuously arranged along the thickness direction of the micro light emitting diode, wherein the side wall of the micro light emitting diode includes the side wall of the substrate and the side wall of the epitaxial layer.
Optionally, the inner walls of the recesses may be of the same or different shapes.
Optionally, the inner wall of the concave part is a cambered surface, a circular arc surface, a sawtooth surface, a wavy surface, a prism/conical surface, a cylinder/conical surface or an irregular surface.
Optionally, the width of the concave part in the thickness direction of the micro light emitting diode is the same or different.
Optionally, the recessed depth of the recessed portions is the same or different.
Optionally, a distance between the side wall of the micro light emitting diode and the center of the micro light emitting diode gradually increases along a direction from the epitaxial layer to the substrate.
Optionally, the area of the side wall of the micro light emitting diode is larger than that of the top wall or the bottom wall thereof.
In the preparation method of the micro light-emitting diode provided by the invention, the epitaxial layer and the substrate are operated by sequentially and circularly utilizing a chemical etching process, a passivation process and a physical bombardment process until the splitting is finished to form a single micro light-emitting diode, and the splitting mode can reduce the line width of a formed scribing groove and improve the number of micro light-emitting diodes which can be produced by a unit; the intensity of the micro light-emitting diode can be enhanced without mechanical damage caused by cutting and scratching, so that the yield of the micro light-emitting diode is improved; and the splinters and the side wall patterns of the micro light-emitting diodes are formed together, so that the processing steps are simplified, the cost is reduced, meanwhile, the micro light-emitting diodes with polygonal shapes which are difficult to obtain by cutting and scratching can be manufactured, and the manufacturability is improved.
In addition, the side wall of the micro light-emitting diode formed after the splitting is provided with a plurality of concave parts, the concave parts are continuously arranged along the thickness direction of the micro light-emitting diode, and the concave parts increase the roughness of the side wall of the micro light-emitting diode, so that the light-emitting efficiency of the micro light-emitting diode can be improved.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a micro light emitting diode according to an embodiment of the present invention;
fig. 2 to fig. 8 are schematic structural diagrams corresponding to respective steps of a method for manufacturing a micro light emitting diode according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a process for sequentially and cyclically performing a chemical etching process, a passivation process, and a physical bombardment process according to an embodiment of the present invention;
fig. 10 to fig. 15 are schematic structural diagrams corresponding to respective steps of a method for manufacturing a micro light emitting diode according to a second embodiment of the present invention;
fig. 16 is a schematic structural diagram of a micro light emitting diode according to a third embodiment of the present invention;
wherein the reference numerals are:
100-a substrate; 200-an epitaxial layer; 200 a-scribing grooves; 201-a first semiconductor layer; 202-a light emitting layer; 203-a second semiconductor layer; 300-a metal layer; 301-a first electrode; 302-a second electrode; 400-a mask layer; 401-side walls; 500-a passivation layer; 600-an insulating layer;
h1 — width dimension of the depression in the thickness direction of the micro light emitting diode; h 2-recess depth of the recess.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Example one
Fig. 8 is a schematic structural diagram of a micro light emitting diode provided in this embodiment. The Micro light emitting diode can be a Mini LED or a Micro LED. As shown in fig. 8, the micro light emitting diode includes a substrate 100 and an epitaxial layer 200 on the substrate 100, and the sidewall of the micro light emitting diode has a plurality of recesses, and the recesses are continuously arranged along the thickness direction of the micro light emitting diode. The concave part increases the roughness of the side wall of the micro light-emitting diode, so that the light-emitting efficiency of the micro light-emitting diode can be improved.
In this embodiment, the sidewalls of the micro light emitting diode include the sidewalls of the substrate 100 and the sidewalls of the epitaxial layer 200.
Referring to fig. 8, in the present embodiment, the micro light emitting diode is a GaN-based micro light emitting diode with a vertical structure, and includes two electrodes, which are a first electrode 301 and a second electrode 302.
Specifically, the epitaxial layer 200 is located on the substrate 100, and includes a first semiconductor layer 201, a light emitting layer 202, and a second semiconductor layer 203, which are sequentially located on the substrate 100. In this embodiment, the first semiconductor layer 201 in the epitaxial layer 200 is an N-type semiconductor layer, and the first semiconductor layer 201 is made of N-GaN; the light emitting layer 202 is a multi-period quantum well layer (MQWS), and the material of the quantum well layer is any one or combination of AlN, GaN, AlGaN, InGaN and AlInGaN; the second semiconductor layer 203 is a P-type semiconductor layer, and the material of the second semiconductor layer 203 is P-GaN.
The first electrode 301 is located on one surface of the substrate 100, which is away from the epitaxial layer 200, and is electrically connected with the first semiconductor layer 201, so as to serve as an N electrode of the micro light emitting diode; the second electrode 302 is located on the epitaxial layer 200 and electrically connected to the second semiconductor layer 203, thereby serving as a P electrode of the micro light emitting diode.
Further, the side walls of the micro light emitting diodes are provided with concave portions which are continuously arranged along the thickness direction of the micro light emitting diodes, in this embodiment, the inner walls of the concave portions are the same in shape, and the inner walls of the concave portions are all arc surfaces, the width dimensions h1 of the concave portions along the thickness direction of the micro light emitting diodes are the same, the concave depth h2 of the concave portions is also the same, that is, the shape and the size of each concave portion are the same.
It will be appreciated that as an alternative embodiment, the shape of the inner walls of the recesses may also be different; the inner wall of the concave part is not limited to a cambered surface, and may be an arc surface, a sawtooth surface, a wavy surface, a prism/conical surface, a cylinder/conical surface, an irregular surface, or the like, as long as the shape can increase the roughness of the side wall of the micro light emitting diode; the width h1 of the concave part along the thickness direction of the micro light-emitting diode can also be different; the recess depth h2 of the recesses may also be different. It is to be understood that the shape and/or size of the recesses may be substantially different, and are not illustrated here.
Referring to fig. 8, in the present embodiment, the side wall of the micro light emitting diode is inclined, and the distance between the side wall of the micro light emitting diode and the center of the micro light emitting diode gradually increases along the direction from the epitaxial layer 200 to the substrate 100, so that the micro light emitting diode has a structure with a small top and a large bottom, but not limited thereto, the side wall of the micro light emitting diode may also be vertical, or the distance between the side wall of the micro light emitting diode and the center of the micro light emitting diode may also gradually decrease along the direction from the epitaxial layer 200 to the substrate 100, so that the micro light emitting diode has a structure with a large top and a small bottom.
Furthermore, the area of the side wall of the micro light-emitting diode is larger than that of the top wall or the bottom wall of the micro light-emitting diode, so that the micro light-emitting diode mainly emits light from the side surface, and on the basis that the roughness of the side wall of the micro light-emitting diode is increased, the light-emitting efficiency of the micro light-emitting diode can be increased.
Fig. 1 is a flowchart of a method for manufacturing a micro light emitting diode according to an embodiment of the present invention. As shown in fig. 1, the method for manufacturing a micro light emitting diode includes:
step S100: providing a substrate, wherein an epitaxial layer is formed on the substrate; and the number of the first and second groups,
step S200: and sequentially and circularly utilizing a chemical etching process, a passivation process and a physical bombardment process to operate the epitaxial layer and the substrate until the splitting is completed, so as to form a single micro light-emitting diode.
Please refer to fig. 2 to fig. 8, which are schematic structural diagrams corresponding to corresponding steps of the method for fabricating a micro light emitting diode according to the present embodiment. Next, a method for manufacturing a micro light emitting diode provided in this embodiment will be described in detail with reference to fig. 2 to 8.
In this embodiment, the method for manufacturing a micro light emitting diode is used for manufacturing a GaN-based micro light emitting diode with a vertical structure.
Referring to fig. 2, step S100 is performed to provide the substrate 100, and the epitaxial layer 200 is formed on the substrate 100. The epitaxial layer 200 includes a first semiconductor layer 201, a light emitting layer 202, and a second semiconductor layer 203 sequentially disposed on the substrate 100 from bottom to top.
With reference to fig. 2, electrode sets are formed on the epitaxial layer 200, each of the electrode sets has a second electrode 302, the second electrodes 302 are electrically connected to the second semiconductor layer 203, only two electrode sets are schematically illustrated in fig. 2, and thus the second electrodes 302 also have two. The surface of the substrate 100 facing away from the epitaxial layer 200 has a metal layer 300, the material of the metal layer 300 may be the same as that of the second electrode 302, and the metal layer 300 may be used to form a first electrode of a micro light emitting diode in a subsequent process.
Referring to fig. 3, a mask layer 400 is conformally formed on the epitaxial layer 200 and the electrode set, and after the mask layer 400 is formed, the mask layer 400 conformally covers the epitaxial layer 200 and the second electrode 302. It is understood that, since the second electrode 302 protrudes from the epitaxial layer 200, the top wall of the mask layer 400 also exhibits rugged features, in particular, the portion of the mask layer 400 above the second electrode 302 is higher than the portion above the epitaxial layer 200.
In this embodiment, the material of the mask layer 400 is silicon oxide and/or silicon nitride, and the thickness of the mask layer 400 is
But should not be limited thereto.
In this embodiment, the mask layer 400 has a single-layer structure, and as an alternative embodiment, the mask layer 400 may also have a double-layer structure or a multi-layer structure, for example, the mask layer 400 may be a composite structure film layer formed by combining silicon oxide and silicon nitride, which is not illustrated herein.
Referring to fig. 3 and 4, the mask layer 400 is etched by an ICP etching process, and since the anisotropic etching effect of the ICP etching process is good, after the etching is completed, the mask layer 400 above the second electrode 302 and above the epitaxial layer 200 is removed, and the mask layer 400 on the sidewall of the second electrode 302 is remained to form a sidewall 401. As can also be seen from fig. 4, each second electrode 302 corresponds to one of the side walls 401, and each side wall 401 covers the corresponding side wall of the second electrode 302.
Further, as shown in fig. 4, a gap is formed between the adjacent second electrodes 302, and the width of the sidewall 401 is not enough to fill the gap between the adjacent second electrodes 302, so that a gap is also formed between the adjacent sidewalls 401, thereby exposing a portion of the epitaxial layer 200 to define the width of a scribe line to be formed subsequently, and therefore, the shape and size of the second electrode 302 and the thickness of the mask layer 400 determine the shape and size of the sidewall 401, and further determine the shape and size of the micro light emitting diode obtained by final etching.
In the embodiment, the mask layer 400 is etched by adopting an ICP (inductively coupled plasma) etching process, so that a photoresist is not used, one-step photoetching is saved, the cost is saved, the steps are reduced, and the efficiency is improved; and the width of a scribing groove which needs to be formed subsequently is defined by adopting a self-alignment method, so that the precision is higher. As an alternative embodiment, the mask layer 400 may also be etched by photolithography, and the sidewall spacers 401 may not be formed.
In this embodiment, the process gas of the ICP etching process is CF4And CHF4At least one, but not limited thereto, the process gas of the ICP etching process may be selected according to the material of the mask layer 400.
Referring to fig. 5, step S200 is executed, and the epitaxial layer 200 and the substrate 100 are operated by using the sidewall 401 as a mask and sequentially and cyclically utilizing a chemical etching process, a passivation process and a physical bombardment process until the splitting is completed, so as to form a scribe line 200a penetrating through the epitaxial layer 200 and the substrate 100. A process diagram for cyclically performing the chemical etching process, the passivation process, and the physical bombardment process is shown in fig. 9. As shown in fig. 9, when the chemical etching process, the passivation process and the physical bombardment process are performed in a circulating manner, a first groove is formed by etching a part of the material by using the chemical etching process; then converting the process gas, and forming a passivation layer on the inner wall of the first groove by using the passivation process; then converting process gas, bombarding and removing the passivation layer on the bottom wall of the first groove by using the physical bombardment process, and reserving the passivation layer on the side wall of the first groove; then converting process gas, and etching downwards along the bottom wall of the first groove by using the chemical etching process to form a second groove, wherein the side wall of the first groove is protected by a passivation layer, so that the chemical etching process cannot be etched transversely; the process gas is then switched and a passivation layer … … is formed on the inner walls of the second recess using a passivation process and so on until the etch is complete.
It can be seen that, when the epitaxial layer 200 and the substrate 100 are operated by cyclically utilizing the chemical etching process, the passivation process and the physical bombardment process, etching is only performed along the thickness direction, and it can be seen from fig. 9 that, each time the chemical etching process, the passivation process and the physical bombardment process are cycled, a groove is formed, the side wall of the groove is an arc shape protruding outwards relative to the center of the groove, the side wall of the film layer corresponding to the groove is provided with a concave portion, and the passivation layer is attached to the inner wall of the concave portion.
Based on this, with reference to fig. 5, the epitaxial layer 200 and the substrate 100 are operated by using the sidewall 401 as a mask and sequentially and cyclically utilizing a chemical etching process, a passivation process and a physical bombardment process, and one groove is formed once per cycle until all the grooves penetrate the substrate 100 and the epitaxial layer 200, and all the grooves are communicated to form a scribing groove 200 a. For example, when the etching of the epitaxial layer 200 and the substrate 100 is completed by the chemical etching process, the passivation process, and the physical bombardment process for 50 cycles, 50 grooves are formed, and 50 continuous recesses are formed on the sidewall of the substrate 100 and the sidewall of the epitaxial layer 200, that is: the side wall of the subsequently formed micro light-emitting diode is provided with 50 concave parts, and the concave parts are continuously arranged along the thickness direction of the micro light-emitting diode.
It should be understood that after the scribe line 200a is formed, a passivation layer 500 is formed on the sidewalls of the scribe line 200 a.
Further, in this embodiment, the process gas of the chemical etching process is Cl2、BCl3、Si Cl4、I2、Br2、SF6、CH4、CF4And CHF4At least one of; the process gas of the passivation process is C4F8、CH4And C2H2At least one of (A) and (B), C4F8Capable of forming a carbon fluoride-based high molecular polymer as the passivation layer 500, and CH4And C2H2A highly cross-linked polymeric carbon film can be formed as the passivation layer 500, thereby preventing a process gas of the chemical etching process from reacting with GaN; the process gas of the physical bombardment process is Ar and/or O2。
Further, the conversion time of the chemical etching process, the passivation process and the physical bombardment process is 5 s-10 s, but not limited thereto. In this embodiment, in different cycle periods, the conversion time of the chemical etching process, the passivation process and the physical bombardment process is the same, so that the shapes and the sizes of the concave parts are the same; of course, the conversion time of the chemical etching process, the passivation process and the physical bombardment process may be different in different cycle periods, and thus, the shape or size of the recess may be different. Therefore, the shape and the size of the concave part can be adjusted by adjusting the conversion time of the chemical etching process, the passivation process and the physical bombardment process, and the shape of the side wall of the micro light-emitting diode is further adjusted.
Referring to fig. 6, due to the etching limitation, the sidewalls of the scribe line 200a are inclined, that is, the lateral width dimension of the scribe line 200a gradually decreases along the direction from the epitaxial layer 200 to the substrate 100, in this embodiment, the maximum lateral width dimension of the scribe line 200a is 2 μm to 6 μm, the minimum lateral width dimension of the scribe line 200a is 1 μm to 5 μm, and the difference between the maximum lateral width dimension and the minimum lateral width dimension of the scribe line 200a is 0 μm to 1 μm, but not limited thereto.
Referring to fig. 5 and 6, the metal layer 300 is cleaved, so that the metal layer 300 is cleaved from the scribing groove 200a, thereby completing the cleaving and forming the individual micro light emitting diode. Meanwhile, the metal layer 300 is cracked to form first electrodes 301 corresponding to the second electrodes 302 one to one, and the first electrodes 301 and the second electrodes 302 are respectively used as N electrodes and P electrodes of the micro light emitting diode.
As shown in fig. 6, the sidewall of the micro led has a shape corresponding to the sidewall of the scribe line 200 a. That is, the side wall of the micro light emitting diode is provided with a plurality of concave parts, and the concave parts are continuously arranged along the thickness direction of the micro light emitting diode. Therefore, the splitting mode adopted by the embodiment increases the roughness of the side wall of the formed micro light-emitting diode, so that the light-emitting efficiency of the micro light-emitting diode can be improved, the line width of the formed scribing groove can be reduced, the number of the micro light-emitting diodes which can be produced by a unit can be increased, the intensity of the micro light-emitting diode can be enhanced due to no mechanical damage caused by cutting and scribing, and the yield of LED chips can be improved; besides, because the lobe and the side wall graph of the micro light-emitting diode are formed together, the manufacturing procedure is simplified, the cost is reduced, meanwhile, the micro light-emitting diode with the polygonal shape which is difficult to obtain by cutting and scribing can be manufactured, and the manufacturability is improved.
It is understood that, since the sidewalls of the scribe line 200a are inclined, the sidewalls of the micro light emitting diode are also inclined.
Referring to fig. 6 and 7, the passivation layer 500 on the sidewalls of the micro light emitting diode is removed by a wet etching process. The etchant of the wet etching process may be acid solution or organic solvent, and the invention is not limited.
As shown in fig. 7, after the splitting is completed, the inner wall of the concave portion of the side wall of the micro light emitting diode is an arc surface, and in order to increase the roughness of the side wall of the micro light emitting diode, as shown in fig. 8, the side wall of the micro light emitting diode is roughened by a chemical etching process, so that the shape of the inner wall of the concave portion is changed; and because the different crystal faces of the GaN have different etching rates, the inner walls of part of the concave parts can be roughened into shapes of prisms, cylinders, cones and the like, so that the roughness of the side walls of the micro light-emitting diode is further increased, and the light-emitting efficiency of the micro light-emitting diode is further improved.
Continuing with fig. 8, the sidewall 401 is removed using a solvent such as BOE to form the micro light emitting diode shown in fig. 8.
Example two
Fig. 15 is a schematic structural diagram of a micro light emitting diode provided in this embodiment. As shown in fig. 15, the difference from the first embodiment is that in this embodiment, the micro light emitting diode is a GaN-based micro light emitting diode with an inverted structure, wherein both electrodes of the micro light emitting diode are located on the epitaxial layer 200.
Fig. 10 to fig. 15 are schematic structural diagrams corresponding to respective steps of the method for manufacturing a micro light emitting diode provided in this embodiment. Next, a method for manufacturing a micro light emitting diode provided in this embodiment will be described in detail with reference to fig. 10 to 15.
In this embodiment, the method for manufacturing a micro light emitting diode is used for manufacturing a GaN-based micro light emitting diode with an inverted structure.
Referring to fig. 10, step S100 is performed to provide the substrate 100, and the epitaxial layer 200 is formed on the substrate 100. The epitaxial layer 200 includes a first semiconductor layer 201, a light emitting layer 202, and a second semiconductor layer 203 sequentially disposed on the substrate 100 from bottom to top.
With reference to fig. 10, an insulating layer 600 is formed on the epitaxial layer 200, electrode groups are formed on the insulating layer 600, each of the electrode groups has two electrodes, which are a first electrode 301 and a second electrode 302, the first electrode 301 passes through the insulating layer 600 and is electrically connected to the first semiconductor layer 201, the second electrode 302 passes through the insulating layer 600 and is electrically connected to the second semiconductor layer 203, and a sidewall of the second electrode 302 is also wrapped by the insulating layer 600, so as to be insulated from the first semiconductor layer 201. The first electrode 301 and the second electrode 302 are respectively used as an N electrode and a P electrode of the micro light emitting diode. Only two electrode groups are schematically shown in fig. 10, and thus the first electrode 301 and the second electrode 302 also have two, respectively.
Referring to fig. 11, a mask layer 400 is conformally formed on the epitaxial layer 200 and the electrode group, and after the mask layer 400 is formed, the mask layer 400 conformally covers the epitaxial layer 200 and the first and second electrodes 301 and 302. It is understood that, since the first electrode 301 and the second electrode 302 are protruded from the epitaxial layer 200, the top wall of the mask layer 400 also exhibits an uneven feature, specifically, the portion of the mask layer 400 above the first electrode 301 and the second electrode 302 is higher than the portion above the epitaxial layer 200. Also, since the distance between two electrodes of the same electrode group is generally small and the distance between electrodes of different electrode groups is generally large, resulting in a difference in deposition rate, the portion of the mask layer 400 located between two electrodes of the same electrode group is higher than the portion located between electrodes of different electrode groups.
Referring to fig. 11 and 12, an ICP etching process is used to etch the mask layer 400, and since the anisotropic etching effect of the ICP etching process is good, after the etching is completed, the mask layer 400 above the first electrode 301 and the second electrode 302 and above the epitaxial layer 200 is removed, and the mask layer 400 on the sidewalls of the first electrode 301 and the second electrode 302 is remained to form a sidewall 401; moreover, the masking layer 400 between two electrodes of the same electrode group is thicker, the masking layer 400 between electrodes of different electrode groups is thinner, and when the epitaxial layer 200 between electrodes of different electrode groups is exposed, the epitaxial layer 200 between two electrodes of the same electrode group is still covered by the masking layer 400. As can also be seen from fig. 12, the side walls 401 cover the side walls of the corresponding first electrode 301 and the second electrode 302, and also cover the epitaxial layer 200 between the corresponding first electrode 301 and the second electrode 302.
Further, as shown in fig. 12, a gap is formed between adjacent electrode sets, and the width of the sidewall 401 is not sufficient to fill the gap between adjacent electrode sets, so that a gap is also formed between the sidewalls 401 corresponding to adjacent electrode sets, thereby exposing a portion of the epitaxial layer 200, and defining a region of a scribe line.
Referring to fig. 13, the epitaxial layer 200 and the substrate 100 are operated by using the sidewall 401 as a mask and sequentially and cyclically utilizing a chemical etching process, a passivation process and a physical bombardment process to form a scribe line 200a penetrating through the epitaxial layer 200 and the substrate 100, so that the scribing is completed to form a single micro light emitting diode. The scribing groove 200a has recesses on its side wall, and the recesses are continuously arranged in the thickness direction. As shown in fig. 13, the sidewall of the micro led has a shape corresponding to the sidewall of the scribe line 200 a. That is, the side wall of the micro light emitting diode is provided with a plurality of concave parts, and the concave parts are continuously arranged along the thickness direction of the micro light emitting diode.
Referring to fig. 13 and 14, the passivation layer 500 on the sidewalls of the micro light emitting diode is removed by a wet etching process. The etchant of the wet etching process may be acid solution or organic solvent, and the invention is not limited.
As shown in fig. 14, after the splitting is completed, the inner wall of the concave portion of the side wall of the micro light emitting diode is an arc surface, and in order to increase the roughness of the side wall of the micro light emitting diode, as shown in fig. 15, the side wall of the micro light emitting diode is roughened by a chemical etching process, so that the shape of the inner wall of the concave portion is changed; and because the different crystal faces of the GaN have different etching rates, the inner walls of part of the concave parts can be roughened into shapes of prisms, cylinders, cones and the like, so that the roughness of the side walls of the micro light-emitting diode is further increased, and the light-emitting efficiency of the micro light-emitting diode is further improved.
Continuing with fig. 15, the sidewall 401 is removed using a solvent such as BOE to form the micro light emitting diode shown in fig. 15.
EXAMPLE III
Fig. 16 is a schematic structural diagram of a micro light emitting diode provided in this embodiment. As shown in fig. 16, the difference from the first embodiment is that, in the present embodiment, the inner walls of the concave portions of the sidewalls of the micro light emitting diode are all arc surfaces, but the concave depths of some of the concave portions are different. It can also be seen from fig. 16 that the virtual connecting line of the bottoms of all the recesses is substantially in a convex wave shape (the virtual connecting line of the bottoms of all the recesses in the first embodiment is substantially in a straight line shape with an inclination).
Compared with the first embodiment, when the side wall of the micro light emitting diode in the embodiment emits light, the included angle between the light and the normal is smaller, and the light is easier to emit, so that the light emitting efficiency of the micro light emitting diode can be increased.
The manufacturing process of the LED chip in this embodiment is different from the first embodiment in that in the process of sequentially recycling the chemical etching process, the passivation process, and the physical bombardment process, the conversion time of the chemical etching process, the passivation process, and the physical bombardment process is different in different cycle periods, so that the features of the side walls of the grooves formed corresponding to part of the cycle periods are different, and the recess depths of part of the recesses are different.
It should be understood that the present embodiment only shows the case that the recess depths of some of the recesses are different, and in fact, the recess depths of all the recesses may be different; in addition, in this embodiment, the shapes of the inner walls of the recessed portions are the same, but by controlling the conversion time of the chemical etching process, the passivation process, and the physical bombardment process, the shapes of the inner walls of the recessed portions may also be different, which is not described in detail herein.
Further, this embodiment only shows schematically that the two electrodes of the micro light emitting diode are respectively located on the epitaxial layer 200 and on a surface of the substrate away from the epitaxial layer 200, and the recess depths of the recesses are different, but actually, when both the two electrodes of the micro light emitting diode are located on the epitaxial layer 200, the recess depths of the recesses, the shapes of the inner walls of the recesses, and the width dimensions of the recesses in the thickness direction may also be different.
It should be understood that the above-mentioned embodiments only schematically show the production of GaN-based micro light emitting diodes of vertical structure and flip-chip structure, but the present invention is not limited thereto, and GaN-based micro light emitting diodes of forward-mounted structure, GaAs-based positive/negative polarity micro light emitting diodes, GaAs-based micro light emitting diodes of flip-chip structure, etc., and micro light emitting diodes of compounds such as SiC, etc., may also be produced, and they are not illustrated one by one here.
In summary, in the micro light emitting diode provided in this embodiment, the micro light emitting diode includes a substrate and an epitaxial layer on the substrate, a sidewall of the micro light emitting diode has a plurality of concave portions, the concave portions are continuously arranged along a thickness direction of the micro light emitting diode, wherein the sidewall of the micro light emitting diode includes a sidewall of the substrate and a sidewall of the epitaxial layer, and the concave portions increase roughness of the sidewall of the LED chip, so that light extraction efficiency of the micro light emitting diode can be improved.
In the method for manufacturing a micro light-emitting diode provided by this embodiment, the epitaxial layer and the substrate are operated by sequentially and cyclically using a chemical etching process, a passivation process and a physical bombardment process until the splitting is completed, so as to form a single micro light-emitting diode, and the splitting manner can reduce the line width of a formed scribing groove and increase the number of micro light-emitting diodes which can be produced by a unit; the intensity of the micro light-emitting diode can be enhanced without mechanical damage caused by cutting and scratching, so that the yield of the micro light-emitting diode is improved; and the splinters and the side wall patterns of the micro light-emitting diodes are formed together, so that the processing steps are simplified, the cost is reduced, meanwhile, the micro light-emitting diodes with polygonal shapes which are difficult to obtain by cutting and scratching can be manufactured, and the manufacturability is improved.
In addition, the side wall of the micro light-emitting diode formed after the splitting is provided with a plurality of concave parts, the concave parts are continuously arranged along the thickness direction of the micro light-emitting diode, and the concave parts increase the roughness of the side wall of the micro light-emitting diode, so that the light-emitting efficiency of the micro light-emitting diode can be improved.
It should be noted that, in the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
It should be noted that, although the present invention has been described with reference to the preferred embodiments, the above embodiments are not intended to limit the present invention. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the protection scope of the technical solution of the present invention, unless the content of the technical solution of the present invention is departed from.
It should be further understood that the terms "first," "second," "third," and the like in the description are used for distinguishing between various components, elements, steps, and the like, and are not intended to imply a logical or sequential relationship between various components, elements, steps, or the like, unless otherwise indicated or indicated.
It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. For example, reference to "a step" or "an apparatus" means a reference to one or more steps or apparatuses and may include sub-steps as well as sub-apparatuses. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have the definition of a logical "or" rather than the definition of a logical "exclusive or" unless the context clearly dictates otherwise. Further, implementation of the methods and/or apparatus of embodiments of the present invention may include performing the selected task manually, automatically, or in combination.
Claims (25)
1. A method for preparing a micro light-emitting diode is characterized by comprising the following steps:
providing a substrate, wherein an epitaxial layer is formed on the substrate; and the number of the first and second groups,
and sequentially and circularly utilizing a chemical etching process, a passivation process and a physical bombardment process to operate the epitaxial layer and the substrate until the splitting is completed, so as to form a single micro light-emitting diode.
2. The method of manufacturing a micro light emitting diode according to claim 1, wherein electrode groups corresponding to the micro light emitting diodes one to one are formed on the epitaxial layer, the electrode groups include at least one electrode, and before etching the epitaxial layer and the substrate, the method further includes:
forming side walls corresponding to each electrode group, wherein the side walls at least cover the side walls of the electrodes, and gaps are formed between the side walls corresponding to the adjacent electrode groups to expose part of the epitaxial layer;
etching the epitaxial layer and the substrate by taking the side wall as a mask to finish splitting; and the number of the first and second groups,
and removing the side wall.
3. The method of claim 2, wherein the electrode assembly comprises two electrodes, and the sidewall covers sidewalls of the two electrodes and fills a region between the two electrodes.
4. The method of claim 3, wherein a width dimension between two of said electrodes in a same electrode group is smaller than a width dimension between said electrodes in different electrode groups.
5. The method according to claim 2, wherein the electrode assembly comprises a second electrode, a metal layer is provided on a surface of the substrate facing away from the epitaxial layer, and the sidewall covers a sidewall of the second electrode; and the number of the first and second groups,
and after the epitaxial layer and the substrate are etched by taking the side walls as masks, splitting the metal layer to enable the metal layer to be split into a plurality of first electrodes which correspond to the second electrodes one to one, and finishing splitting.
6. The method of any of claims 2-5, wherein the step of forming the sidewalls corresponding to each of the electrode sets comprises:
conformally forming a mask layer on the epitaxial layer and the electrode set; and the number of the first and second groups,
and etching the mask layer by adopting an ICP (inductively coupled plasma) etching process to form the side wall.
7. The method according to claim 6, wherein the mask layer is made of silicon oxide and/or silicon nitride, and the ICP etching process uses CF as a process gas4And CHF4At least one of (1).
8. The method of claim 6, wherein the mask layer has a thickness of
9. The method of fabricating a micro-led according to any one of claims 2 to 5, wherein after the cleaving and before the removing the sidewall, further comprising:
and coarsening the side wall of the LED chip.
10. The method of claim 1, wherein the step of operating the epitaxial layer and the substrate by sequentially recycling a chemical etching process, a passivation process, and a physical bombardment process comprises:
etching the substrate by using the chemical etching process to form a groove;
converting the process gas, and forming a passivation layer on the inner wall of the groove by using the passivation process;
converting the process gas again, and removing the part of the passivation layer on the bottom wall of the groove by using the physical bombardment process;
and circulating the steps, and forming one groove once every circulation until all the grooves penetrate the substrate and the epitaxial layer to form a scribing groove, so that the splitting is finished.
11. The method of claim 1, wherein the width of the scribe line decreases gradually from the epitaxial layer to the substrate.
12. The method of manufacturing a micro light emitting diode according to claim 10 or 11, wherein the maximum lateral width dimension of the scribe line is 2 μm to 6 μm, and the minimum lateral width dimension of the scribe line is 1 μm to 5 μm.
13. The method according to claim 1 or 10, wherein the process gas of the chemical etching process is Cl2、BCl3、SiCl4、I2、Br2、SF6、CH4、CF4And CHF4At least one of (1).
14. The method of claim 1 or 10, wherein the passivation is performed by a passivation processThe process gas of the process is C4F8、CH4And C2H2At least one of them.
15. The method of claim 1 or 10, wherein the physical bombardment process comprises Ar and/or O as process gas2。
16. The method of claim 1 or 10, wherein the conversion time of the chemical etching process, the passivation process and the physical bombardment process is 5s to 10 s.
17. The method of claim 1 or 10, wherein the conversion time of the chemical etching process, the passivation process and the physical bombardment process is the same or different.
18. The method of claim 10, wherein the passivation layer on the sidewalls of each of the recesses is removed after the cleaving is completed.
19. The method according to claim 1 or 10, wherein the side wall of the micro light emitting diode has a plurality of recesses arranged continuously in a thickness direction of the micro light emitting diode, wherein the side wall of the micro light emitting diode includes the side wall of the substrate and the side wall of the epitaxial layer.
20. The method of claim 19, wherein the inner walls of the recesses have the same or different shapes.
21. The method of claim 20, wherein the inner wall of the depression is a curved surface, a circular arc surface, a sawtooth surface, a wavy surface, a prism/cone surface, a cylinder/cone surface, or an irregular surface.
22. The method of producing a micro light-emitting diode according to any one of claims 19 to 21, wherein the width dimensions of the recesses in the thickness direction of the micro light-emitting diode are the same or different.
23. The method of any one of claims 19-21, wherein the recesses of the recesses have the same or different depths.
24. The method of claim 19, wherein a distance between a sidewall of the micro light emitting diode and a center of the micro light emitting diode is gradually increased in a direction from the epitaxial layer to the substrate.
25. The method of claim 19, wherein the micro light emitting diode has a side wall with an area larger than an area of a top wall or a bottom wall thereof.
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| CN116344708B (en) * | 2023-05-22 | 2023-12-08 | 西湖烟山科技(杭州)有限公司 | Manufacturing method of Micro-LED device based on self-alignment process |
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