CN113690347A - Manufacturing method of mini LED with sub-wavelength anti-reflection grating - Google Patents
Manufacturing method of mini LED with sub-wavelength anti-reflection grating Download PDFInfo
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Abstract
The invention relates to the technical field of LEDs (light emitting diodes), in particular to a manufacturing method of a mini LED with a sub-wavelength anti-reflection grating, which comprises the following steps: growing epitaxial wafer, roughening surface, and depositing SiO on surface2Surface chemical mechanical polishing, surface activation and bonding, original GaAs substrate removal, table top manufacturing, P electrode manufacturing, N electrode manufacturing, isolation channel etching, passivation isolation, contact hole etching, bonding pad manufacturing, sapphire thinning and polishing, temporary bonding, SiO (silicon dioxide) evaporation2Film and grating manufacturing, temporary bonding removal, cutting and splitting. According to the invention, the sub-wavelength anti-reflection grating is manufactured on the light emitting surface of the mini LED, only a single-layer film is evaporated, the process flow is greatly simplified, and the process operation is more convenient under the condition of ensuring higher light emitting efficiency; the invention applies the temporary bonding technology to improve the yield under the condition of ensuring the thinning of the substrate.
Description
Technical Field
The invention relates to the technical field of LEDs, in particular to a manufacturing method of a mini LED with a sub-wavelength anti-reflection grating.
Background
The conventional method for improving the light emitting efficiency of the Mini LED is to evaporate a DBR (distributed bragg reflector) reflector on the front surface by using an electron beam mode, which can achieve a certain reflection effect at that time, but has two obvious disadvantages: the first is that the DBR reflection is good for reflecting light in the vertical direction, but for incident light with a certain angle, the reflection efficiency is obviously reduced; secondly, in order to pursue a better reflection effect, the DBR is usually subjected to evaporation of thirty or more layers, and the overall thickness is close to 3 μm, so that the evaporation process is long in time consumption and the cost is increased, and meanwhile, the thick DBR causes great difficulty in the subsequent etching process. The thicker the film layer, the higher the photoresist requirements and the more difficult it is to control the lateral etch. Therefore, it is important to find a method for manufacturing a mini LED with simple process, high light extraction efficiency and high yield.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a manufacturing method of a mini LED with a sub-wavelength anti-reflection grating, the manufacturing method manufactures the sub-wavelength anti-reflection grating on the light-emitting surface of the mini LED to replace the traditional DBR reflection structure, the process operation is more convenient under the condition of ensuring higher light-emitting efficiency, and the process can be quickly and conveniently adjusted according to the emergent wavelength.
The invention provides a manufacturing method of a mini LED with a sub-wavelength anti-reflection grating, which specifically comprises the following steps:
s1, growth of an epitaxial wafer: using MOCVD technology (metal organic compound vapor deposition technology), growing an active layer on a GaAs substrate, wherein the active layer comprises a GaAs buffer layer, a GaInP corrosion stop layer, a GaAs ohmic contact layer, a GaInP electrode protection layer, an AlGaInP current expansion layer, an AlInP limiting layer, a first AlGaInP waveguide layer, a multi-quantum well structure, a second AlGaInP waveguide layer, an AlInP limiting layer and a transition layer which are grown from bottom to top, and the outermost layer of the active layer is a GaP window layer;
s2, surface roughening treatment: etching the surface of the GaP window layer by utilizing an ICP (inductively coupled plasma etching) technology, and then cleaning and spin-drying;
s3, depositing SiO on the surface2: deposition of SiO on cleaned epitaxial wafers and sapphire substrates (SAP substrates) using PECVD technique (plasma enhanced chemical vapor deposition technique)2；
S4, surface chemical mechanical polishing: deposition of SiO on the surface2The surface of the epitaxial wafer is chemically and mechanically polished, and the surface roughness after polishing is between 1 and 5 nm;
s5, surface activation and bonding: for SiO after polishing2The surface is activated by using KOH and glycerol mixed aqueous solution, wherein glycerol and H2The volume ratio of O is 1:3, the KOH concentration ratio is 0.5mol/L, the activation temperature is 40-45 ℃, and the activation time is 10 min; bonding the activated epitaxial wafer and sapphire (SAP substrate);
s6, removing the original GaAs substrate: using NH4OH、H2O2、H2Removing the substrate by using a solution with the volume ratio of O being 1:5:5, reacting until the GaInP corrosion cut-off layer is cut off, and then turning over the whole structure;
s7, manufacturing a table top: making a mesa pattern by using a photoetching mask technology, etching a mesa by using photoresist as a mask and ICP (inductively coupled plasma), wherein the depth of the mesa is controlled to be 5.5-6.5 mu m;
s8.P electrode manufacturing: firstly, photoresist is used for making a P electrode pattern, then an electron beam evaporation technology is used for evaporating metal to the surface of a wafer, and then the photoresist is removed to obtain a P electrode;
s9.N electrode manufacturing: etching GaAs on the surface into specific shape by using photoetching mask etching technique, and etching with H3PO4、H2O2、H2Corroding the solution with the volume ratio of O being 1:1:3, then stripping by using negative glue, and combining an electron beam evaporation technology to obtain an N electrode;
s10, etching of the isolation channel: using photolithographyMaking isolation channel pattern by mask technology, etching isolation channel by ICP using photoresist as mask until bonding layer SiO2；
S11, passivation and isolation: using PECVD technique to deposit SiO on the surface2Covering the exposed side surface of the epitaxial layer, wherein the deposition thickness is 1.8-2.2 mu m;
s12, contact hole etching: firstly, making contact hole pattern by using photoetching mask technology, then using photoresist as mask, using ICP to etch contact hole, and etching to P/N electrode, etching gas is SF6/O2；
S13, pad manufacturing: the pad electrode is manufactured by utilizing a negative adhesive stripping technology and an electron beam evaporation technology, and the pad electrode is structurally characterized in that: ti500nm/Al5000nm, circulating for 5 times, and then Ni100nm, Au300nm with the total thickness of 3.5 mu m;
s14, thinning and polishing of sapphire: mechanical grinding is used for thinning, and then CMP polishing is carried out, wherein the thinning thickness is 80-100 mu m;
s15, temporary bonding: cleaning a chip by using an organic solution, coating a temporary bonding glue on the surface of a wafer, and bonding the wafer to a temporary substrate;
s16, SiO vapor deposition2Film formation: using electron beam evaporation techniques to evaporate SiO2The thickness of the film is designed according to different light-emitting wavelengths;
s17, grating manufacturing: manufacturing a grating pattern on a sapphire light-emitting surface by using a holographic exposure technology; the grating period, the duty ratio and the like are designed according to the preset wavelength;
s18, releasing the temporary bonding: placing the wafer on a hot plate, setting the temperature of the hot plate to be 150 +/-5 ℃, sucking the temporary substrate by using a vacuum suction pen after the bonding adhesive loses viscosity, sliding in the horizontal direction until the temporary substrate is separated from the wafer, and then cleaning the wafer by using PMA (propylene glycol methyl ether acetate);
s19, cutting and splitting: and carrying out laser invisible cutting and splitting to finish the core grain manufacturing.
This technical scheme replaces traditional DBR with sub-wavelength antireflection grating, and the grating preparation only need the evaporation coating single layer membrane, and process flow simplifies greatly, under the circumstances of the higher luminous efficiency of assurance, and process operation is more convenient, can be according to the emergent wavelength simultaneously, quick convenient adjustment technology.
Further, in step S1, the AlGaInP current spreading layer has a thickness of 3-3.5 μm, the first AlGaInP waveguide layer has a thickness of 100 ± 5nm, the second AlGaInP waveguide layer has a thickness of 90 ± 5nm, the GaP window layer is graded and doped into four parts, wherein the first part has a thickness of 0.87 μm and a doping concentration of 5 × 1017-5×1018cm-3The second portion has a thickness of 6.57 μm and a doping concentration of 8 × 1018-1×1019cm-3The third portion has a thickness of 1.1 μm and a doping concentration of 1X 1019cm-3The thickness of the fourth part surface layer is 0.2 μm, and the doping concentration is 5 × 1019cm-3。
Further, in step S2 of the above technical solution, the roughening depth is 3000 a ± 1000 a; the etching conditions are as follows: gas/flow Cl2/20sccm、BCl3/40sccm、N2The power of the upper electrode is 1500W, the power of the lower electrode is 800W, the vacuum of the cavity is 5mTorr, and the etching time is 5 min.
Further, in step S3 of the above technical solution, the depositing SiO is performed2Has a thickness of 2-3 μm and a refractive index of 1.45-1.46, and the PECVD technique is performed under the following conditions: the reaction gas is SiH4And N2O, flow ratio is 1:4, carrier gas is N2The radio frequency power is 50-60W and the cavity pressure is 90-110Pa, accounting for 50% of the total gas flow.
Further, in step S4 of the above technical solution, the polishing conditions are: working pressure is 1.5-2.5psi, upper disc rotation speed is 100 + -5 rpm, lower disc rotation speed is 90 + -5 rpm, polishing time is 5-8min, and the abrasive material is spherical SiO with diameter of 30-50nm2。
Further, in step S5 of the above technical solution, the bonding conditions are: the pressure was 15000-25000kgf, the bonding temperature was 250-270 ℃, the vacuum was 0.5Torr, and the bonding time was 120 min. In the present embodiment, the pressure is preferably 15000kgf when the wafer diameter is 4 inches, and 25000kgf when the wafer diameter is 6 inches.
Further, in step S8 of the above technical solution, the P electrode structure is Au/AuZn/Au, and the thicknesses thereof are 50nm, 220nm, and 100nm, respectively; in step S9, the N cell structure is Au/AuGeNi/Au, and the thicknesses thereof are 50nm, 220nm, and 100nm, respectively.
Further, in step S15 of the above technical solution, the bonding glue is a pyrolytic temporary bonding glue, a rotary gluing method is used to glue, and the temporary substrate is a polished sapphire or quartz plate; the temporary bonding parameters are as follows: the pressing time is 10min, the vacuum degree is less than or equal to 5mbar, the temperature is 120-.
In the technical scheme, because the grating is manufactured under the condition of the thin substrate, in order to prevent the broken piece and the influence of the epitaxial stress warping on the photoetching graph, the temporary bonding technology is applied, the temporary substrate is used for preventing the broken piece and resisting the stress, and the yield can be improved under the condition of ensuring the thinning of the substrate.
Further, in step S17 of the above technical solution, the specific steps of manufacturing the grating include:
a. spin-coating photoresist on the surface of the sapphire light-emitting surface, wherein the spin-coating thickness is 1.5 mu m, and baking the sapphire light-emitting surface by using a hot plate at the baking temperature of 100 ℃ and 120 ℃ for 5 min;
b. performing holographic exposure, namely exposing the substrate by adopting a light source with the wavelength of 325nm, wherein the exposure time is 60-70s, and the included angle of a light beam is 30-32 degrees;
c. developing in a developing solution for 100-110s after exposure, drying by hot nitrogen, and hardening on a hot plate at 120 ℃ for 5min to finish the manufacture of an exposure pattern;
d. etching the exposed substrate by using ICP;
e. and removing the photoresist left on the surface by using the degumming solution to finish the grating manufacture.
Because of the regularity of the beam angle and the interference periodic pattern, λ = λ0In/2 sin (θ), where λ is the interference period, λ0Is the incident wavelength, theta is the incident included angle, and the grating pattern period obtained in this way is about 290nm-310nm, which is the period required by a relatively proper anti-reflection grating. In the technical scheme, the grating can be adjustedThe period, duty cycle, groove depth, etc. to achieve any equivalent refractive index, even if the material of such refractive index does not exist in nature, which is not comparable to that of the conventional antireflection film.
Further, in the above technical solution, in the step d, the etching conditions are: the gas used is O2And SF6The flow rates are respectively 40sccm and 10sccm, the cavity pressure is 0.5Pa, the ICP power is 300W, and the Bias power is 150W.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention uses the sub-wavelength anti-reflection grating to replace the traditional DBR, only a single-layer film is needed to be evaporated for grating manufacture, the process flow is greatly simplified, the process operation is more convenient under the condition of ensuring higher light-emitting efficiency, and the process can be quickly and conveniently adjusted according to the emergent wavelength;
2. the sub-wavelength anti-reflection grating is manufactured on the sapphire light-emitting surface, the traditional DBR reflection structure is replaced, any equivalent refractive index can be realized by adjusting parameters such as the period, duty ratio and groove depth of the grating, and even if the material of the refractive index does not exist in the nature, the material cannot be compared with the traditional anti-reflection film;
3. the grating has the function of protecting the light-emitting surface from being polluted, and the sizes of common dust and water vapor are far larger than the size of the grating, so that impurities are blocked by the grating and cannot contact the light-emitting surface after falling on the light-emitting surface;
4. the invention applies the temporary bonding technology to improve the yield under the condition of ensuring the thinning of the substrate.
Drawings
FIG. 1 is a flow chart of the manufacturing process of a mini LED with a sub-wavelength anti-reflection grating according to the present invention;
FIG. 2 is a schematic structural view of a mini LED with a sub-wavelength anti-reflection grating manufactured by the present invention;
FIG. 3 is a schematic diagram of the grating fabrication of the present invention.
Number designations in the schematic drawings illustrate that:
1. an active layer; 2. a coarsened GaP window layer; SiO2(ii) a An SAP substrate; a P electrode; n electricityA pole; 7. a contact hole; 8. a pad electrode; 9. an anti-reflection grating; SiO 22A film; 11. photoresist; 12. holographic light.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the application, its application, or uses. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be understood that the terms "first", "second", etc. are used to define the components, and are used only for the convenience of distinguishing the corresponding components, and if not otherwise stated, the terms have no special meaning, and thus, should not be construed as limiting the scope of the present application.
In the description of the present application, it is to be understood that the orientation or positional relationship indicated by the directional terms such as "front, rear, upper, lower, left, right", "lateral, vertical, horizontal" and "top, bottom", etc., are generally based on the orientation or positional relationship shown in the drawings, and are used for convenience of description and simplicity of description only, and in the case of not making a reverse description, these directional terms do not indicate and imply that the device or element being referred to must have a particular orientation or be constructed and operated in a particular orientation, and therefore, should not be considered as limiting the scope of the present application; the terms "inner and outer" refer to the inner and outer relative to the profile of the respective component itself.
Referring to fig. 1 to 3, it should be noted that the drawings provided in the present embodiment are only schematic illustrations of the basic idea of the present invention, and only show the components related to the present invention rather than drawn according to the number, shape and size of the components in actual implementation, the shape, number and ratio of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
FIG. 1 is a flow chart of a manufacturing process of a method for manufacturing a mini LED with a sub-wavelength anti-reflection grating according to the present invention.
The invention provides a manufacturing method of a mini LED with a sub-wavelength anti-reflection grating, which specifically comprises the following steps:
s1, growth of an epitaxial wafer: using MOCVD technology, epitaxially growing a GaAs buffer layer, a GaInP corrosion stop layer, a GaAs ohmic contact layer, a GaInP electrode protection layer, an AlGaInP current expansion layer, an AlInP limiting layer, a first AlGaInP waveguide layer, a multi-quantum well structure, a second AlGaInP waveguide layer, an AlInP limiting layer, a transition layer and a GaP window layer on a GaAs substrate from bottom to top in sequence;
specifically, the thickness of the AlGaInP current spreading layer is controlled to be 33.5 μm, the thickness of the first AlGaInP waveguide layer is 100 +/-5 nm, the thickness of the second AlGaInP waveguide layer is 90 +/-5 nm, the GaP window layer is doped in a gradient mode and is divided into four parts, wherein the thickness of the first part is 0.87 μm, and the doping concentration is 5 multiplied by 1017-5×1018cm-3The second portion has a thickness of 6.57 μm and a doping concentration of 8 × 1018-1×1019cm-3The third portion has a thickness of 1.1 μm and a doping concentration of 1X 1019cm-3The thickness of the fourth part surface layer is 0.2 μm, and the doping concentration is 5 × 1019cm-3。
S2, surface roughening treatment: etching the surface of the GaP window layer by utilizing an ICP (inductively coupled plasma) technology, and then cleaning and spin-drying;
in particular, using the ICP technique, a gas/flow of Cl is used2/20sccm、BCl3/40sccm、N 210 sccm; the power of the upper electrode is 1500W, the power of the lower electrode is 800W, the vacuum of the cavity is 5mTorr, and the etching time is 5 min. After coarsening, cleaning the epitaxial wafer by using diluted ammonia water with the dilution ratio of NH4OH：H2O =1:10 (volume ratio). The cleaning process comprises rinsing with ammonia water for 10s, washing with deionized water, and drying with hot nitrogen gas.
S3, depositing SiO on the surface2: depositing SiO on the cleaned epitaxial wafer and sapphire by using PECVD technology2；
In particular, SiO is deposited2Has a thickness of 2 μm and a refractive index controlled between 1.45 and 1.46. The reaction gas used in the PECVD technology is SiH4And N2O, the flow ratio is 1:4, and N is used as carrier gas250% of the total gas flow; the radio frequency power is 50-60W, and the pressure of the cavity is 90-110 Pa.
S4, surface chemical mechanical polishing: deposition of SiO on the surface2The epitaxial wafer of (1) is subjected to surface Chemical Mechanical Polishing (CMP), and the surface roughness after polishing is 1-5 nm;
specifically, the polishing conditions were: working pressure is 1.5-2.5psi, upper disc rotation speed is 100 + -5 rpm, lower disc rotation speed is 90 + -5 rpm, and polishing time is 5-8min, wherein the abrasive material is spherical SiO with diameter of 30-50nm2. In general, the ratio of the polishing solution may be: 25g of grinding material, 3g of inorganic base, 140mL of 40% silica gel and 10.5g of additive; after polishing, the surface roughness is controlled to be 1-5 nm.
S5, surface activation and bonding: for SiO after polishing2The surface is activated by using KOH and glycerol mixed aqueous solution, wherein glycerol and H2The volume ratio of O is 1:3, the KOH concentration ratio is 0.5mol/L, the activation temperature is 40-45 ℃, and the activation time is 10 min; bonding the activated epitaxial wafer and sapphire;
specifically, the bonding conditions may be: when the wafer diameter is 4 inches, the pressure is preferably 15000kgf, and when the wafer diameter is 6 inches, the pressure is preferably 25000kgf, the degree of vacuum is 0.5Torr, and the bonding time is 120 min.
S6, removing the original GaAs substrate: using NH4OH、H2O2、H2Removing the substrate by using a solution with the volume ratio of O being 1:5:5, reacting until the GaInP corrosion cut-off layer is cut off, and then turning over the whole structure;
specifically, the GaInP etch stop layer was removed using a hydrochloric acid rinse and the GaAs ohmic contact layer was exposed.
S7, manufacturing a table top: making mesa pattern by photoetching mask technology, using photoresist as mask, ICP etchingEtching a table top, wherein the depth of the table top is controlled to be 5.5-6.5 mu m; specifically, the ICP etching gas is Cl2/BCl3/HBr。
S8.P electrode manufacturing: firstly, photoresist is used for making a P electrode pattern, then an electron beam evaporation technology is used for evaporating metal to the surface of a wafer, and then the photoresist is removed to obtain a P electrode;
specifically, a negative photoresist stripping technology is utilized, firstly, a photoresist is used for making a P electrode pattern, then, an electron beam evaporation technology is used for evaporating metal to the surface of a wafer, and then, the photoresist is removed; the metal on the photoresist is removed along with the photoresist, so that the metal with a specific pattern is left as an electrode, and the negative photoresist stripping has the advantage of uniform and consistent electrode pattern; wherein, the electrode structure is Au/AuZn/Au, the thickness is 50/220/100, and the unit is nm.
S9.N electrode manufacturing: etching GaAs on the surface into specific shape by using photoetching mask etching technique, and etching with H3PO4、H2O2、H2Corroding the solution with the volume ratio of O being 1:1:3, then stripping by using negative glue, and combining an electron beam evaporation technology to obtain an N electrode;
specifically, the manufacturing process of the N electrode is consistent with that of the P electrode, the electrode structure is Au/AuGeNi/Au, the thickness is 50/220/100, and the unit is nm.
S10, etching of the isolation channel: making isolation channel pattern by photoetching mask technology, etching isolation channel by ICP using photoresist as mask until bonding layer SiO2(ii) a Specifically, the etching gas is Cl2/BCl3/HBr。
S11, passivation and isolation: using PECVD technique to deposit SiO on the surface2Covering the exposed side surface of the epitaxial layer, wherein the deposition thickness is 1.8-2.2 mu m; in particular, the deposition process and bonding layer SiO2The process is the same.
S12, contact hole etching: firstly, making contact hole pattern by using photoetching mask technology, then using photoresist as mask, using ICP to etch contact hole, and etching to P/N electrode, etching gas is SF6/O2；
S13, pad manufacturing: the pad electrode is manufactured by utilizing a negative adhesive stripping technology and an electron beam evaporation technology, and the pad electrode is structurally characterized in that: ti500nm/Al5000nm, circulating for 5 times, and then Ni100nm, Au300nm with the total thickness of 3.5 mu m;
s14, thinning and polishing of sapphire (SAP substrate): mechanical grinding is used for thinning, and then CMP polishing is carried out, wherein the thinning thickness is 80-100 μm; specifically, grinding the sapphire with a grinder to reduce thickness from 680 μm to about 110 μm, rough polishing for 10min to about 90 μm, soft polishing for about 10min, and other polishing processes and SiO before2The polishing process is consistent.
S15, temporary bonding: cleaning a chip by using an organic solution, coating a temporary bonding glue on the surface of a wafer, and bonding the wafer to a temporary substrate;
specifically, the invention uses a pyrolytic temporary bonding adhesive, and the wafer and the temporary substrate are both coated with adhesive; the temporary substrate is a polished sapphire or quartz plate; the temporary bonding glue is coated on the surfaces of the wafer and the temporary substrate uniformly by adopting a rotary gluing method, namely, the rotation of the wafer is utilized, and the specific parameters are as follows: rotating at 500rpm for 15s, then at 1500rpm for 30s, and after coating, at 100 deg.C N2Baking in oven for 3-5 min. After the wafer and the temporary substrate are coated with glue and baked, temporary bonding is carried out, namely certain pressure is used, the wafer and the temporary substrate are attached together in a vacuum environment, wherein the bonding parameters can be as follows: the pressing time is 10min, the vacuum degree is less than or equal to 5mbar, the temperature is 120-550 ℃, and the pressure is 450-550 kgf.
S16, SiO vapor deposition2Film formation: evaporating SiO on the sapphire light-emitting surface by using electron beam evaporation technology2The thickness of the film is designed according to different light-emitting wavelengths;
in particular, SiO2The thickness of the film is controlled at 150-200nm, the refractive index is controlled at 1.39-1.4, the film is low in refractive index, and O is introduced in the evaporation process2Wherein O is2The flow rate was 50 sccm.
S17, grating manufacturing: manufacturing a grating pattern on a sapphire light-emitting surface by using a holographic exposure technology; the grating period, the duty ratio and the like are designed according to the preset wavelength;
wherein, fig. 3 is a schematic diagram of grating fabrication, specifically, a, spin-coating a photoresist on the surface of the sapphire light-emitting surface, the spin-coating thickness is 1.5 μm, and baking with a hot plate at a baking temperature of 100-; b. and (3) performing holographic exposure, namely exposing the substrate by adopting a holographic light source with the wavelength of 325nm, wherein the exposure time is 60-70s, and the included angle of the light beams is 30-32 degrees. Because of the regularity of the beam angle and the interference periodic pattern, λ = λ0In/2 sin (θ), where λ is the interference period, λ0Is the incident wavelength, theta is the incident angle, and the grating pattern period obtained in this way is about 290-310nm, which is the period required by the relatively proper anti-reflection grating. c. Developing in a developing solution for 100-110s after exposure, and drying by hot nitrogen; hardening the film for 5min in a hot plate at 120 ℃ to finish the manufacture of an exposure pattern; d. etching the exposed substrate by ICP technology, wherein the used gas is O2And SF6The flow rates are respectively 40sccm and 10sccm, the cavity pressure is 0.5Pa, the ICP power is 300W, and the Bias power is 150W; e. and removing the photoresist left on the surface by using the degumming solution to finish the grating manufacture.
S18, releasing the temporary bonding: placing the wafer on a hot plate, setting the temperature of the hot plate to be 150 +/-5 ℃, sucking the temporary substrate by using a vacuum suction pen after the bonding adhesive loses viscosity, sliding in the horizontal direction until the temporary substrate is separated from the wafer, and then cleaning the wafer by using PMA;
s19, cutting and splitting: and carrying out laser invisible cutting and splitting to finish the core grain manufacturing.
Referring to fig. 2, the sub-wavelength anti-reflection grating mini LED manufactured by the invention comprises an anti-reflection grating 9, an SAP substrate 4 and SiO which are sequentially distributed from bottom to top2 3. The structure comprises a coarsened GaP window layer 2 and an active layer 1, wherein a P electrode 5 is manufactured after one side of the coarsened GaP window layer 2 is etched, two N electrodes 6 are etched on the active layer 1, and the P electrode 5 and the N electrode 6 are respectively connected with a pad electrode 8 through contact holes 7. According to the LED with the sub-wavelength antireflection grating mini, the sub-wavelength antireflection grating is manufactured on the sapphire light emitting surface to replace the traditional DBR (distributed Bragg reflector) structure, so that the process operation is more convenient under the condition of ensuring higher light emitting efficiencyThen the process is completed.
By testing the mini LED with the sub-wavelength anti-reflection grating and the conventional LED, the results show that: the brightness of the mini LED with the sub-wavelength anti-reflection grating is improved by 15-25% compared with the brightness of a conventional LED product.
In summary, the sub-wavelength anti-reflection grating is manufactured on the sapphire light-emitting surface to replace the traditional DBR reflection structure, only a single-layer film is evaporated, the process flow is greatly simplified, any equivalent refractive index can be realized by adjusting parameters such as the period, duty ratio and groove depth of the grating, the light-emitting efficiency is improved, meanwhile, under the condition of ensuring higher light-emitting efficiency, the process operation is more convenient, and the process can be quickly and conveniently adjusted according to the emergent wavelength; in addition, the invention applies the temporary bonding technology, and improves the yield under the condition of ensuring the thinning of the substrate.
Finally, it should be emphasized that the above-described preferred embodiments of the present invention are merely examples of implementations, rather than limitations, and that many variations and modifications of the invention are possible to those skilled in the art, without departing from the spirit and scope of the invention.
Claims (10)
1. A manufacturing method of a mini LED with a sub-wavelength antireflection grating is characterized by comprising the following steps:
s1, growth of an epitaxial wafer: growing a GaAs buffer layer, a GaInP corrosion stop layer, a GaAs ohmic contact layer, a GaInP electrode protection layer, an AlGaInP current expansion layer, an AlInP limiting layer, a first AlGaInP waveguide layer, a multi-quantum well structure, a second AlGaInP waveguide layer, an AlInP limiting layer, a transition layer and a GaP window layer on a GaAs substrate from bottom to top by using an MOCVD technology;
s2, surface roughening treatment: etching the surface of the GaP window layer by utilizing an ICP (inductively coupled plasma) technology, and then cleaning and spin-drying;
s3, depositing SiO on the surface2: depositing SiO on the cleaned epitaxial wafer and sapphire by using PECVD technology2；
S4, surface chemical mechanical polishing: deposition of SiO on the surface2The surface of the epitaxial wafer is chemically and mechanically polished, and the surface roughness after polishing is between 1 and 5 nm;
s5, surface activation and bonding: for SiO after polishing2The surface is activated by using KOH and glycerol mixed aqueous solution, wherein glycerol and H2The volume ratio of O is 1:3, the KOH concentration ratio is 0.5mol/L, the activation temperature is 40-45 ℃, and the activation time is 10 min; bonding the activated epitaxial wafer and the sapphire wafer;
s6, removing the original GaAs substrate: using NH4OH、H2O2、H2Removing the GaAs substrate by using a solution with the volume ratio of O being 1:5:5, reacting until the GaInP corrosion cut-off layer is cut off, and then turning over the whole structure;
s7, manufacturing a table top: making a mesa pattern by using a photoetching mask technology, etching a mesa by using photoresist as a mask and ICP (inductively coupled plasma), wherein the depth of the mesa is controlled to be 5.5-6.5 mu m;
s8.P electrode manufacturing: firstly, photoresist is used for making a P electrode pattern, then an electron beam evaporation technology is used for evaporating metal to the surface of a wafer, and then the photoresist is removed to obtain a P electrode;
s9.N electrode manufacturing: etching GaAs on the surface into specific shape by using photoetching mask etching technique, and etching with H3PO4、H2O2、H2Corroding the solution with the volume ratio of O being 1:1:3, then stripping by using negative glue, and combining an electron beam evaporation technology to obtain an N electrode;
s10, etching of the isolation channel: making isolation channel pattern by photoetching mask technology, etching isolation channel by ICP using photoresist as mask until bonding layer SiO2；
S11, passivation and isolation: using PECVD technique to deposit SiO on the surface2Covering the exposed side surface of the epitaxial layer, wherein the deposition thickness is 1.8-2.2 mu m;
s12, contact hole etching: firstly, making contact hole pattern by utilizing photoetching mask technology, then using photoresist as mask, using ICP to etch contact hole, etching to P/N electrode, etchingEtching gas is SF6/O2；
S13, pad manufacturing: the pad electrode is manufactured by utilizing a negative adhesive stripping technology and an electron beam evaporation technology, and the pad electrode is structurally characterized in that: ti500nm/Al5000nm, circulating for 5 times, and then Ni100nm, Au300nm with the total thickness of 3.5 mu m;
s14, thinning and polishing of sapphire: mechanical grinding is used for thinning, and then CMP polishing is carried out, wherein the thinning thickness is 80-100 μm;
s15, temporary bonding: cleaning a chip by using an organic solution, coating a temporary bonding glue on the surface of a wafer, and bonding the wafer to a temporary substrate;
s16, SiO vapor deposition2Film formation: using electron beam evaporation techniques to evaporate SiO2The thickness of the film is designed according to different light-emitting wavelengths;
s17, grating manufacturing: manufacturing a grating pattern on a sapphire light-emitting surface by using a holographic exposure technology; the grating period, the duty ratio and the like are designed according to the preset wavelength;
s18, releasing the temporary bonding: placing the wafer on a hot plate, setting the temperature of the hot plate to be 150 +/-5 ℃, sucking the temporary substrate by using a vacuum suction pen after the bonding adhesive loses viscosity, sliding in the horizontal direction until the temporary substrate is separated from the wafer, and then cleaning the wafer by using PMA;
s19, cutting and splitting: and carrying out laser invisible cutting and splitting to finish the core grain manufacturing.
2. The method as claimed in claim 1, wherein in step S1, the AlGaInP current spreading layer is 3-3.5 μm thick, the first AlGaInP waveguide layer is 100 ± 5nm thick, the second AlGaInP waveguide layer is 90 ± 5nm thick, and the GaP window layer is graded doped and divided into four parts, wherein the first part has a thickness of 0.87 μm and a doping concentration of 5 × 1017-5×1018cm-3The second portion has a thickness of 6.57 μm and a doping concentration of 8 × 1018-1×1019cm-3The thickness of the third part is 1.1 μm, and the doping concentration is 1 × 1019cm-3The thickness of the fourth part surface layer is 0.2 μm, and the doping concentration is 5 × 1019cm-3。
3. The method of claim 1, wherein in step S2, the roughening depth is 3000 a ± 1000 a; the etching conditions are as follows: gas/flow Cl2/20sccm、BCl3/40sccm、N2The power of the upper electrode is 1500W, the power of the lower electrode is 800W, the vacuum of the cavity is 5mTorr, and the etching time is 5 min.
4. The method for manufacturing the mini LED with the sub-wavelength anti-reflection grating as claimed in claim 1, wherein in step S3, the deposited SiO is deposited2Has a thickness of 2-3 μm and a refractive index of 1.45-1.46, and the PECVD technique is performed under the following conditions: the reaction gas is SiH4And N2O, flow ratio is 1:4, carrier gas is N2The radio frequency power is 50-60W and the cavity pressure is 90-110Pa, accounting for 50% of the total gas flow.
5. The method for manufacturing a mini LED with a sub-wavelength anti-reflection grating according to claim 1, wherein in step S4, the polishing conditions are: working pressure is 1.5-2.5psi, upper disc rotation speed is 100 + -5 rpm, lower disc rotation speed is 90 + -5 rpm, polishing time is 5-8min, and the abrasive material is spherical SiO with diameter of 30-50nm2。
6. The method for manufacturing a mini LED with a sub-wavelength anti-reflection grating according to claim 1, wherein in step S5, the bonding conditions are as follows: the pressure was 15000-25000kgf, the bonding temperature was 250-270 ℃, the vacuum was 0.5Torr, and the bonding time was 120 min.
7. The method for manufacturing the mini LED with the sub-wavelength anti-reflection grating according to claim 1, wherein in step S8, the P electrode structure is Au/AuZn/Au, and the thicknesses are 50nm, 220nm and 100nm respectively; in step S9, the N cell structure is Au/AuGeNi/Au, and the thicknesses thereof are 50nm, 220nm, and 100nm, respectively.
8. The method for manufacturing a mini LED with a sub-wavelength anti-reflection grating according to claim 1, wherein in step S15, the bonding glue is a pyrolytic temporary bonding glue, the bonding glue is coated by a spin coating method, and the temporary substrate is a polished sapphire or quartz plate; the temporary bonding parameters are as follows: the pressing time is 10min, the vacuum degree is less than or equal to 5mbar, the temperature is 120-.
9. The method for manufacturing a mini LED with a sub-wavelength anti-reflection grating according to claim 1, wherein in step S17, the specific steps of manufacturing the grating include:
a. spin-coating photoresist on the surface of the sapphire light-emitting surface, wherein the spin-coating thickness is 1.5 mu m, and baking the sapphire light-emitting surface by using a hot plate at the baking temperature of 100 ℃ and 120 ℃ for 5 min;
b. performing holographic exposure, namely exposing the substrate by adopting a holographic light source with the wavelength of 325nm, wherein the exposure time is 60-70s, and the included angle of a light beam is 30-32 degrees;
c. developing in a developing solution for 100-110s after exposure, drying by hot nitrogen, and hardening on a hot plate at 120 ℃ for 5min to finish the manufacture of an exposure pattern;
d. etching the exposed substrate by using ICP;
e. and removing the photoresist left on the surface by using the degumming solution to finish the grating manufacture.
10. The method for manufacturing a mini LED with a sub-wavelength anti-reflection grating according to claim 9, wherein in the step d, the etching conditions are as follows: the gas used is O2And SF6The flow rates are respectively 40sccm and 10sccm, the cavity pressure is 0.5Pa, the ICP power is 300W, and the Bias power is 150W.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114335268A (en) * | 2022-03-17 | 2022-04-12 | 南昌凯捷半导体科技有限公司 | Method for improving mini LED bonding yield |
| CN115332400A (en) * | 2022-08-11 | 2022-11-11 | 福州大学 | Preparation method of Micro-LED chip structure based on temporary bonding technology |
| CN116759498A (en) * | 2023-08-16 | 2023-09-15 | 南昌凯捷半导体科技有限公司 | Red light micro LED chip and manufacturing method thereof |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200802939A (en) * | 2006-06-21 | 2008-01-01 | Ind Tech Res Inst | Light emitting device |
| US20120112218A1 (en) * | 2010-11-04 | 2012-05-10 | Agency For Science, Technology And Research | Light Emitting Diode with Polarized Light Emission |
| KR20120103186A (en) * | 2011-03-10 | 2012-09-19 | 동우 화인켐 주식회사 | Semiconductor light-emitting device |
| CN102856447A (en) * | 2012-08-02 | 2013-01-02 | 浙江优纬光电科技有限公司 | Method for improving luminous efficiency of AlGaN-based ultraviolet LED (Light-Emitting Diode) |
| CN104157757A (en) * | 2014-08-15 | 2014-11-19 | 天津三安光电有限公司 | Quaternary light-emitting diode (LED) with transparent substrate and manufacturing method |
| CN205621763U (en) * | 2015-03-17 | 2016-10-05 | 传感器电子技术股份有限公司 | Semiconductor device |
| CN106504988A (en) * | 2016-11-30 | 2017-03-15 | 陕西科技大学 | A kind of diamond heat-sink substrate GaN HEMTs preparation methods |
| CN110071210A (en) * | 2019-04-15 | 2019-07-30 | 深圳先进技术研究院 | Infrared LED device and preparation method thereof |
| CN111129062A (en) * | 2019-12-30 | 2020-05-08 | 东莞市中晶半导体科技有限公司 | LED display module, LED display screen and manufacturing method |
| CN111326950A (en) * | 2020-03-03 | 2020-06-23 | 中国科学院半导体研究所 | Dual-wavelength tunable semiconductor laser based on electrode grating |
| CN111628057A (en) * | 2020-05-27 | 2020-09-04 | 东南大学 | Ultraviolet light-emitting diode with sub-wavelength grating reflector |
| CN112510134A (en) * | 2020-11-30 | 2021-03-16 | 中南大学 | LED indirectly modulating light polarization mode |
| CN113054074A (en) * | 2021-03-01 | 2021-06-29 | 康佳集团股份有限公司 | Mass transfer method for LED chips |
-
2021
- 2021-10-27 CN CN202111251081.9A patent/CN113690347A/en active Pending
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200802939A (en) * | 2006-06-21 | 2008-01-01 | Ind Tech Res Inst | Light emitting device |
| US20120112218A1 (en) * | 2010-11-04 | 2012-05-10 | Agency For Science, Technology And Research | Light Emitting Diode with Polarized Light Emission |
| KR20120103186A (en) * | 2011-03-10 | 2012-09-19 | 동우 화인켐 주식회사 | Semiconductor light-emitting device |
| CN102856447A (en) * | 2012-08-02 | 2013-01-02 | 浙江优纬光电科技有限公司 | Method for improving luminous efficiency of AlGaN-based ultraviolet LED (Light-Emitting Diode) |
| CN104157757A (en) * | 2014-08-15 | 2014-11-19 | 天津三安光电有限公司 | Quaternary light-emitting diode (LED) with transparent substrate and manufacturing method |
| CN205621763U (en) * | 2015-03-17 | 2016-10-05 | 传感器电子技术股份有限公司 | Semiconductor device |
| CN106504988A (en) * | 2016-11-30 | 2017-03-15 | 陕西科技大学 | A kind of diamond heat-sink substrate GaN HEMTs preparation methods |
| CN110071210A (en) * | 2019-04-15 | 2019-07-30 | 深圳先进技术研究院 | Infrared LED device and preparation method thereof |
| CN111129062A (en) * | 2019-12-30 | 2020-05-08 | 东莞市中晶半导体科技有限公司 | LED display module, LED display screen and manufacturing method |
| CN111326950A (en) * | 2020-03-03 | 2020-06-23 | 中国科学院半导体研究所 | Dual-wavelength tunable semiconductor laser based on electrode grating |
| CN111628057A (en) * | 2020-05-27 | 2020-09-04 | 东南大学 | Ultraviolet light-emitting diode with sub-wavelength grating reflector |
| CN112510134A (en) * | 2020-11-30 | 2021-03-16 | 中南大学 | LED indirectly modulating light polarization mode |
| CN113054074A (en) * | 2021-03-01 | 2021-06-29 | 康佳集团股份有限公司 | Mass transfer method for LED chips |
Non-Patent Citations (2)
| Title |
|---|
| R.G.HUNSPERGER等: ""集成光学导论"", 《集成光学导论》 * |
| 魏昇，王仲平: ""光学"", 《光学》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114335268A (en) * | 2022-03-17 | 2022-04-12 | 南昌凯捷半导体科技有限公司 | Method for improving mini LED bonding yield |
| CN115332400A (en) * | 2022-08-11 | 2022-11-11 | 福州大学 | Preparation method of Micro-LED chip structure based on temporary bonding technology |
| CN116759498A (en) * | 2023-08-16 | 2023-09-15 | 南昌凯捷半导体科技有限公司 | Red light micro LED chip and manufacturing method thereof |
| CN116759498B (en) * | 2023-08-16 | 2023-11-17 | 南昌凯捷半导体科技有限公司 | Red light micro LED chip and manufacturing method thereof |
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