CN106935689A - Flip-chip and preparation method thereof and lighting apparatus - Google Patents
Flip-chip and preparation method thereof and lighting apparatus Download PDFInfo
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- CN106935689A CN106935689A CN201511032059.XA CN201511032059A CN106935689A CN 106935689 A CN106935689 A CN 106935689A CN 201511032059 A CN201511032059 A CN 201511032059A CN 106935689 A CN106935689 A CN 106935689A
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- 238000002360 preparation method Methods 0.000 title abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 54
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 46
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 41
- 230000004888 barrier function Effects 0.000 claims abstract description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims description 69
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- 238000005260 corrosion Methods 0.000 claims description 5
- 230000007797 corrosion Effects 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 239000004408 titanium dioxide Substances 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 2
- 239000004744 fabric Substances 0.000 claims 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims 1
- 229910052733 gallium Inorganic materials 0.000 claims 1
- 230000003287 optical effect Effects 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 166
- 238000004528 spin coating Methods 0.000 description 36
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 28
- 229910052751 metal Inorganic materials 0.000 description 26
- 239000002184 metal Substances 0.000 description 26
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 20
- 238000005530 etching Methods 0.000 description 19
- 239000000463 material Substances 0.000 description 14
- 238000011161 development Methods 0.000 description 13
- 239000000919 ceramic Substances 0.000 description 11
- 230000000694 effects Effects 0.000 description 11
- 229910052594 sapphire Inorganic materials 0.000 description 10
- 239000010980 sapphire Substances 0.000 description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 229910052802 copper Inorganic materials 0.000 description 9
- 239000010949 copper Substances 0.000 description 9
- 239000013078 crystal Substances 0.000 description 7
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- 238000003756 stirring Methods 0.000 description 6
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 5
- 238000000137 annealing Methods 0.000 description 5
- 239000000460 chlorine Substances 0.000 description 5
- 229910052801 chlorine Inorganic materials 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
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- 230000010355 oscillation Effects 0.000 description 5
- 238000005240 physical vapour deposition Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 239000012530 fluid Substances 0.000 description 4
- 238000007654 immersion Methods 0.000 description 4
- BDERNNFJNOPAEC-UHFFFAOYSA-N propan-1-ol Chemical compound CCCO BDERNNFJNOPAEC-UHFFFAOYSA-N 0.000 description 4
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- 229910052786 argon Inorganic materials 0.000 description 2
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- 150000004767 nitrides Chemical class 0.000 description 2
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- 229910052682 stishovite Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- LDDQLRUQCUTJBB-UHFFFAOYSA-N ammonium fluoride Chemical compound [NH4+].[F-] LDDQLRUQCUTJBB-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention provides flip-chip and preparation method thereof and lighting apparatus, the flip-chip includes：Substrate, is arranged at the epitaxial layer of substrate lower surface, wherein, epitaxial layer includes：It is formed with the n type gallium nitride layer of substrate lower surface；It is formed in the multiple quantum well layer of n type gallium nitride layer lower surface；And it is formed in the p-type gallium nitride layer of n type gallium nitride layer lower surface, first reflecting layer of epitaxial layer lower surface is set, it is formed at the positive pole of epitaxial layer lower surface, through the first reflecting layer, p-type gallium nitride layer, multiple quantum well layer, and deeply to n type gallium nitride layer, and the negative pole with insulating barrier, the second reflecting layer being formed on epitaxial layer side wall and the 3rd reflecting layer being formed in base side wall on the surface contacted with epitaxial layer.The flip-chip effectively can project the light reflection projected from substrate and epitaxial layer side wall from substrate front surface, so as to improve light utilization efficiency, improve brightness and optical uniformity, uniformity.
Description
Technical field
The present invention relates to flip chip technology (fct) field, in particular it relates to flip-chip and preparation method thereof and lighting apparatus.
Background technology
Fig. 1 is the structure that now widely used flip-chip is used.The structure epitaxial layers include n type gallium nitride layer
(N-GaN), multiple quantum well layer (MQW) and p-type gallium nitride layer (P-GaN) basic structure, due to flip-chip
The mode from process for sapphire-based bottom surface (Sapphire) light extraction is used, so being also set up on p-type gallium nitride in the structure
There is the reflecting layer with high reflectance, fully all can be reflected into the downward light that quantum well layer sends by such structure
Project upwards, the concentration degree of sapphire face light extraction can be so effectively improved, so as to improve the brightness of flip-chip.
However, current flip-chip light utilization efficiency is still undesirable, still there is part light to be wasted, thus, current upside-down mounting
Chip still has much room for improvement.
The content of the invention
It is contemplated that at least solving one of technical problem in correlation technique to a certain extent.Therefore, invention of the invention
People is furtherd investigate, and inventor has found, although the blue light that multiple quantum well layer is produced in current flip-chip is by the anti-of bottom
Can be concentrated from sapphire face out after penetrating layer reflection, but inevitably still have a certain proportion of light can be from sapphire or chip
Four side walls derive, especially mostly in micrometer range more than tens to one hundred, the area of side wall shows Sapphire Substrate thickness degree
Write and be more than chip sidewall area in itself, light is more considerable derived from sapphire sidewall.And in current flip-chip only
Bottom reflector is considered without the problem in view of side wall light extraction, so this some light must in current inverted structure
So it is wasted.Meanwhile, inventor find the either ceramic fluorescent powder piece used in current Flip-Chip Using white light technique or
Person is that fluorescent powder plane paint-on technique is all to carry out covering in uniform thickness in sapphire front, is produced so from epitaxial layer
Blue light can effectively excite the positive fluorescent material of sapphire, so that white light is produced, but blue light derived from four side walls just cannot be sharp
With.On the one hand the waste of this some blue light can influence overall flip-chip to produce the brightness of white light, on the other hand due to this part
Blue light is not converted to white light by fluorescent material, but is blended in white light while inevitable, has thus had influence on white
The photochromic uniformity of light, reduces the colour rendering of white light, so that quality when influenceing flip-chip applications.Explore real by a large amount of
Trample and experimental verification repeatedly, the present inventor proposes that a kind of light utilization efficiency is high, brightness is higher, optical uniformity, one
The good flip-chip of cause property.
In view of this, in one aspect of the invention, the invention provides a kind of flip-chip.Embodiments in accordance with the present invention,
The flip-chip includes：Substrate, is arranged at the epitaxial layer of substrate lower surface, wherein, epitaxial layer includes：It is formed under substrate
The n type gallium nitride layer on surface；It is formed in the multiple quantum well layer of n type gallium nitride layer lower surface；And it is formed in multiple quantum well layer
The p-type gallium nitride layer of lower surface, is arranged on the first reflecting layer of epitaxial layer lower surface, is formed at the positive pole of epitaxial layer lower surface,
Through the first reflecting layer, p-type gallium nitride layer, multiple quantum well layer, and deeply to n type gallium nitride layer, and contacted with epitaxial layer
Side wall on there is the negative pole of insulating barrier, the second reflecting layer being formed on epitaxial layer side wall and be formed in base side wall the
Three reflecting layer.Inventor has found that flip-chip according to embodiments of the present invention will effectively can be penetrated from substrate and epitaxial layer side wall
The light for going out reflects and is projected from basal surface, so as to improve light utilization efficiency, improves brightness and optical uniformity, uniformity, Jin Ergai
The using effect of kind flip-chip.
In another aspect of this invention, the invention provides a kind of method for preparing foregoing flip-chip.According to this hair
Bright embodiment, the method includes：(1) sequentially formed on the lower surface of substrate n type gallium nitride layer, multiple quantum well layer with
And p-type gallium nitride layer, to form epitaxial layer；(2) dry etching is carried out to epitaxial layer, with formed through p-type gallium nitride layer,
Multiple quantum well layer, and deeply to the negative regions of n type gallium nitride layer；(3) the side wall in epitaxial layer forms the second reflecting layer,
And form insulating barrier on the side wall of the negative regions；(4) lower surface in epitaxial layer forms the first reflecting layer；(5) exist
The lower surface of epitaxial layer and negative regions form positive pole and negative pole respectively；(6) the side wall in substrate forms the 3rd reflecting layer.Profit
With the method, foregoing flip-chip can be fast and effeciently prepared, step is simple, easy to operate, it is easy to real
It is existing, and the light utilization efficiency of the flip-chip for preparing is more preferable, brightness and optical uniformity, uniformity are preferable.
In another aspect of the invention, the invention provides a kind of lighting apparatus.Embodiments in accordance with the present invention, the illumination sets
It is standby to include foregoing flip-chip.The lighting apparatus has whole feature and advantage of foregoing flip-chip,
This is no longer repeated one by one.
Brief description of the drawings
Fig. 1 is the structural representation of existing flip-chip.
Fig. 2 is the structural representation of flip-chip according to embodiments of the present invention.
Fig. 3 is the structural representation of flip-chip according to embodiments of the present invention.
Fig. 4 is the structural representation of flip-chip according to embodiments of the present invention.
Fig. 5 A to Fig. 5 E are respectively the structural representations by the flip-chip obtained after step (1) to (5).
Fig. 6 is the structural representation by the flip-chip obtained after step (7).
Fig. 7 A are the structural representations by the flip-chip obtained after step (8).
Fig. 7 B are the structural representations of flip-chip according to embodiments of the present invention.
Fig. 8 is the structural representation of the preceding flip-chip according to embodiments of the present invention of cutting.
Specific embodiment
Embodiments of the invention are described below in detail.The embodiments described below is exemplary, is only used for explaining the present invention,
And be not considered as limiting the invention.Unreceipted particular technique or condition in embodiment, according to document in the art
Described technology or condition are carried out according to product description.Agents useful for same or the unreceipted production firm person of instrument, are
Can by city available from conventional products.
In one aspect of the invention, the invention provides a kind of flip-chip.Embodiments in accordance with the present invention, reference picture 2,
The flip-chip includes：Substrate 1, is arranged at the epitaxial layer 2 of substrate lower surface, wherein, epitaxial layer 2 includes：It is formed in base
The n type gallium nitride layer 21 of the lower surface of bottom 1；It is formed in the multiple quantum well layer 22 of n type gallium nitride 21 lower surface of layer；And shape
Into the p-type gallium nitride layer 23 in the lower surface of multiple quantum well layer 22, the first reflecting layer 3 of the lower surface of epitaxial layer 2, shape are arranged on
Into in the positive pole 4 of the lower surface of epitaxial layer 2, through the first reflecting layer 3, p-type gallium nitride layer 23, multiple quantum well layer 22, and
Deeply to the negative pole 6 with insulating barrier 5 on n type gallium nitride layer 21, and the side wall contacted with epitaxial layer 2, extension is formed in
The second reflecting layer 7 and the 3rd reflecting layer 8 being formed on the side wall of substrate 1 on 2 side wall of layer.Inventor has found, according to this
The flip-chip of inventive embodiments effectively (can go up the light reflection projected from substrate and epitaxial layer side wall from substrate front surface
Surface) project, so as to improve light utilization efficiency, after Flip-Chip Using is white light, optical uniformity, uniformity, brightness and
Quality is significantly improved, and then substantially improves the using effect of flip-chip.
Embodiments in accordance with the present invention, reference picture 3, in order to further improve covering of second reflecting layer 7 to the side wall of epitaxial layer 2,
Ensure reflecting effect, two side walls of epitaxial layer 2 can be on direction from bottom to up away from each other.Under preferable case, outward
The vertical sectional shape for prolonging layer 2 can be inverted trapezoidal.In order to further improve reflecting effect, it is easy to processing etc., epitaxial layer 2
Vertical sectional shape is preferably isosceles trapezoid.Thus, after can launching through the second reflecting layer through light derived from epitaxial layer side wall again
By substrate front surface light extraction, brightness and optical uniformity, uniformity are improved, and then improve the quality of flip-chip.
Embodiments in accordance with the present invention, because epitaxial layer 2 can be conductive, in order to not influence the performance of flip chip,
Second reflecting layer 7 needs to be formed by insulating materials.Thereby, it is possible to not had a negative impact to flip-chip.According to the present invention
Embodiment, the second reflecting layer 7 can be Bragg reflecting layer (DBR layer).Specifically, the second reflecting layer 7 can be with
It is the DBR layer being alternatively formed by silica and titanium dioxide, arrangement period can be 2~5 pairs, every layer of thickness of silica
Degree can be 50~100nm, and every layer of thickness of titanium dioxide can be 30~70nm, and the gross thickness in the second reflecting layer 7 can be with
It is 160~850nm.Thereby, it is possible to ensure while reflecting effect, the waste of material is not resulted in, and substantially will not be to falling
Thickness, volume of cartridge chip etc. produce influence.
Embodiments in accordance with the present invention, the vertical sectional shape of the side wall of substrate 1 is not particularly limited, in some implementations of the invention
In example, reference picture 4, the vertical sectional shape of the side wall of substrate 1 can be L-shaped.Thus, it is easy to processing, easily realizes.Root
According to embodiments of the invention, the material of substrate is not particularly limited, and can be various materials commonly used in the art.In the present invention
Some embodiments in, substrate can be formed by sapphire.Embodiments in accordance with the present invention, the thickness of substrate is not also by special
Limitation, for example, include but is not limited to be 30~50 microns.Thus, be conducive to improving the quality of flip-chip.
Embodiments in accordance with the present invention, the material in the 3rd reflecting layer 8 is not particularly limited, because usual substrate is non-conductive,
Therefore the material for forming the 3rd reflecting layer 8 can be it is conductive can also be it is nonconducting, flip-chip will not be produced negative
Face rings.In some embodiments of the invention, the 3rd reflecting layer 8 is formed by metallic aluminium.Thus, reflecting effect compared with
It is good.Embodiments in accordance with the present invention, the thickness in the 3rd reflecting layer 8 is not particularly limited, in some embodiments of the invention,
The thickness in the 3rd reflecting layer 8 can be 80~150nm.Thereby it is ensured that while reflecting effect is good, not resulting in material
Waste, good economy performance, while substantially influence will not be produced on the size of flip-chip.
Embodiments in accordance with the present invention, the material and thickness in the first reflecting layer 3 are also not particularly limited, those skilled in the art
Can flexibly be selected according to actual conditions.In some embodiments of the invention, the first reflecting layer 3 can be formed by argent,
The thickness in the first reflecting layer 3 can be 80~150nm.Thus, it is possible to effectively will derived from flip-chip lower surface light it is anti-
Front light extraction is emitted back towards, light utilization efficiency is improved.
Embodiments in accordance with the present invention, as long as the material of positive pole 4 and negative pole 6 is it is not also specifically limited, electrical connection can be realized
Function, including but not limited to positive pole 4 and negative pole 6 are formed by metal Cr, Al, Ti and Au independently of one another.Thus,
Flip-chip function is good.Embodiments in accordance with the present invention, the material and thickness of the insulating barrier 5 formed on the surface of negative pole 6 do not have
Have especially limitation, for example can be identical with the second reflecting layer 7, thereby, it is possible to effectively by negative pole 6 and multiple quantum well layer 22,
P-type gallium nitride layer 23 insulate, it is ensured that flip-chip normal work.
In another aspect of this invention, the invention provides a kind of method for preparing foregoing flip-chip.According to this hair
Bright embodiment, the method is comprised the following steps：
(1) reference picture 5A, sequentially formed on the lower surface of substrate 1 n type gallium nitride layer 21, multiple quantum well layer 22 with
And p-type gallium nitride layer 23, to form epitaxial layer 2.
In this step, can by MOCVD (organic chemical vapor deposition) techniques in substrate lower surface grown epitaxial layer,
Epitaxial layer structure at least includes N-shaped nitride layer (n-GaN), multiple quantum well layer (MQW) and p-type nitride layer (p-GaN).
(2) reference picture 5B, dry etching is carried out to epitaxial layer 2, and p-type gallium nitride layer 23, MQW is run through to be formed
Layer 22, and deeply to the negative regions 9 of n type gallium nitride layer 21.
Embodiments in accordance with the present invention, negative regions 9 can be formed according to following steps：
Photoetching：On the surface of epitaxial layer 2, entered by the way that crystal column surface of the photoresist to vacuum suction on metal load plate is added dropwise
Row spin coating positive photoresist, spin coating specifically includes two steps：The first step, the rotating speed of metal load plate is 8-11rps, the time of spin coating
It is 5-10 seconds；Second step, the rotating speed of metal load plate is 30-40rps, and the time of spin coating is 25-35 seconds；Thus in epitaxial layer
Surface forms the photoresist that thickness is for 2.5-3 microns, then, the wafer that spin coating has photoresist is put into baking box and is toasted, and dries
The roasting time is 12-16 minutes, and the temperature of baking is 85-95 DEG C.Then, it is 20 joules of light source to use energy, is set
Exposure distance between wafer and photolithography plate is 60-120 microns, and the time for exposure is 6-12 seconds, and wafer is entered in exposure sources
Row exposure-processed.Wafer after exposure is carried out into development treatment in rigid solution, air stirring mode is then added using overflow
Wafer after development is washed, to remove the photoresist after exposure completely.Then, by washing after with remaining photoetching
The wafer of glue, is put into baking box and toasts again, and the time of baking is 20-30 minute, and the temperature of baking is 115-122 DEG C.
Dry etching：Exposed epitaxial layer of gallium nitride can be carried out under the protection of glue-line by ion dry etching (ICP)
Etching, etching gas can select chlorine, boron chloride, flow to control respectively in 20,8sccm, and etching Stress control exists
0.6-1Pa, RF energy 100W, Bias energy 60W, etch period about 10-15min, etching depth are controlled at 1.2-1.4 μm.
Etching uses wafer after terminating goes glue DTNS-4000, acetone and isopropanol to be cleaned, specifically, can be by band
The wafer for having photoresist layer be put into 70 degrees Celsius go in glue soak 15~30 minutes and apply supersonic oscillations, Ran Houfang
Enter in acetone immersion 10~20 minutes, be finally putting into isopropanol and soak 15~20 minutes.Etched after removing photoresist
The flip-chip of negative regions, is shown in Fig. 5 B.
(3) reference picture 5C, forms the second reflecting layer 7, and formed on the side wall of negative regions 9 in the side wall of epitaxial layer 2
Insulating barrier 5.Embodiments in accordance with the present invention, the second reflecting layer 7 and insulating barrier 5 can be formed respectively, it is also possible to while shape
Into, it is considered to operating procedure is saved, simplifies operation, the second reflecting layer 7 and insulating barrier 5 can simultaneously pass through physical vapour deposition (PVD)
Method is formed.
Embodiments in accordance with the present invention, the second reflecting layer 7 and insulating barrier 5 can be formed according to following steps：(3-1) passes through
Physical vaporous deposition forms Bragg reflecting layer on the surface of the epitaxial layer；(3-2) is carried out to the Bragg reflecting layer
Photoetching treatment, to form photoresist layer positioned at the surface of the epitaxial layer and the Bragg reflecting layer of negative regions side wall；
(3-3) carries out corrosion treatment by buffered oxide etch method, the glug reflecting layer to not protected by the photoresist layer, with
The glug reflecting layer that removal is not protected by the photoresist layer；(3-4) is utilized and is gone glue DTNS-4000 to remove the photoresist
Layer.Thus, it is possible to form the second reflecting layer 7 and insulating barrier 5 simultaneously, step is simple, while step is less, not only operates
It is convenient, and efficiency is higher.
In a specific example of the invention, the second reflecting layer 7 and insulating barrier 5 can be in accordance with the following steps formed：
1. the thin film deposition of DBR layer, DBR layer are carried out using PVD (physical vapour deposition (PVD)) mode in epi-layer surface
Structure is SiO2/TiO2The alternating deposit of film, arrangement period is 2-5 pairs, SiO2Thickness is 50-100nm, TiO2Thickness
It is 30-70nm；
2. DBR surfaces after deposit carry out photoetching process, and concrete technology step is as follows：On DBR layer surface, by drop
Plus crystal column surface of the photoresist to vacuum suction on metal load plate carries out spin coating positive photoresist, spin coating specifically includes two
Step：The first step, the rotating speed of metal load plate is 8-11rps, and the time of spin coating is 5-10 seconds；Second step, the rotating speed of metal load plate
It is 60-75rps, the time of spin coating is 25-35 seconds；Thus the photoresist that thickness is for 1.5-2 microns is formed on DBR surfaces.
Then, the wafer that spin coating has photoresist is put into baking box and is toasted, the time of baking is 12-16 minutes, the temperature of baking
It it is 85-95 DEG C, then, it is 20 joules of light source to use energy, sets the exposure distance between wafer and photolithography plate for 60-120
Micron, the time for exposure is 6-12 seconds, and wafer is exposed treatment in exposure sources, next, by the wafer after exposure
Development treatment is carried out in rigid solution, then adds air stirring mode to wash the wafer after development using overflow, with
Remove the photoresist after exposure completely, by washing after the wafer with remaining photoresist, be put into baking box and toast again,
The time of baking is 20-30 minutes, and the temperature of baking is 115-122 DEG C.
3. (buffered oxide etch) technique, HF in BOE are corroded by BOE：NH4F compositions ratio is 1:6, BOE
With pure water by volume 1:3 preparations are used, and BOE solution is not carved front completely by the DBR layer that PR (photoresist) is protected
Erosion, and four the week side of boss walls and negative regions DBR layer are then remained, and form insulating barrier 5, for follow-up negative metal electrode
And insulation cut-off is formed between P-GaN layers.
4. using wafer after corrosion terminates goes glue DTNS-4000, acetone and isopropanol to be cleaned.It is specific as follows：Will
Wafer with photoresist layer is put into 80 degree and goes to be soaked in glue and 15~30 minutes and apply supersonic oscillations, is then placed in
Soaked 10~20 minutes in acetone, be finally putting into isopropanol and soak 15~20 minutes, obtain having shown in Fig. 5 C
Second reflecting layer 7 and the flip chip structure of insulating barrier 5.
(4) reference picture 5D, the first reflecting layer 3 is formed in the lower surface of epitaxial layer 2.
Embodiments in accordance with the present invention, the forming method in the first reflecting layer 3 is not particularly limited, and can use known in the art
Any method.In some embodiments of the invention, the first reflecting layer 3 can be formed by electron beam evaporation methods.
In a specific example of the invention, the first reflecting layer 3 can be in accordance with the following steps formed：
1., using electron beam evaporation plating machine in P-GaN surfaces metal reflective layer silver, embryo deposit Stress control is in 2.5*10e-6
Torr, sedimentation rate control is controlled in 80~150nm in 0.3-0.5nm/s, the control of umbrella rotating speed in 10~12rpm, deposit thickness.
2. need to carry out photoetching and etching after depositing, reserve the first interval of the reflecting layer 3 with the edge of epitaxial layer 2 and positive negative electricity
The position of pole 4 and 6, prevents leakage current.Concrete operations are as follows：On the surface of the first reflecting layer 3, arrived by the way that photoresist is added dropwise
Crystal column surface of the vacuum suction on metal load plate carries out spin coating positive photoresist, and spin coating specifically includes two steps：The first step,
The rotating speed of metal load plate is 8-11rps, and the time of spin coating is 5-10 seconds；Second step, the rotating speed of metal load plate is 60-75rps,
The time of spin coating is 25-35 seconds；Thus the photoresist that thickness is for 1.5-2 microns is formed on the surface of the first reflecting layer 3.By spin coating
The wafer for having photoresist is toasted in being put into baking box, and the time of baking is 12-16 minutes, and the temperature of baking is 85-95 DEG C.So
Afterwards, it is 20 joules of light source to use energy, sets the exposure distance between wafer and photolithography plate for 60-120 microns, exposure
Time is 6-12 seconds, and wafer is exposed treatment in exposure sources.Wafer after exposure is shown in rigid solution
Shadow treatment, then adds air stirring mode to wash the wafer after development using overflow, to remove the light after exposure completely
Photoresist.To be put into baking box and toast again after washing with the wafer of remaining photoresist, the time of baking is 20-30 points
Clock, the temperature of baking is 115-122 DEG C.
3. ITO etchant solutions are used, 35 degrees Celsius are heated to, corrodes 3-5min, the first reflecting layer that will do not protected by PR
After 3 etch completely, QDR (arranging flushed channel soon) washings are checked.
4. using wafer after corrosion terminates goes glue DTNS-4000, acetone and isopropanol to be cleaned.Will be with photoresist
The wafer of layer is put into 80 degrees Celsius and goes to be soaked in glue and 15~30 minutes and apply supersonic oscillations, is then placed in acetone
Immersion 10~20 minutes, is finally putting into isopropanol and soaks 15~20 minutes, obtains structure shown in Fig. 5 D.
(5) reference picture 5E, positive pole 4 and negative pole 6 are formed in the lower surface of epitaxial layer 2 and negative regions 9 respectively.
Embodiments in accordance with the present invention, positive pole and negative pole can be formed by electron beam evaporation methods.In one of the invention tool
In body example, can carry out in accordance with the following steps：
1. on the above-mentioned surface of first reflecting layer 3, by the way that crystal column surface of the photoresist to vacuum suction on metal load plate is added dropwise,
To carry out spin coating negative photoresist, spin coating specifically includes two steps：The first step, the rotating speed of metal load plate is 8-11rps, spin coating
Time is 5-10 seconds；Second step, the rotating speed of metal load plate is 50-65rps, and the time of spin coating is 25-35 seconds；Thus
The surface of one reflecting layer 3 forms the photoresist that thickness is 3 microns.The wafer that spin coating has photoresist is put into baking box and is toasted,
The time of baking is 12-16 minutes, and the temperature of baking is 85-95 DEG C.It is 20 joules of light source to use energy, sets wafer
Exposure distance and photolithography plate between is 60-120 microns, and the time for exposure is 6-12 seconds, and wafer is exposed in exposure sources
Light treatment.To be put into baking box and toast again after exposure with the wafer of remaining photoresist, the time of baking is 3-8 points
Clock, the temperature of baking is 105-115 DEG C.Wafer after exposure is carried out into development treatment in rigid solution, then using overflow
Plus air stirring mode is washed to the wafer after development, to remove the photoresist after exposure completely.
2. electrode deposition：Metal Cr, Al, Cr, Ti, Au, deposition pressure are sequentially depositing on surface using electron beam evaporation plating machine
Control is in 5*10e-6Torr, sedimentation rate is controlled 0.2 respectively, 3,0.4,0.6,3nm/s, the rotating speed control of evaporation umbrella exists
10~12rpm, thickness of electrode is controlled at 1.5 μm.By wafer using removing glue DTNS-4000, acetone and different after the completion of deposition
Propyl alcohol is cleaned, specifically, by with photoresist layer wafer be put into 80 degrees Celsius go in glue soak 15~30 points
Clock simultaneously applies supersonic oscillations, is then placed in being soaked 10~20 minutes in acetone, is finally putting into immersion 15~20 in isopropanol
Minute.The metal being attached in this step on the photoresist departs from also with the removal of photoresist, so as to obtain special electrodes
Structure (positive pole 4 and negative pole 6).
3. align positive electrode layer (4 and 6) using annealing furnace to be made annealing treatment, be annealed into nitrogen atmosphere, N2Flow 30-50
L/min, at 240-350 degrees Celsius, annealing time is controlled in 8-12min for annealing temperature control.Fig. 5 E are obtained after being cooled down after annealing
Shown structure.
(6) reference picture 2, the 3rd reflecting layer 8 is formed in the side wall of substrate 1.
Embodiments in accordance with the present invention, the 3rd reflecting layer 8 can be formed by electron beam evaporation methods.At one of the invention
In specific example, can carry out in accordance with the following steps：
Using electron beam evaporation plating machine in substrate surface metal reflective layer aluminium, embryo deposit Stress control is in 2.5*10e-6Torr,
Sedimentation rate control is controlled in 80~150nm, obtained in 0.3-0.5nm/s, the control of umbrella rotating speed in 10~12rpm, deposit thickness
To structure shown in Fig. 2.
Inventor has found, using the method according to embodiments of the present invention, can fast and effeciently prepare foregoing
Flip-chip, step is simple, easy to operate, it is easy to accomplish, and the light utilization efficiency of the flip-chip for preparing is more preferable, it is bright
Degree and optical uniformity, uniformity are preferable, and chip package is that the brightness after white light and quality are obviously improved.
In other embodiments of the invention, in order to further improve covering of second reflecting layer 7 to epitaxial layer side wall, protect
Card reflecting effect, reference picture 6 after above-mentioned steps (1), before step (2), may further include step (7)：
Photoetching and dry etching are carried out to epitaxial layer 2 so that two side walls of epitaxial layer 2 on direction from bottom to up away from each other.
In a specific example of the invention, the side wall construction of epitaxial layer 2 is realized using the technique of photoetching and ICP dry etchings, had
Body process is as follows：Surface spin coating photoresist (PR) and must be using thick glue, thick glue is by being easier control glue in itself after photoetching
Shape, while also have stronger resistance to dry etching performance, this have the advantage that：The follow-up quarter to GaN epitaxial layer
The angle that erosion can form figure according to photoresist is performed etching, it is ensured that the accurate transmission of figure.In this embodiment, epitaxial layer
2 vertical sectional shape is inverted trapezoidal, that is, form inverted trapezoidal porch side walls, can be implemented according to following processing step and condition：
A. spin coating photoresist, spin coating positivity is carried out by the way that crystal column surface of the photoresist to vacuum suction on metal load plate is added dropwise
Photoresist, spin coating specifically includes two steps：The first step, the rotating speed of metal load plate is 8-11rps, and the time of spin coating is 5-10 seconds；
Second step, the rotating speed of metal load plate is 15-25rps, and the time of spin coating is 25-35 seconds；Thus forming thickness in extension aspect is
9-10 microns of photoresist.B. photoresist front baking, 30min is toasted at a temperature of 110 degree, the solvent in PR is volatilized.C. make
Ultraviolet exposure is carried out with litho machine, process conditions are：Energy 15-20mJ, 250 μm of exposure distance, time for exposure 8-12s.
D. figure development：Control developing time at 300 seconds using specific developer solution, under normal temperature, then QDR is washed and checked
Development effect.E. dried after photoresist, 20min is toasted at a temperature of 110 degree, promote the photochemical reaction of PR, preferably formed
Special pattern.F. exposed GaN epitaxial layer is performed etching under the protection of glue-line using dry plasma etch (ICP),
Etching gas select chlorine, argon gas, gas flow to control respectively in 40,5sccm, and etching Stress control is in 0.6-1Pa, RF
Energy 120W, Bias energy 80W, etch period about 50-85min, etching depth is controlled at 5.2-6.4 μm.Etching process
Middle chlorine mainly chemically reacts, and argon gas plays physical bombardment, and physical bombardment is vertical direction effect, and chlorine can be along
Diffusion chemically reacts the trapezoidal Sidewall angles of compound protective layer with GaN downwards.Etching terminate after using removing glue and acetone
By remaining PR removals, go glue to be heated to 80 degrees centigrade, soak 15~30min.Acetone is heated to 45 degrees Celsius, leaching
10~20min of bubble, obtains the flip-chip with trapezoidal hypotenuse side wall construction after removing photoresist, structure is shown in Fig. 6.Other steps are (i.e.
Step (1)-(6)) it is same as above, finally obtain flip chip structure as shown in Figure 3.
Embodiments in accordance with the present invention, for the ease of processing and implementing, the vertical sectional shape that can cause the side wall of substrate 1 is L
Shape, therefore, after above-mentioned steps (5), before step (6), may further include step (8)：To substrate 1
Polishing is ground, and photoetching and dry etching are carried out to substrate 1, so that the vertical sectional shape of the side wall of substrate 1 is L
Shape.In a specific example of the invention, can carry out in accordance with the following steps：
1. using polishing grinding equipment that substrate 1 is thinning, the technique of grinding and polishing specifically includes following steps：With the base of wafer
Bottom surface is fixed in ceramic disk center upward, remain coolant spray, by diamond wheel rotate advance to substrate (
Claim substrate) it is ground removal；Apply wafer substrate and polishing that pressure makes to be fixed on ceramic disk to the ceramic disk after grinding
Copper dish contact in equipment, interval sprinkling polishing fluid is in the same direction with ceramic disk by copper dish or rotate backward substrate is thrown
Light；Wherein, it can be seen from abovementioned steps, wafer is faced up with substrate and is fixed on ceramic disk center, when ceramic disk sets with polishing
When copper dish in standby are contacted, the substrate of wafer will with copper dish surface and be sprayed at the polishing fluid on copper dish surface and contact, by copper
Disk is in the same direction with ceramic disk or rotates backward, and the substrate of wafer will be with the polishing fluid friction on copper dish surface, until substrate is subtracted
Thin completion.Under preferable case, in this step, the rotating speed of emery wheel is 400-500rpm, the pace 0.6-0.8 of emery wheel
Micro- meter per second；The rotating speed of copper dish is 60-80rpm, and the rotating speed of ceramic disk is 30-50rpm, and polishing fluid sprayed every 15-20 seconds
1-3 seconds, the pressure applied to ceramic disk was 5-8Kg, for example, ceramic disk can be pressed in copper dish by the counterweight of 5Kg；Adopt
With foregoing burnishing parameters, it is possible to achieve the thickness of polishing per minute is 2 microns, and substrate is thinned into thickness according to the above method
It is 30-50 microns.
2. it is above-mentioned it is thinning after substrate surface, by the way that crystal column surface of the photoresist to vacuum suction on metal load plate is added dropwise,
To carry out spin coating positive photoresist, spin coating specifically includes two steps：The first step, the rotating speed of metal load plate is 8-11rps, spin coating
Time is 5-10 seconds；Second step, the rotating speed of metal load plate is 10-20rps, and the time of spin coating is 25-35 seconds；Thus in table
Face forms the photoresist that thickness is for 12-15 microns.The wafer that spin coating has photoresist is put into baking box and is toasted, baking when
Between be 22-32 minute, the temperature of baking is 95-110 DEG C.It is 20 joules of light source to use energy, sets wafer and photolithography plate
Between exposure distance be 60-120 micron, the time for exposure be 9-18 seconds, wafer is exposed treatment in exposure sources.
Wafer after the exposure is carried out into development treatment in rigid solution, after then adding air stirring mode to development using overflow
Wafer washed, with remove completely exposure after photoresist.The wafer with remaining photoresist after by washing, is put into
Toasted again in baking box, the time of baking is 20-30 minutes, the temperature of baking is 115-125 DEG C.
3. using dry etching (ICP) exposed basalis is performed etching under the protection of glue-line, etching gas from chlorine,
Boron chloride, flow is controlled in 50,30sccm respectively, and etching Stress control is in 0.6-1Pa, RF energy 180W, Bias
Energy 120W, etch period about 60-85min.Etching terminate after by wafer using removing glue DTNS-4000, acetone and different
Propyl alcohol is cleaned, specially by with photoresist layer wafer be put into 70 degrees Celsius go in glue soak 15~30 minutes
And apply supersonic oscillations, and it is then placed in being soaked 10~20 minutes in acetone, it is finally putting into 15~20 points of immersion in isopropanol
Clock.Obtain etching the substrate of L-shaped side wall after removing photoresist, Fig. 7 A seen by the flip chip structure obtained after the step (8),
Other steps (i.e. step (1)-(6)) are carried out as described above, finally give flip-chip as shown in Figure 7 B.
According to a preferred embodiment of the invention, in order to obtain preferable reflecting effect, and simple processing, it is easy to accomplish, can
Processed with the side wall both to epitaxial layer 2, but side wall to substrate 1 is processed, thus, by step (1)-(8),
The flip-chip shown in Fig. 4 can be obtained.
In addition it is also necessary to explanation, in large-scale industrial production, is typically with the material of big while carrying out
The preparation of multiple flip-chips, in this case, it is only that the method for preparing flip-chip of the invention also includes that cutting is obtained
The step of vertical flip-chip, specifically, by taking the flip-chip shown in Fig. 4 as an example, after the 3rd reflecting layer 8 is formed, can
To proceed photoetching and etching, to reserve interval 10 between two neighboring flip-chip, separated for follow-up cutting.
Reference picture 8, concrete technology is as follows：
On the surface of substrate 1, spin coating is being carried out just by the way that crystal column surface of the photoresist to vacuum suction on metal load plate is added dropwise
Property photoresist, spin coating specifically includes two steps：The first step, the rotating speed of metal load plate is 8-11rps, and the time of spin coating is 5-10
Second；Second step, the rotating speed of metal load plate is 60-75rps, and the time of spin coating is 25-35 seconds；Thus forming thickness on surface is
1.5-2 microns of photoresist.The wafer that spin coating has photoresist is put into baking box and is toasted, the time of baking is 12-16 minutes,
The temperature of baking is 85-95 DEG C.Energy is used for 20 joules of light source, the exposure distance set between wafer and photolithography plate is
60-120 microns, the time for exposure is 6-12 seconds, and wafer is exposed treatment in exposure sources.Wafer after exposure is existed
Development treatment is carried out in rigid solution, then adds air stirring mode to wash the wafer after development using overflow, with complete
The full photoresist removed after exposure.The wafer with remaining photoresist after by washing, is put into baking box and toasts again, institute
The time for stating baking is 20-30 minutes, and the temperature of baking is 115-122 DEG C.Then, using ITO etchant solutions, it is heated to
35 degrees Celsius, corrode 3-5min, the 3rd reflecting layer between the two neighboring flip-chip of substrate front surface is etched away completely, shape
At interval 10, and QDR washings check.Wafer is used and removes glue DTNS-4000, acetone and isopropanol by corrosion after terminating
Cleaned.By the wafer with photoresist layer be put into 80 degrees Celsius go in glue soak 15~30 minutes and apply ultrasound
Ripple vibrates, and is then placed in soaking 10~20 minutes in acetone, is finally putting into isopropanol and soaks 15~20 minutes, obtains figure
Flip-chip shown in 8.Then, it is cut by laser using the center of laser cutting machine alignment spaces 10, laser energy
In 80-100%, cutting speed is maintained at 8-15mm/s, depth of cut 15-25 microns for amount control.After the completion of cutting, by
The knife that collapses of equipment of bursting apart carries out physical separation along the cutting trace that laser cutting is formed, and finally gives the flip-chip knot shown in Fig. 4
Structure.
In another aspect of the invention, the invention provides a kind of lighting apparatus.Embodiments in accordance with the present invention, the illumination sets
It is standby to include foregoing flip-chip.The lighting apparatus has whole feature and advantage of foregoing flip-chip,
This is no longer repeated one by one.
Embodiments in accordance with the present invention, the specific species of the lighting apparatus is not particularly limited, for example including but not limited to automobile
Headlight, general lighting lamp etc..
In the description of the invention, it is to be understood that term " first ", " second " are only used for describing purpose, without being understood that
To indicate or implying relative importance or the implicit quantity for indicating indicated technical characteristic.Thus, " first ", " are defined
Two " one or more this feature can be expressed or be implicitly included to feature.In the description of the invention, " multiple "
Two or more are meant that, unless otherwise expressly limited specifically.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specific example ",
Or the description of " some examples " etc. means to combine specific features, structure, material or feature bag that the embodiment or example are described
It is contained at least one embodiment of the invention or example.In this manual, to the schematic representation of above-mentioned term necessarily
It is directed to identical embodiment or example.And, the specific features of description, structure, material or feature can be any
Combined in an appropriate manner in individual or multiple embodiments or example.Additionally, in the case of not conflicting, the skill of this area
Can be combined for the feature of the different embodiments or example described in this specification and different embodiments or example by art personnel
And combination.
Although embodiments of the invention have been shown and described above, it is to be understood that above-described embodiment be it is exemplary,
It is not considered as limiting the invention, one of ordinary skill in the art within the scope of the invention can be to above-described embodiment
It is changed, changes, replacing and modification.
Claims (14)
1. a kind of flip-chip, it is characterised in that including：
Substrate；And
Epitaxial layer, the epitaxial layer includes：
N type gallium nitride layer, the n type gallium nitride layer is formed in the lower surface of the substrate；
Multiple quantum well layer, the multiple quantum well layer is formed in the lower surface of the n type gallium nitride layer；
P-type gallium nitride layer, the p-type gallium nitride layer is formed in the lower surface of the multiple quantum well layer；
First reflecting layer, the reflecting layer is formed in the lower surface of the p-type gallium nitride layer；
Positive pole, the positive pole is formed in the lower surface of the p-type gallium nitride layer；
Negative pole, the negative pole runs through first reflecting layer, p-type gallium nitride layer, multiple quantum well layer, and deeply to the N
There is insulating barrier on type gallium nitride layer, and the side wall that is contacted with the epitaxial layer of the negative pole,
Second reflecting layer, second reflecting layer is formed on the side wall of the epitaxial layer；
3rd reflecting layer, the 3rd reflecting layer is formed on the side wall of the substrate.
2. flip-chip according to claim 1, it is characterised in that two side walls of the epitaxial layer are from bottom to up
Direction on away from each other.
3. flip-chip according to claim 2, it is characterised in that the longitudinal section of the epitaxial layer is shaped as down ladder
Shape.
4. flip-chip according to claim 1, it is characterised in that the vertical sectional shape of the base side wall is L-shaped.
5. flip-chip according to claim 1, it is characterised in that first reflecting layer and the 3rd reflecting layer
Thickness be each independently 80~150nm.
6. flip-chip according to claim 1, it is characterised in that second reflecting layer is formed by insulating materials.
7. flip-chip according to claim 1, it is characterised in that second reflecting layer and the insulating barrier are cloth
Glug reflecting layer, the Bragg reflecting layer is formed by silica and titanium dioxide.
8. flip-chip according to claim 1, it is characterised in that the thickness of second reflecting layer and the insulating barrier
Degree is each independently 160~850nm.
9. flip-chip according to claim 1, it is characterised in that the 3rd reflecting layer is formed by metallic aluminium.
10. a kind of method for preparing the flip-chip any one of claim 1-9, it is characterised in that including：
(1) n type gallium nitride layer, multiple quantum well layer and p-type gallium nitride layer are sequentially formed on the lower surface of substrate, with
Form epitaxial layer；
(2) dry etching is carried out to the epitaxial layer, to form negative regions, the negative regions nitrogenize through the p-type
Gallium layer, multiple quantum well layer, and deeply to n type gallium nitride layer；
(3) the side wall in the epitaxial layer forms the second reflecting layer, and forms insulating barrier on the side wall of the negative regions；
(4) lower surface in the epitaxial layer forms the first reflecting layer；
(5) positive pole and negative pole are formed respectively in the lower surface of the epitaxial layer and the negative regions；
(6) the side wall in the substrate forms the 3rd reflecting layer.
11. methods according to claim 10, it is characterised in that after step (1), before step (2),
Further include：
(7) photoetching and dry etching are carried out to the epitaxial layer, so that two side walls of the epitaxial layer are in side from bottom to up
Upwards away from each other.
12. methods according to claim 10, it is characterised in that after step (5), before step (6),
Further include：
(8) polishing is ground to the substrate, and photoetching and dry etching is carried out to the substrate, so that the base
The vertical sectional shape of downside wall is L-shaped.
13. methods according to claim 10, it is characterised in that step (3) is further included：
(3-1) forms Bragg reflecting layer by physical vaporous deposition on the surface of the epitaxial layer；
(3-2) carries out photoetching treatment to the Bragg reflecting layer, with the cloth positioned at the epitaxial layer and negative regions side wall
The surface in glug reflecting layer forms photoresist layer；
(3-3) carries out corrosion treatment by buffered oxide etch method, the glug reflecting layer to not protected by the photoresist layer,
To remove the glug reflecting layer do not protected by the photoresist layer；
(3-4) is utilized and is gone glue DTNS-4000 to remove the photoresist layer.
A kind of 14. lighting apparatus, it is characterised in that including：
Flip-chip any one of claim 1-9.
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| CN112201738A (en) * | 2020-11-03 | 2021-01-08 | 厦门士兰明镓化合物半导体有限公司 | Preparation method of flip LED chip |
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