CN104300048B

CN104300048B - Manufacturing method for GaN-based light-emitting diode chip

Info

Publication number: CN104300048B
Application number: CN201410594339.9A
Authority: CN
Inventors: 刘岩; 马玉玲; 彭璐; 徐现刚
Original assignee: Shandong Inspur Huaguang Optoelectronics Co Ltd
Current assignee: Shandong Inspur Huaguang Optoelectronics Co Ltd
Priority date: 2014-10-29
Filing date: 2014-10-29
Publication date: 2017-02-15
Anticipated expiration: 2034-10-29
Also published as: CN104300048A

Abstract

A manufacturing method for a GaN-based light-emitting diode chip includes the following steps that (1), a mesa structure is formed through dry etching from a p-type GaN layer to an n-type GaN layer of a GaN-based epitaxial wafer, a mesa is manufactured on the n-type GaN layer, and photoresist remaining on the surface is removed; dry etching is ICP etching and includes the two steps that 1, Cl2 and BCl2 are adopted as etching gas for etching the GaN-based epitaxial wafer; 2, O2 is adopted for removing the remaining photoresist; (2), an ITO transparent conducting film grows on the surface of the p-type GaN layer; (3), a p-type electrode and an n-type electrode are manufactured on the ITO transparent conducting film and the mesa of the n-type GaN layer respectively; (4), a passivation layer is manufactured on the surface of the GaN-based light-emitting diode chip. According to the method, the step of removing the photoresist through O2 plasmas is added in ICP etching, the remaining photoresist can be removed thoroughly, cleanness of the surface of the chip is ensured, the technological process is simplified, and the production cycle is shortened.

Description

A kind of preparation method of GaN base light emitting chip

Technical field

The present invention relates to a kind of preparation method of GaN base light emitting chip, belong to photoelectron technical field.

Background technology

GaN, InN, AlN etc. have III-V race's semi-conducting material of symmetrical hexagonal system structure, are all direct gaps, because This is very suitable for the material as luminescent device, the wherein difference according to composition, can obtain energy gap from 6.5eV to The ternary of 0.7eV or quaternary compound semiconductor, corresponding emission wavelength covers DUV to the wave band model of far red light Enclose.Because this feature of GaN row quasiconductor is so that GaN row semi-conducting material is widely used in the phototubes such as LED and LD On part.

Early stage is mismatched so that GaN row blue green light LED extension is given birth to due to the lattice paprmeter of GaN crystal and growth substrates Differ greatly compared with long quality yellow light LED red with GaAs series, until GaN blue green light LED structure growth is blue precious in (0001) So that the dream that the mankind have all-colour LED is achieved on stone lining bottom.With respect to other substrate such as Si, SiC, Sapphire Substrate Have the advantages that stability height, technology maturation, high mechanical strength, cost performance are high, therefore remained using Sapphire Substrate and send out now The main flow of optical diode industry.

Because Sapphire Substrate is nonconducting, therefore it is necessary for LED in the preparation of GaN base LED chip Remove portion of material from surface to heavily doped N-shaped GaN, and preparation p-type and n-type electrode in p-type and N-shaped GaN material respectively. The chemical bonding of GaN can be higher, and it is substantially chemically inert that high combination can make III group nitride material with broad-band gap, normal Do not corroded by solution such as chemical bronsted lowry acids and bases bronsted lowries under temperature, with the materials such as chemical corrosion method corrosion GaN, either corrosion rate or corruption The anisotropy of erosion is all unsatisfactory.Therefore it is necessary for adopting dry etching technology in the preparation of GaN base LED chip, The dry etching method of main flow is that ICP (Inductive Coupled Plasma, inductively coupled plasma) etches at present.

In ICP etching process, the gas that ICP etching apparatus within the chamber is passed through in the presence of high-frequency radio frequency source can be formed Gas ions, can bombard wafer surface in the presence of built in field and etch GaN epitaxial layer with the effect of physics, formed is former simultaneously Son group can etch GaN epitaxial layer with chemical action.In ICP etching process, the temperature of wafer surface can raise, and makes wafer surface Photoresist after photoresist changes and leads to ICP etching is very difficult to remove.And photoresist removes and thoroughly can not lead to follow-up core The quality problems such as power down pole, difficult bonding wire occur after the completion of piece preparation, typically can increase by step O after degumming process₂Plasma Body cleaning, to ensure chip surface noresidue glue, but is to increase O₂Plasma cleaning process can extend manufacture cycle, and increases Plus production cost.

Content of the invention

The deficiency existing for existing ICP lithographic technique, the present invention proposes a kind of noresidue glue, technological process simplifies The preparation method of GaN base light emitting chip.

The preparation method of the GaN base light emitting chip of the present invention, comprises the following steps：

(1) upper surface in the p-type GaN layer of GaN base epitaxial wafer applies positive photoresist, carries out photoetching to positive photoresist, Make the figure of required mesa structure by lithography；Figure according to mesa structure passes through dry etching along p-type GaN of GaN base epitaxial wafer Layer etches mesa structure to n-type GaN layer, prepares table top in n-type GaN layer, removes the photoresist of remained on surface simultaneously；Institute State dry etching to etch for ICP, etching process includes two steps, and the first step adopts Cl₂And BCl₂For etching gas, etch outside GaN base Prolong layer to n-type GaN layer, second step adopts O₂As etching gas, remove the photoresist of residual；Through dry etching, not only complete Become the making of mesa structure figure, and surface clean is clean, can directly carry out the ITO growth of next step；

(2) in one layer of ITO of superficial growth (Indium Tin Oxide, the tin indium oxide) nesa coating of p-type GaN layer；

(3) p-type electrode and n-type electrode are prepared on the table top of ITO nesa coating and n-type GaN layer respectively；

(4) passivation layer is made on GaN base light emitting chip surface.

In described step (1), the thickness of the applied positive photoresist of upper surface of p-type GaN layer is 2-6 μm.

In described step (1), the first step of etching process adopts Cl₂/BCl₂For etching gas, 50-100sccm/5- 20sccm, 2-8mTorr, RF Power1 200-500W, RF Power2 100-300W, temperature 0-20 DEG C.

In described step (1), the second step of etching process adopts O₂For etching gas, 20-80sccm, 5-20mTorr, RF1200-800W, RF250-300W, temperature 0-20 DEG C.

The thickness of the ITO nesa coating of described step (2) is 1000-3000 angstrom.

In described step (4), the passivation layer thickness of the upper surface deposition of GaN base light emitting chip is

In described step (4), passivation layer is silicon oxide film.

The present invention passes through to increase by step O after the GaN etch step in conventional ICP etching technics₂Plasma goes Except the step of photoresist, eliminate removing photoresist in GaN base light emitting chip fabrication process and plasma cleaning step, letter Change technological process, shorten the production cycle.Increased O₂The step that plasma removes photoresist, can thoroughly remove residual Photoresist it is ensured that chip surface is clean, it is to avoid the quality problems such as power down pole, difficult bonding wire occur in subsequent technique.

Brief description

Fig. 1 is the GaN base epitaxial wafer schematic diagram with mesa structure that step in the present invention (1) is obtained.

Fig. 2 is that step of the present invention (2) is obtained the GaN base epitaxial wafer schematic diagram with nesa coating.

Fig. 3 is that step of the present invention (3) is obtained the GaN base epitaxial wafer schematic diagram with metal electrode.

Fig. 4 is that the step (4) in the present invention is obtained the GaN base epitaxial wafer schematic diagram with passivation layer.

In figure：1st, p-type GaN layer, 2, quantum well layer, 3, n-type GaN layer, 4, nesa coating, 5, metal electrode, 6, passivation Layer.

Specific embodiment

The preparation method of the GaN base light emitting chip of the present invention is it is adaptable to the GaN base of the Sapphire Substrate of formal dress is sent out Luminous diode chip, comprises the following steps that：

(1) 2-6 μm (preferably 3 μm) thick positive-tone photo are applied in the upper surface of the p-type GaN layer 1 of GaN base epitaxial wafer first Glue, carries out photoetching by be aligned, exposure, development, baking step to described positive photoresist, makes by lithography and is available for follow-up ICP etching Go out the figure of mesa structure.Toasted 1 minute -2 minutes at 98 DEG C using hot plate and be aligned, then expose 5 under ultraviolet light Seconds -20 seconds, then developed 10 seconds -30 seconds using Tetramethylammonium hydroxide after drying, toast 1-2 minute at 98 DEG C using hot plate.

As shown in figure 1, utilizing ICP dry etching method, arrive N-shaped along the p-type GaN layer 1 of GaN base epitaxial wafer, quantum well layer 2 GaN layer 3 etches mesa structure, removes the photoresist of remained on surface simultaneously.

Concrete ICP etching process is divided into two steps, and the first step adopts Cl₂/BCl₂For etching gas, 50-100sccm/5- 20sccm, 2-8mTorr, RF Power1 200-500W, RF Power2 100-300W, temperature 0-20 DEG C, outside etching GaN base Prolong piece；Preferably 80sccm/10sccm, 6mTorr, RF Power1 300W, RF Power2 200W, 10 DEG C of temperature.

Second step adopts O₂For etching gas, 20-80sccm, 5-20mTorr, RF1 200-800W, RF250-300W, temperature 0-20 DEG C of degree, removes the photoresist of residual；Preferably 50sccm, 15mTorr, RF1 500W, RF2 100W, 10 DEG C of temperature.

(2) as shown in Fig. 2 depositing one layer of ITO nesa coating 4 on the surface of p-type GaN layer 1.Concretely comprise the following steps：First, Using electron beam evaporation method GaN base epitaxial wafer upper surface (deposit ITO on the surface of whole epitaxial wafer here, after logical Cross photoetching, the ITO outside erosion removal p-GaN, final result is to deposit ITO on p-type GaN layer surface) one layer of deposition 1000-3000 angstrom of ITO nesa coating is as current extending；Secondly, the positivity of 2 μ m-thick is coated on current extending Photoresist, then carries out photoetching by be aligned, exposure, development, drying, corrosion step to described positive photoresist, only makes by lithography Retain corresponding ITO nesa coating in p-type GaN layer, wherein toast 1-2 minute be aligned, Ran Hou at 98 DEG C using hot plate Expose the 5-20 second under ultraviolet, then developed the 10-30 second using Tetramethylammonium hydroxide after drying, toasted at 98 DEG C using hot plate 1-2 minute, puts in the HCl solution that concentration is 25-30wt% and corrodes 15-30 minute, erode and do not protected by positive photoresist ITO nesa coating, put into ultrasonic 5-10 minute in acetone, then in ethanol ultrasonic 10 minutes, after taking-up using go from Sub- water rinses 10 minutes, and then removes the photoresist on GaN base epitaxial wafer surface.

(3) as shown in figure 3, preparing metal electrode 5, that is, respectively in the platform of ITO nesa coating 4 and n-type GaN layer 3 On face, preparation p-type electrode and n-type electrode, obtain GaN base light emitting chip.

Concrete grammar is：The negative photoresist of 3.5 μ m-thick is coated on the GaN base epitaxial wafer after processing through step (2), enters Row be aligned, exposure, development, photoetching is carried out to described negative photoresist after baking step, wherein toast 1-2 at 98 DEG C with hot plate Minute be aligned, is then exposed the 5-20 second under ultraviolet light, then is developed the 10-30 second using Tetramethylammonium hydroxide after drying, use Hot plate toasts 1-2 minute at 98 DEG C, makes p-type electrode and n-type electrode area in ITO nesa coating 4 and n-type GaN layer 3 by lithography Domain；Finally deposit the Cr metal level of 2 μ m-thick respectively in described p-type electrode zone and n-type electrode region using electron-beam vapor deposition method With Au metal level, after peeling off negative photoresist, obtain type-p metal electrode and N-shaped metal electrode.

(4) as shown in figure 4, prepared by passivation layer 6 to the GaN base light emitting chip obtained by step (3)

Deposit one layer using PECVD (chemical vapour deposition technique) in the upper surface of GaN base light emitting chip first Silicon oxide film as passivation layer 6 (exposing metal electrode 5), then the surface in passivation layer 6 coats 2 μm Positive photoresist, toast 1-2 minute be aligned at 98 DEG C using hot plate, then expose the 5-20 second under ultraviolet light, then dry Developed the 10-30 second using Tetramethylammonium hydroxide afterwards, toast 1-2 minute using hot plate at 98 DEG C, put into SiO₂In corrosive liquid The corrosion 30-60 second, erode the SiO not being photo-etched glue protection₂Thin film, puts into ultrasonic 5-10 minute in acetone, then in ethanol In ultrasonic 10 minutes, using deionized water rinsing 10 minutes after taking-up, remove the photoresist on surface, form the making of passivation layer, Obtain GaN base light emitting.

Claims

1. a kind of preparation method of GaN base light emitting chip, is characterized in that, comprise the following steps：

（1）Apply positive photoresist in the upper surface of the p-type GaN layer of GaN base epitaxial wafer, photoetching, photoetching are carried out to positive photoresist Go out the figure of required mesa structure；Figure according to mesa structure passes through dry etching along the p-type GaN layer of GaN base epitaxial wafer to n Type GaN layer etches mesa structure, prepares table top in n type GaN layer, removes the photoresist of remained on surface simultaneously；Described dry Method etches and etches for ICP, and etching process includes two steps, and the first step adopts Cl₂And BCl₂For etching gas, etch GaN base epitaxial layer To n-type GaN layer, second step adopts O₂As etching gas, remove the photoresist of residual；Through dry etching, it is not only completed platform The making of face structure graph, and surface clean is clean, can directly carry out the ITO growth of next step；

（2）One layer of ITO of superficial growth in p-type GaN layer（Indium Tin Oxide, tin indium oxide）Nesa coating；

（3）Preparation p-type electrode and n-type electrode on the table top of ITO nesa coating and n type GaN layer respectively；

（4）Passivation layer is made on GaN base light emitting chip surface；

Described step（1）The first step of middle etching process adopts Cl₂/BCl₂For etching gas, 50-100sccm/5-20sccm, 2- 8mTorr, RF Power1 200-500W, RF Power2 100-300W, temperature 0-20 DEG C；

Described step（1）The second step of middle etching process adopts O₂For etching gas, 20-80sccm, 5-20mTorr, RF1 200- 800W, RF250-300W, temperature 0-20 DEG C.