CN113497164B - Reversed-polarity GaAs-based AlGaInP red LED chip tube core structure and manufacturing method thereof - Google Patents
Reversed-polarity GaAs-based AlGaInP red LED chip tube core structure and manufacturing method thereof Download PDFInfo
- Publication number
- CN113497164B CN113497164B CN201911208664.6A CN201911208664A CN113497164B CN 113497164 B CN113497164 B CN 113497164B CN 201911208664 A CN201911208664 A CN 201911208664A CN 113497164 B CN113497164 B CN 113497164B
- Authority
- CN
- China
- Prior art keywords
- layer
- gaas
- electrode
- ito
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
Abstract
The tube core structure comprises an N-surface electrode, a silicon substrate, a TiAu transition metal layer, an Sn bonding adhesion layer, an Ag mirror reflection layer, an ITO transition layer, a current blocking layer, an ITO small round point ohmic contact layer, a P-type GaAs layer, a P-type AlGaInP layer, an MQW quantum well layer, an N-type AlGaInP layer, an N-type GaAs layer and heavily doped GaAs which are sequentially arranged from bottom to top; an extension electrode is arranged on the heavily doped GaAs; and a main electrode is also arranged on the N-type GaAs layer. The method can manufacture the tube core with high brightness and high photoelectric conversion efficiency; the process method designed by the invention is simple and easy to operate, does not need to introduce special equipment, utilizes lower cost and solves the problem of improving the brightness, and is suitable for the manufacturing process of all GaAs-based red light LED chips.
Description
Technical Field
The invention relates to a tube core structure of a reversed-polarity GaAs-based AlGaInP red light LED chip and a manufacturing method thereof, belonging to the field of semi-LED chips.
Background
The high-brightness high-power GaAs-based AlGaInP red LED chip is a common visible light LED which is widely developed in recent years, and the AlGaInP quaternary red LED has the advantages of strong current bearing capacity, high luminous efficiency, high temperature resistance and the like, is irreplaceable in application of illumination, display and indicator lamps, and is widely applied to various fields of illumination. According to the traditional process of the AlGaInP quaternary red LED, an epitaxial structure comprises a temporary substrate layer, a buffer layer, a barrier layer, an N-type gallium arsenide ohmic contact layer, a quantum well layer, a P-type AlGaInP limiting layer and a P-type GaAs layer, a Si sheet is usually used as a replacement and permanent substrate, a P-type electrode grows on the exposed AlGaInP layer, and an N-type electrode grows on the back of the thinned permanent substrate. In order to obtain a die with high brightness, a reflector is generally used to increase brightness and improve photoelectric conversion efficiency, in the conventional process, because gold has the characteristics of good stability and high reflectivity, a gold mirror is generally used as the reflector, but the material price of pure gold itself is high, so that the manufacturing cost of the reflector is high, and the reflectivity is relatively lower than that of metallic silver. As is well known, metallic silver is a metal with the highest reflectivity in the visible light band, but the metallic silver has very active physicochemical properties, and when a high-temperature alloy is used (above 300 ℃), diffusion, clustering, oxidation and other phenomena usually occur, and if these problems cannot be solved when a reflector made of Ag metal is used, the reflectivity of the silver mirror can be greatly degraded, and a film layer can be damaged, so that the overall brightness is limited, and the photoelectric conversion efficiency is low.
Chinese patent document CN101714600A (200910230193.9) proposes an inverted aluminum-gallium-indium-phosphorus-based light emitting diode and a manufacturing method thereof, which comprises the following steps: sequentially epitaxially generating a bonding layer, a reflector, a P-type conductive window layer and a P-type aluminum gallium indium phosphorus-based limiting layer on a permanent substrate, wherein the materials are an active layer of aluminum gallium indium phosphorus and an N-type aluminum gallium indium phosphorus-based limiting layer, and the materials are an N-type contact epitaxial layer of gallium arsenide; the coarsening epitaxial layer made of the material of the AlGaInP is formed on a partial region of the N-type contact epitaxial layer, the N expansion electrode is formed on a partial region of the N-type contact epitaxial layer, the N bonding pad is formed on the coarsening epitaxial layer and is in electrical contact with the N expansion electrode, and the P electrode is formed on the back of the permanent substrate. The structure is introduced with a coarsenable epitaxial layer, the coarsenable epitaxial layer can be coarsened by wet etching, and the N-type contact epitaxial layer is used as a chemical etching stop layer, so that the light-emitting layer is prevented from being damaged by longitudinal overetching; the formation of the N-type ohmic contact is performed after the chemical etching roughening process to avoid the peeling problem caused by etching. According to the invention, the ohmic contact layer is made of metal in the traditional process, the reflector is made of high-reflectivity metal, and the easy-adhesion metal is used as a bonding adhesion layer, but a specific manufacturing method is not disclosed.
Chinese patent document CN104241511A (201410497803.2) proposes a high-brightness flip chip ultraviolet LED chip preparation method, which can improve the external quantum efficiency of the ultraviolet LED chip, improve the chip brightness, and reduce the chip contact voltage. The Ni/Ag/Al combined high-ultraviolet-reflectivity reflector replaces a traditional thick Ag reflector, has high ultraviolet reflectivity, is far greater than the reflection effect of the Ag reflector in a deep ultraviolet region, can form ohmic contact with P-type gallium nitride after the ultrathin Ni/Ag is annealed, reduces the contact voltage of a flip chip, reduces the absorption of the traditional thick Ag reflector to ultraviolet light, and improves the brightness of the chip.
However, the chip brightness in the above documents is low, and researches have invented a reverse polarity GaAs-based AlGaInP red LED chip die structure and a manufacturing method thereof, by which a die with high brightness can be manufactured.
Disclosure of Invention
In light of the foregoing, a reverse polarity GaAs-based AlGaInP red LED chip die structure and a method for fabricating the same are provided, by which a die with high luminance and high photoelectric conversion efficiency can be fabricated.
The technical scheme of the invention is as follows:
a manufacturing method of a tube core junction of a reversed-polarity GaAs-based AlGaInP red light LED chip comprises the following steps:
(1) The whole structure of the GaAs-based epitaxial wafer sequentially comprises the following components from bottom to top: the GaAs substrate, gaInP barrier layer, heavily doped GaAs layer, N type AlGaInP layer, MQW quantum well layer, P type AlGaInP layer, P type GaAs layer; a GaAs-based epitaxial wafer as a temporary substrate;
manufacturing an ohmic contact: growing an ITO small round point ohmic contact layer on the surface of the GaAs-based epitaxial wafer, using photoresist to manufacture mask pattern protection, etching the ITO small round point ohmic contact layer to be used as an ohmic contact point, and removing photoresist after etching, wherein the GaAs substrate on the back of the wafer is used as an integral temporary substrate.
(2) Manufacturing a current barrier layer: growing a layer of silicon dioxide on the surface of the wafer finished in the step 1 as a current blocking layer, manufacturing a mask pattern by using photoresist, etching off the silicon dioxide of the ITO small round point ohmic contact layer in the step 1, and then removing the photoresist.
The ITO has excellent light transmittance, the small round dot process is used, so that the Ag mirror and the epitaxial layer have enough contact area, the small round dot of the ITO increases the overall ohmic contact yield, does not have great influence on reflectivity, and can further reduce the light absorption of metal,
(3) Manufacturing a transition layer: and (3) growing an ITO transition layer on the surface of the wafer finished in the step (2).
The transition layer ITO and the Ag mirror are continuously manufactured by using the same equipment, the whole structure of the ITO + Ag mirror film layer is kept to be manufactured under a high-vacuum atmosphere, the strong adhesion between the ITO and metal is guaranteed, normal-temperature evaporation/sputtering is completely used, the using time of the whole process is short, once fusion is carried out after the manufacturing is finished, and the reflecting mirror film layer with good current transmission and high reflectivity can be obtained.
(4) Manufacturing a reflector: and growing an Ag mirror reflection layer on the surface of the wafer finished in the step 3.
(5) Metal alloy: putting the wafer finished in the step 4 into high-temperature equipment for high-temperature alloying; under the high temperature and aerobic environment, the ITO transition layer is fully oxidized, the resistance of the ITO transition layer is further reduced, the light transmittance is further increased, and the metal inner particles are arranged by the alloy, so that the ohmic contact is enhanced.
(6) Evaporation of a permanent substrate: the silicon wafer is used as a silicon substrate, tiAu is evaporated on the surface of the silicon substrate to be used as a TiAu transition metal layer, and then Sn is evaporated to be used as a Sn bonding adhesion layer.
The Ti metal mainly acts for isolating the mutual diffusion between Ag and Au, and also blocks the upward diffusion of the Ag metal, and only can diffuse with the epitaxial layer, the Ag metal can be contacted with the epitaxial layer more tightly through high-temperature alloy, and only the edge part of the wafer of the Ag can be separated out in a small amount at high temperature.
(7) Bonding: and (4) carrying out high-temperature bonding on the wafer finished in the step (5) and the permanent substrate finished in the step (6).
(8) Removing the temporary substrate: and (3) etching the GaAs substrate, the GaInP barrier layer and the heavily doped GaAs layer exposed on the surface of the wafer bonded in the step (1) by using an etching solution.
(9) Manufacturing an extension electrode: and (3) manufacturing an extension electrode on the surface of the wafer finished in the step (8), manufacturing a mask pattern by using a photoresist in an electrode structure, corroding the pattern required by the extension electrode, corroding the heavily doped GaAs layer and the N-type GaAs layer on the surface by using a corrosive liquid, and removing the photoresist.
(10) Manufacturing a coarsening layer: and manufacturing a mask pattern again by using photoresist, protecting the extension electrode and the main electrode region, wherein the size of the protection pattern is slightly larger than that of the electrode, so that the side etching can be effectively prevented, roughening the N-type AlGaInP layer by using roughening liquid for the non-protection region, and removing the photoresist after the roughening is finished.
(11) Main electrode manufacturing: a mask pattern is formed using a photoresist, a main electrode is formed using a vapor deposition or sputtering method, and an electrode pattern is formed using a lift-off method.
(12) Manufacturing a tube core: and (3) thinning the back surface of the wafer after the step (11), manufacturing an N-surface electrode on the thinned surface, and splitting the wafer into single tube cores for use.
Preferably, in step 1, the whole structure of the GaAs-based epitaxial wafer sequentially includes, from bottom to top: the GaAs substrate, gaInP barrier layer, heavily doped GaAs, N type GaAs layer, N type AlGaInP layer, MQW quantum well layer, P type AlGaInP layer, P type GaAs layer, the epitaxial wafer is used as temporary substrate.
Preferably, in step 1, the thickness of the ITO small-circle point ohmic contact layer is 600-1800 angstroms, more preferably 1200 angstroms, and the ITO small-circle point ohmic contact layer is prepared by using a sputtering or electron beam evaporation table for evaporation, or by using normal temperature for evaporation or sputtering. The corrosive liquid is hydrochloric acid
Preferably, in step 2, the current blocking layer is formed by using a PECVD apparatus, preferably having a thickness of 2000 to 5000 angstroms, more preferably 3000 angstroms, and a growth temperature of 300 to 350 ℃, more preferably 330 ℃.
Preferably, in step 3, the ITO transition layer has a thickness of 30 to 50 angstroms, more preferably 40 angstroms, and is fabricated using a sputtering stage or an electron beam evaporation stage at room temperature.
Preferably, in step 4, the Ag mirror reflective layer is preferably of AgTiAu structure, the Ag metal thickness is preferably 1000 to 1500 angstroms, and more preferably 1200 angstroms, the Ti metal thickness is preferably 300 to 1000 angstroms, and more preferably 700 angstroms, and the Au metal thickness is preferably 3000 to 6000 angstroms, and more preferably 5000 angstroms.
Preferably, the ITO transition layer in step 3 and the Ag mirror reflection layer in step 4 are manufactured in the same equipment in the same heat, and the whole manufacturing process keeps the cavity in a high vacuum state (3.0E-6 Torr and above).
Preferably, in the step 5, the temperature of the high-temperature alloy is preferably 300-400 ℃, further preferably 350 ℃, the time is preferably 5-15min, further preferably 10min, oxygen is introduced during the alloying process, and the oxygen flow is 3-9L/min. Further preferably 6 liters/minute.
Preferably, in step 6, the TiAu and Sn are evaporated by using an electron beam evaporation table, and the TiAu evaporation temperature is preferably 150-250 ℃ so as to facilitate adhesion of the metal film layer; the thickness of the iAu transition metal layer is preferably 3000-8000 angstroms, and more preferably 6000 angstroms; sn is evaporated at normal temperature, and the thickness of the Sn bonding adhesion layer is preferably 1.5-3 microns, and is further preferably 2 microns, so that bonding adhesion is facilitated.
Preferably, in step 7, the surface Au of the temporary substrate and the surface Au of the permanent substrate are both bonded by Sn metal; the bonding temperature is preferably 200 to 260 ℃, more preferably 230 ℃, and the time is preferably 30 to 60min, more preferably 45min.
Preferably, in step 8, the GaAs substrate etching solution is etched using a mixed solution of ammonia water and hydrogen peroxide, and the GaInP barrier layer is etched using hydrochloric acid.
Preferably, in step 9, the extension electrode is evaporated by using an electron beam evaporation stage, the thickness of the extension electrode is preferably 3000 to 6000 angstroms, more preferably 5000 angstroms, the etching solution used for etching the extension electrode is a mixed solution of iodine, potassium iodide and acid, and the GaAs substrate is etched by using a mixed solution of phosphoric acid and hydrogen peroxide.
Preferably, in step 10, the protective pattern is larger than the electrode size by about 2-4 microns, and more preferably 3 microns, and the roughening solution is configured by using one or a combination of hydrochloric acid, phosphoric acid, glacial acetic acid, iodine, nitric acid and sulfuric acid.
Preferably, in step 11, a TiAl electrode is used as the main electrode, and the thickness of the electrode is preferably 2 to 5 micrometers, and more preferably 3 micrometers.
Preferably, in step 12, the thickness is reduced to 130-180 microns, more preferably 160 microns, and the N-side electrode is a NiAu electrode.
Preferably, the metal is involved in the steps 1 to 12, the metal purity is required to be 4N grade and above, and the vacuum degree of the metal film layer manufactured by an electron beam evaporation table and a sputtering machine table is 3.0E-6Torr or above, so as to ensure good adhesion of each metal film layer.
A tube core junction of a reverse polarity GaAs-based AlGaInP red light LED chip manufactured by the manufacturing method comprises an N-surface electrode, a silicon substrate, a TiAu transition metal layer, an Sn bonding adhesion layer, an Ag mirror reflection layer, an ITO transition layer, a current blocking layer, an ITO small round point ohmic contact layer, a P-type GaAs layer, a P-type AlGaInP layer, an MQW quantum well layer, an N-type AlGaInP layer, an N-type GaAs layer and heavily-doped GaAs which are sequentially arranged from bottom to top; an extension electrode is arranged on the heavily doped GaAs; and a main electrode is also arranged on the N-type GaAs layer.
The invention has the beneficial effects that:
1. the structure of the Ag reflector is important, and the design of the Ag reflector layer structure and the matching of the proper parameters of the subsequent high-temperature alloy are the core of the invention. The Ag mirror is manufactured with high reflectivity by evaporating the Ag mirror and the high-temperature alloy at normal temperature, and the overall performance is stable. In this application Ag thickness and with the selection of TiAu constitution reflection stratum structure, the Ti metal main act as and keep apart the interdiffusion between Ag and the Au, just also blockked the upwards diffusion of Ag metal, can only with epitaxial layer inter-layer diffusion, can make contact inseparabler between Ag metal and the epitaxial layer through superalloy, ag only wafer edge portion has a small amount to appear under high temperature.
2. The manufacturing of the surface ohmic contact point is finished by using an ITO small circle point process, the manufacturing is different from a metal ohmic contact point of a traditional process, only Ag is used as a reflector in the conventional process, the ITO small circle point has the advantage that ITO light transmittance is excellent, and the used small circle point process ensures that the Ag mirror and an epitaxial layer have enough contact area; and ITO normal temperature coating by vaporization cooperates with silicon dioxide high temperature preparation, and the cooperation of suitable parameters realizes one-time annealing, further promotes the conductivity and the light transmittance of ITO small dots, increases the adhesion of silicon dioxide, and provides a better adhesion interface for subsequent metal coating by vaporization.
3. The thickness of each metal in the Ag mirror structure is provided, the thickness selection of the Ag metal film layer and the matching of the high-temperature alloy temperature and time are particularly important, and the Ag metal is too thick and can generate cluster abnormality and diffusion abnormality through subsequent alloy; ag metal is too thin, and the reflectivity is lower after the alloy is formed. If the alloy temperature and time are too high, the structure of the Ag metal film layer can be damaged, if the alloy temperature and time are too low and time are not enough, fusion between the Ag metal and the epitaxial layer is not enough, and the phenomenon of dropping the Ag mirror is easy to occur subsequently.
4. This application is provided with transition layer ITO rete, and transition layer ITO and Ag mirror are for using same equipment continuous preparation with, ITO + Ag mirror rete whole structure keeps the preparation completion under the high vacuum atmosphere, has guaranteed the stronger adhesion between ITO and the metal, and all uses normal atmospheric temperature coating by vaporization/sputter, whole process live time is shorter, once fuse after the preparation is accomplished, can obtain current transmission well, the higher speculum rete of reflectivity.
Drawings
FIG. 1 is a schematic view of a GaAs-based wafer;
FIG. 2 is a schematic structural diagram of a completed ITO small dot ohmic contact layer;
FIG. 3 is a schematic view of the structure after the Ag reflective layer is grown;
FIG. 4 is a schematic structural diagram of a permanent substrate after growing a TiAu transition metal layer and a Sn bonding adhesion layer;
FIG. 5 is a schematic view of the temporary substrate and the permanent substrate after bonding;
FIG. 6 is a schematic view of the structure after completion of electrode extension after substrate etching;
FIG. 7 is a schematic structural diagram of a main electrode after roughening and fabrication;
FIG. 8 is a schematic structural diagram of permanent substrate thinning and fabrication of a completed N-sided electrode.
Wherein: the solar cell comprises a GaAs substrate, a 2 GaInP barrier layer, a 3-heavily-doped GaAs layer, a 4.N type GaAs layer, a 5.N type AlGaInP layer, a 6.MQW quantum well layer, a 7.P type AlGaInP layer, an 8.P type GaAs layer, a 9.ITO small dot ohmic contact layer, a 10. Current barrier layer, an 11.ITO transition layer, a 12.Ag mirror reflection layer, a 13. Silicon substrate, a 14.TiAu transition metal layer, a 15.Sn bonding adhesion layer, a 16-extension electrode, a 17, a main electrode and an 18.N face electrode.
Detailed Description
The present invention will be further described by way of examples, but not limited thereto, with reference to the accompanying drawings.
Example 1:
a method for fabricating a die junction of a reverse polarity GaAs-based AlGaInP red LED chip, the structure of which is shown in embodiment 2, taking a 42 mil-sized die as an example, the fabrication method includes the following steps:
(1) The whole structure of the GaAs-based epitaxial wafer sequentially comprises from bottom to top: the GaN-based epitaxial wafer is used as a temporary substrate;
manufacturing an ohmic contact: growing an ITO small circle point ohmic contact layer on the surface of the GaAs-based epitaxial wafer, using photoresist to manufacture mask pattern protection, etching the ITO small circle point ohmic contact layer to be used as an ohmic contact point, and removing the photoresist after etching, wherein the GaAs substrate on the back of the wafer is used as an integral temporary substrate.
The thickness of the ITO small round point ohmic contact layer is 1200 angstrom, and the ITO small round point ohmic contact layer is evaporated by using a sputtering or electron beam evaporation table and is manufactured at normal temperature by using evaporation or sputtering. The corrosive liquid is hydrochloric acid
(2) Manufacturing a current barrier layer: growing a layer of silicon dioxide on the surface of the wafer finished in the step 1 as a current blocking layer, manufacturing a mask pattern by using photoresist, etching off the silicon dioxide of the ITO small round point ohmic contact layer in the step 1, and then removing the photoresist.
The current blocking layer was fabricated using PECVD equipment at 3000 angstroms and a growth temperature of 330 ℃.
(3) Manufacturing a transition layer: and (3) growing an ITO transition layer on the surface of the wafer finished in the step (2).
The thickness of the ITO transition layer is 40 angstroms, and the ITO transition layer is manufactured by using a sputtering table or an electron beam evaporation table at normal temperature.
(4) Manufacturing a reflector: and growing an Ag mirror reflection layer on the surface of the wafer finished in the step 3.
The Ag mirror reflection layer is preferably of an AgTiAu structure, the Ag metal thickness is 1200 angstroms, the Ti metal thickness is 700 angstroms, the Au metal thickness is 5000 angstroms, and the Ag mirror is subjected to normal-temperature evaporation. The ITO transition layer in the step 3 and the Ag mirror reflection layer in the step 4 are manufactured by the same equipment in the same furnace, and the whole manufacturing process keeps the cavity in a high vacuum state (3.0E-6 Torr and above).
(5) Metal alloy: putting the wafer finished in the step 4 into high-temperature equipment for high-temperature alloying; under the high temperature and aerobic environment, the ITO transition layer is fully oxidized, the resistance of the ITO transition layer is further reduced, the light transmittance is further increased, and the metal inner particles are arranged by the alloy, so that the ohmic contact is enhanced.
The temperature of the high-temperature alloy is 350 ℃, the time is 10min, oxygen is introduced in the alloying process, and the oxygen flow is 6 liters/min.
(6) Evaporation of a permanent substrate: the method comprises the steps of using a silicon wafer as a silicon substrate, evaporating TiAu as a TiAu transition metal layer on the surface of the silicon substrate, and then evaporating Sn as a Sn bonding adhesion layer.
Evaporating the TiAu and the Sn by using an electron beam evaporation table, wherein the temperature of the TiAu evaporation table is preferably 200 ℃ so as to facilitate the adhesion of a metal film layer; the thickness of the iAu transition metal layer is 6000 angstroms; and the Sn is evaporated at normal temperature, and the thickness of the Sn bonding adhesion layer is 2 microns, so that bonding adhesion is facilitated.
(7) Bonding: and (4) carrying out high-temperature bonding on the wafer finished in the step (5) and the permanent substrate finished in the step (6).
Performing adhesion bonding on Au on the surface of the temporary substrate and Au on the surface of the permanent substrate through Sn metal; the bonding temperature was 230 ℃ and the bonding time was 45min.
(8) Removing the temporary substrate: and (3) etching the GaAs substrate, the GaInP barrier layer and the heavily doped GaAs layer exposed on the surface of the wafer bonded in the step (1) by using an etching solution.
The GaAs substrate corrosion solution is corroded by a mixed solution of ammonia water and hydrogen peroxide, and the GaInP barrier layer is corroded by hydrochloric acid.
(9) Manufacturing an extension electrode: and (5) manufacturing an extension electrode on the surface of the wafer finished in the step (8), wherein the electrode structure adopts a Ni/Au electrode, a mask pattern is manufactured by using photoresist, the pattern required by the extension electrode is corroded, the GaAs on the surface is corroded by using corrosive liquid, and the photoresist is removed.
The expansion electrode is evaporated by using an electron beam evaporation table, the thickness of the expansion electrode is 5000 angstroms, a corrosive liquid used for corroding the expansion electrode is a mixed solution of iodine, potassium iodide and acid, and a mixed solution of phosphoric acid and hydrogen peroxide is used for corroding the GaAs substrate.
(10) Manufacturing a coarsening layer: and manufacturing a mask pattern again by using photoresist, protecting the expansion electrode and the main electrode region, wherein the size of the protection pattern is slightly larger than that of the electrode, so that the side etching can be effectively prevented, roughening the non-protection region by using roughening liquid, and removing the photoresist after the roughening is finished.
The protective pattern is larger than the electrode and has a size of 3 micrometers, and the coarsening liquid is prepared by using one or a combination of more of hydrochloric acid, phosphoric acid, glacial acetic acid, iodine, nitric acid and sulfuric acid.
(11) Main electrode manufacturing: a mask pattern is formed using a photoresist, a main electrode is formed using a vapor deposition or sputtering method, and an electrode pattern is formed using a lift-off method.
TiAl electrodes were used as the main electrodes, and the thickness of the electrodes was 3 μm.
(12) Manufacturing a tube core: and (4) thinning the back surface of the wafer after the step (11), manufacturing an N-surface electrode on the thinned surface, and splitting the wafer into single dies for use.
The thickness of the thinning is 160 microns, and a NiAu electrode is used as an N-face electrode.
All the steps involve metal, the purity of the metal is required to be 4N grade and above, the vacuum degree of the electron beam evaporation table and the sputtering machine for manufacturing the metal film layers is 3.0E-6Torr and above, and the good adhesion of each metal film layer is ensured.
After the steps are carried out, the obtained tube core is tested, the brightness can reach 23000mcd, and the brightness is improved by more than 20% compared with the brightness of the tube core obtained by the conventional process.
The brightness manufactured by other parameters is lower according to the data as the optimal parameter combination, the conventional process takes 42mil size as an example, the brightness is generally between 18000-20000mcd, and the brightness can reach 22500-24000mcd through the adoption number and the Ag mirror structure obtained by the research of the application.
Example 2:
the construction method is the same as in example 1, except that:
in the step 1, the preferred ITO film layer is 600 angstroms;
in step 2, the thickness of the current blocking layer was 2000 angstroms and the growth temperature was 300 ℃.
In step 3, the thickness of the ITO transition layer is 30 angstroms.
In step 4, the thickness of Ag metal is 1000 angstroms, the thickness of Ti metal is 300 angstroms, and the thickness of Au metal is 3000 angstroms.
In the step 5, the temperature of the high-temperature alloy is 300 ℃, the time is 5min, oxygen is introduced in the alloying process, and the oxygen flow is 3 liters/min.
In the step 6, the TiAu evaporation temperature is 150 ℃; the TiAu transition metal layer is 3000 angstroms thick and the Sn bonding adhesion layer is preferably 1.5 microns thick.
In step 7, the bonding temperature is preferably 200 ℃ and the bonding time is preferably 30min.
In step 9, the extension electrode thickness is preferably 3000 angstroms.
In step 10, the protective pattern is 2 microns larger than the electrode size.
In step 11, a TiAl electrode is used as the main electrode, and the thickness of the electrode is 2 microns.
In step 12, the thickness is reduced to 130 microns.
Example 3:
the construction method is the same as in example 1, except that:
in the step 1, the preferred ITO film layer is 1800 angstroms;
in step 2, the thickness of the current blocking layer was 5000 angstroms and the growth temperature was 350 ℃.
In step 3, the thickness of the ITO transition layer is 50 angstroms.
In step 4, the thickness of Ag metal is 1500 angstroms, the thickness of Ti metal is 1000 angstroms, and the thickness of Au metal is 6000 angstroms.
In the step 5, the temperature of the high-temperature alloy is 400 ℃, the time is 10min, oxygen is introduced in the alloying process, and the oxygen flow is 9 liters/min.
In the step 6, the TiAu evaporation temperature is 250 ℃; the TiAu transition metal layer is 8000 a thick and the Sn bonding adhesion layer is preferably 3 μm thick.
In step 7, the bonding temperature is preferably 260 ℃ and the bonding time is preferably 60min.
In step 9, the extended electrode thickness is preferably 6000 angstroms.
In step 10, the protective pattern is 4 microns larger than the electrode size.
In step 11, a TiAl electrode is used as the main electrode, and the thickness of the electrode is 5 microns.
In step 12, the thickness is reduced to 180 microns.
Example 4
The reversed-polarity GaAs-based AlGaInP red light LED chip tube core junction manufactured by the method in the embodiment 1 comprises an N-surface electrode, a silicon substrate, a TiAu transition metal layer, an Sn bonding adhesion layer, an Ag mirror reflection layer, an ITO transition layer, a current blocking layer, an ITO small round point ohmic contact layer, a P-type GaAs layer, a P-type AlGaInP layer, an MQW quantum well layer, an N-type AlGaInP layer, an N-type GaAs layer and a heavily-doped GaAs layer which are sequentially arranged from bottom to top; an extension electrode is arranged on the heavily doped GaAs layer; a main electrode is also arranged on the N-type GaAs layer.
The above description is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and all equivalent structures or equivalent flow changes made by using the contents of the present specification and the drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A manufacturing method of a tube core junction of a reversed-polarity GaAs-based AlGaInP red LED chip is characterized by comprising the following steps of: the method comprises the following steps:
(1) The whole structure of the GaAs-based epitaxial wafer sequentially comprises the following components from bottom to top: the GaN substrate, the GaInP barrier layer, the heavily doped GaAs layer, the N-type AlGaInP layer, the MQW quantum well layer, the P-type AlGaInP layer and the P-type GaAs layer; a GaAs-based epitaxial wafer as a temporary substrate;
manufacturing an ohmic contact: growing an ITO small round point ohmic contact layer on the surface of the GaAs-based epitaxial wafer, using photoresist to manufacture mask pattern protection, corroding the ITO small round point ohmic contact layer to be used as an ohmic contact point, removing the photoresist after corrosion, and using the GaAs substrate on the back of the wafer as an integral temporary substrate;
(2) Manufacturing a current barrier layer: growing a layer of silicon dioxide on the surface of the wafer finished in the step 1 as a current barrier layer, using photoresist to manufacture a mask pattern, corroding the silicon dioxide of the ITO small circle point ohmic contact layer in the step 1, and then removing the photoresist;
(3) Manufacturing a transition layer: growing an ITO transition layer on the surface of the wafer finished in the step 2;
(4) Manufacturing a reflector: growing an Ag mirror reflection layer on the surface of the wafer finished in the step 3;
(5) Metal alloy: putting the wafer finished in the step 4 into high-temperature equipment for high-temperature alloying; the ITO transition layer is fully oxidized at high temperature in an aerobic environment, the resistance and the light transmittance of the ITO transition layer are further reduced, and the metal inner particles are arranged by the alloy to strengthen ohmic contact;
(6) Evaporation of a permanent substrate: using a silicon wafer as a silicon substrate, evaporating TiAu as a TiAu transition metal layer on the surface of the silicon substrate, and then evaporating Sn as a Sn bonding adhesion layer;
(7) Bonding: carrying out high-temperature bonding on the wafer finished in the step 5 and the permanent substrate finished in the step 6;
(8) Removing the temporary substrate: etching the bonded wafer in the step 1 by using an etching solution to remove the GaAs substrate serving as a temporary substrate, the GaInP barrier layer and the heavily doped GaAs layer exposed out of the surface;
(9) Manufacturing an extension electrode: manufacturing an extension electrode on the surface of the wafer finished in the step 8, wherein the electrode structure adopts a Ni/Au electrode, a mask pattern is manufactured by using photoresist, the pattern required by the extension electrode is corroded, the heavily doped GaAs layer and the N-type GaAs layer on the surface are corroded by using a corrosive liquid, and the photoresist is removed;
(10) Manufacturing a coarsening layer: using photoresist to make mask patterns again, protecting the expansion electrode and the main electrode region, wherein the size of the protection pattern is slightly larger than that of the electrode, effectively preventing side etching, using roughening solution to roughen the N-type AlGaInP layer in the non-protection region, and removing photoresist after roughening;
(11) Main electrode manufacturing: using photoresist to make a mask pattern, using an evaporation or sputtering mode to make a main electrode, and using a stripping method to make an electrode pattern;
(12) Manufacturing a tube core: and (3) thinning the back surface of the wafer after the step (11), manufacturing an N-surface electrode on the thinned surface, and splitting the wafer into single tube cores for use.
2. The method of claim 1 for fabricating a polar GaAs-based AlGaInP red LED chip die junction, comprising: in the step 1, the thickness of the ITO small round point ohmic contact layer is 600-1800 angstroms, and the ITO small round point ohmic contact layer is subjected to evaporation by using a sputtering or electron beam evaporation table, and is manufactured at normal temperature by using evaporation or sputtering.
3. The method of claim 1 for fabricating a polar GaAs-based AlGaInP red LED chip die junction, comprising: in step 2, the current blocking layer is manufactured by using PECVD equipment, the thickness is 2000-5000 angstroms, and the growth temperature is 300-350 ℃.
4. The method of claim 1, wherein the method comprises the steps of: in the step 3, the ITO transition layer is 30-50 angstroms thick and is manufactured by using a sputtering table or an electron beam evaporation table at normal temperature;
in the step 4, the Ag mirror reflection layer structure is an AgTiAu structure, the thickness of Ag metal is 1000-1500 angstroms, the thickness of Ti metal is 300-1000 angstroms, the thickness of Au metal is 3000-6000 angstroms, and the Ag mirror is evaporated at normal temperature;
the ITO transition layer in the step 3 and the Ag mirror reflection layer in the step 4 are manufactured by using the same equipment in the same heat, and the whole manufacturing process keeps the cavity in a high vacuum state.
5. The method of claim 1 for fabricating a polar GaAs-based AlGaInP red LED chip die junction, comprising: in the step 5, the temperature of the high-temperature alloy is 300-400 ℃, the time is 5-15min, oxygen is introduced in the alloying process, and the oxygen flow is 3-9 liters/min.
6. The method of claim 1, wherein the method comprises the steps of: in the step 6, evaporating the TiAu and the Sn by using an electron beam evaporation table, wherein the temperature of the TiAu evaporation is 150-250 ℃ so as to be beneficial to the adhesion of a metal film layer; the thickness of the TiAu is 3000-8000 angstrom, the Sn is evaporated at normal temperature, and the thickness is 1.5-3 microns, thus being beneficial to bonding and adhesion.
7. The method of claim 1, wherein the method comprises the steps of: in step 7, the surface Au of the temporary substrate and the surface Au of the permanent substrate are bonded through Sn metal in an adhesion mode; bonding temperature is 200-260 deg.C, and bonding time is 30-60min;
in the step 8, etching the GaAs substrate by using a mixed solution of ammonia water and hydrogen peroxide, and etching the GaInP barrier layer by using hydrochloric acid;
and 9, evaporating the extension electrode by using an electron beam evaporation table, wherein the thickness of the extension electrode is 3000-6000 angstroms, the corrosion solution used for corroding the extension electrode is a mixed solution of iodine, potassium iodide and acid, and the GaAs is corroded by using a mixed solution of phosphoric acid and hydrogen peroxide.
8. The method of claim 1, wherein the method comprises the steps of: step 10, the protective pattern is larger than the size of the electrode by 2-4 microns, and the coarsening liquid is configured by one or a combination of hydrochloric acid, phosphoric acid, glacial acetic acid, iodine, nitric acid and sulfuric acid;
in step 11, a TiAl electrode is used as a main electrode, and the thickness of the electrode is 2-5 microns;
in step 12, the thickness is reduced to 130-180 microns, and the N-side electrode is a NiAu electrode.
9. The method of claim 1 for fabricating a polar GaAs-based AlGaInP red LED chip die junction, comprising: all the steps involve metal, the purity of the metal is required to be 4N grade and above, and the vacuum degree of the electron beam evaporation table and the sputtering machine table for manufacturing the metal film layer is 3.0E-6Torr and above.
10. A tube core junction of a reversed polarity GaAs-based AlGaInP red light LED chip is characterized by comprising an N-face electrode, a silicon substrate, a TiAu transition metal layer, a Sn bonding adhesion layer, an Ag mirror reflection layer, an ITO transition layer, a current blocking layer, an ITO small round point ohmic contact layer, a P-type GaAs layer, a P-type AlGaInP layer, an MQW quantum well layer, an N-type AlGaInP layer, an N-type GaAs layer and a heavily doped GaAs layer which are sequentially arranged from bottom to top; an extension electrode is arranged on the heavily doped GaAs layer; and a main electrode is also arranged on the N-type GaAs layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911208664.6A CN113497164B (en) | 2020-03-20 | 2020-03-20 | Reversed-polarity GaAs-based AlGaInP red LED chip tube core structure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911208664.6A CN113497164B (en) | 2020-03-20 | 2020-03-20 | Reversed-polarity GaAs-based AlGaInP red LED chip tube core structure and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113497164A CN113497164A (en) | 2021-10-12 |
| CN113497164B true CN113497164B (en) | 2023-01-24 |
Family
ID=77992890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911208664.6A Active CN113497164B (en) | 2020-03-20 | 2020-03-20 | Reversed-polarity GaAs-based AlGaInP red LED chip tube core structure and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113497164B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114122218A (en) * | 2022-01-24 | 2022-03-01 | 南昌硅基半导体科技有限公司 | GaN-based LED chip with omnibearing reflective electrode and preparation method thereof |
| CN116759513B (en) * | 2023-08-14 | 2023-12-01 | 南昌凯捷半导体科技有限公司 | Mirror surface cladding structure reverse polarity red light LED chip and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1851947A (en) * | 2006-05-26 | 2006-10-25 | 北京工业大学 | Efficient full-bright all-reflection light-emitting-diode and making method |
| CN102354723A (en) * | 2011-10-24 | 2012-02-15 | 南昌黄绿照明有限公司 | Flip semiconductor luminescent device and manufacturing method thereof |
| CN206602125U (en) * | 2017-02-14 | 2017-10-31 | 南昌大学 | A kind of AlGaInP light emitting diodes thin film chip structure |
| CN109037412A (en) * | 2018-08-16 | 2018-12-18 | 南昌大学 | A kind of reversed polarity LED chip and preparation method thereof with mask layer |
-
2020
- 2020-03-20 CN CN201911208664.6A patent/CN113497164B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1851947A (en) * | 2006-05-26 | 2006-10-25 | 北京工业大学 | Efficient full-bright all-reflection light-emitting-diode and making method |
| CN102354723A (en) * | 2011-10-24 | 2012-02-15 | 南昌黄绿照明有限公司 | Flip semiconductor luminescent device and manufacturing method thereof |
| CN206602125U (en) * | 2017-02-14 | 2017-10-31 | 南昌大学 | A kind of AlGaInP light emitting diodes thin film chip structure |
| CN109037412A (en) * | 2018-08-16 | 2018-12-18 | 南昌大学 | A kind of reversed polarity LED chip and preparation method thereof with mask layer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113497164A (en) | 2021-10-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8735185B2 (en) | Light emitting device and fabrication method thereof | |
| CN108198926A (en) | A kind of film-type AlGaInP light-emitting diode chip for backlight unit and preparation method thereof | |
| CN101714600B (en) | Inversed AlGaInP based light-emitting diode and manufacturing method thereof | |
| CN102208508B (en) | Light emitting diode structure and manufacturing method thereof | |
| CN105702820B (en) | The reversed polarity AlGaInP base LED and its manufacturing method of surface covering ITO | |
| JP3207773B2 (en) | Compound semiconductor light emitting device and method of manufacturing the same | |
| CN113497164B (en) | Reversed-polarity GaAs-based AlGaInP red LED chip tube core structure and manufacturing method thereof | |
| JP4159865B2 (en) | Nitride compound semiconductor light emitting device manufacturing method | |
| CN112018223B (en) | Thin film flip structure Micro-LED chip with transfer printing of bonding layer and preparation method thereof | |
| JP2007103689A (en) | Semiconductor light emitting device | |
| CN104300065A (en) | Light-emitting diode with novel extension electrode structure and manufacturing method thereof | |
| CN103797591A (en) | Method for manufacturing a nitride semiconductor light emitting device and nitride semiconductor light emitting device manufactured thereby | |
| JP2006128659A (en) | Nitride series semiconductor light emitting element and manufacturing method of the same | |
| CN108336197B (en) | Vertical structure LED chip for preparing Ag reflector by two-step method and preparation method thereof | |
| CN111490136B (en) | Reversed polarity AlGaInP red LED tube core structure and manufacturing method thereof | |
| CN112885938B (en) | Preparation method of silver-based bonded reversed-polarity GaAs-based AlGaInP red LED chip | |
| CN116072793A (en) | High-luminous-efficiency light-emitting diode device structure and manufacturing method thereof | |
| JP2004235581A (en) | Process for fabricating light emitting element | |
| CN104681678B (en) | The light emitting diode and its manufacture method of a kind of double mirror structure | |
| CN208014722U (en) | A kind of two-step method prepares the light emitting diode (LED) chip with vertical structure of Ag speculums | |
| CN208173615U (en) | A kind of light emitting diode | |
| CN113257973B (en) | Deep ultraviolet LED with P-surface reflecting electrode structure and preparation method thereof | |
| JP4985930B2 (en) | Nitride-based compound semiconductor light-emitting device and method for manufacturing the same | |
| CN211907459U (en) | Vertical structure LED chip with double-sided transparent electrode | |
| CN109873062B (en) | AlGaInP red light-emitting diode device structure with composite reflector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |