CN112993015A - 一种基于集电区双扩散的高厄利电压横向pnp晶体管及其制备方法 - Google Patents
一种基于集电区双扩散的高厄利电压横向pnp晶体管及其制备方法 Download PDFInfo
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Abstract
本发明公开了一种基于集电区双扩散的高厄利电压横向PNP晶体管及其制备方法,该晶体管通过在P型集电区的侧壁和底部设置一层磷杂质基区,因磷杂质的扩散系数高于硼杂质的扩散系数,在后续集电区退火再扩散过程中N型杂质(磷杂质)和P型杂质(硼杂质)双扩散,提高横向PNP晶体管基区在集电区一侧的N型杂质浓度梯度,而在发射区一侧N型杂质浓度不受影响。
Description
【技术领域】
本发明属于晶体管制备技术领域,具体涉及一种基于集电区双扩散的高厄利电压横向PNP晶体管及其制备方法。
【背景技术】
厄利电压是表征双极型晶体管基区宽变效应的参数,对双极晶体管而言,厄利电压越高,其抑制基区宽变效应的能力越强。
参见图1和图2,在传统双极集成电路生产中,横向PNP晶体管集电区和发射区的P型杂质掺杂与NPN晶体管的基区同层次进行,即形成NPN晶体管的基区的同时进行P型杂质掺杂形成横向PNP晶体管的P型集电区和P型发射区,外延层作为横向PNP晶体管的N型基区,通过引线最终实现横向PNP晶体管结构,在晶体管的表面会覆盖一层二氧化硅层,作为金属引线与晶体管掺杂区之间的绝缘层,以避免晶体管不同掺杂区之间通过金属连线产生短路。
与NPN晶体管相比,传统横向PNP晶体管的厄利电压较低:当PNP晶体管CE电压增大时,CB处于反偏状态,由于横向PNP晶体管P型集电区浓度远高于N型集区,CB结空间电荷区主要向N型基区扩展,导致横向PNP基区宽度快速减小,基区宽变效应显著导致晶体管厄利电压偏低。
【发明内容】
本发明的目的在于克服上述现有技术的缺点,提供一种基于集电区双扩散的高厄利电压横向PNP晶体管及其制备方法,以解决现有技术中因横向PNP基区宽度快速减小,基区宽变效应显著导致晶体管厄利电压偏低的技术问题。
为达到上述目的,本发明采用以下技术方案予以实现:
一种基于集电区双扩散的高厄利电压横向PNP晶体管,包括N型外延层,N型外延层中设置有发射区和P型集电区,发射区被P型集电区围绕;所述P型集电区的侧壁和底部均被磷杂质基区包裹;所述发射区和P型集电区中注入有硼杂质离子,N型外延层中注入有磷杂质,磷杂质基区中的磷杂质浓度高于N型外延层中的磷杂质浓度。
一种上述的基于集电区双扩散的高厄利电压横向PNP晶体管的制备方法,包括以下步骤:
步骤1,在N型外延层上制备二氧化硅层;
步骤2,在二氧化硅层的表面涂覆光刻胶,光刻形成P型集电区的窗口和发射区的窗口;
步骤3,对P型集电区的窗口和发射区的窗口同时注入P型硼杂质离子;
步骤4,对P型集电区再次注入N型磷杂质,得到过程高厄利电压横向PNP晶体管;
步骤5,将步骤4制得的过程高厄利电压横向PNP晶体管进行退火后,形成最终的高厄利电压横向PNP晶体管。
本发明的进一步改进在于:
优选的,步骤3中,注入P型硼杂质离子后,去除二氧化硅层表面的光刻胶,然后再次涂覆一层光刻胶,再次通过光刻形成P型集电区的窗口,然后进行步骤4。
优选的,步骤2中和步骤3中光刻胶的厚度均为1.3μm。
优选的,步骤2和步骤3中,在形成P型集电区的窗口和发射区的窗口前,通过曝光和显影在光刻胶上形成相对应窗口的图形。
优选的,步骤3中,注入P型硼杂质的能量为60keV,注入剂量为4E14cm-2;步骤4中,注入N型磷杂质的能量为120keV,注入剂量1E12cm-2。
优选的,步骤5中,退火分为两个阶段,第一阶段的退火温度为1050℃,退火时间为90min;第二阶段的退火温度为1150℃,退火时间为85min。
优选的,步骤3中,注入P型硼杂质离子的能量为50keV,注入剂量1E15cm-2;步骤4中,注入N型磷杂质的能量为60keV,注入剂量2E12cm-2。
优选的,步骤5中,退火温度为1100℃,退火时间为50min。
与现有技术相比,本发明具有以下有益效果:
本发明公开了一种基于集电区双扩散的高厄利电压横向PNP晶体管,该晶体管通过在P型集电区的侧壁和底部设置一层磷杂质基区,因磷杂质的扩散系数高于硼杂质的扩散系数,在后续集电区退火再扩散过程中N型杂质(磷杂质)和P型杂质(硼杂质)双扩散,提高横向PNP晶体管基区在集电区一侧的N型杂质浓度梯度,而在发射区一侧N型杂质浓度不受影响。该结构形成的横向PNP晶体管在CE电压增大时,由于集电区一侧基区掺杂浓度较高,可抑制N型基区空间电荷区扩展,减小因CE电压增大导致的基区宽度变化,从而获得较高的厄立电压。同时由于发射区一侧掺杂浓度与传统横向PNP晶体管一致,故该横向PNP晶体管放大倍数等参数不受该影响。
本发明还公开了一种基于集电区双扩散的高厄利电压横向PNP晶体管的制备方法,该方法针对常规横向PNP晶体管厄利电压偏低的问题,提出一种通过集电区双扩散形成高厄立电压横向PNP晶体管的工艺方法。通过这种工艺方法获得的横向PNP晶体管具有更高的厄利电压。分别对采用本发明提出的新工艺方法形成的高厄立电压横向PNP晶体管和传统工艺横向PNP晶体管进行测试,在相同放大倍数条件下,新工艺方法形成的横向PNP晶体管的厄利电压高于传统结构横向PNP晶体管。本发明提出的采用离子注入实现高厄利电压横向PNP晶体管的工艺方法,在标准双极工艺流程中仅增加了一次光刻和离子注入,而不增加任何热过程的情况下实现了高厄利电压横向PNP晶体管基区掺杂浓度调整,与标准双极工艺流程具有良好的工艺兼容性。
【附图说明】
图1:传统结构横向PNP晶体管顶视图;其中,(a)为实施例1通过传统方法制备的结构图;(b)为实施例2通过传统方法制备的结构图;
图2:传统结构横向PNP晶体管纵向剖面图;
图3:采用集电区双扩散新工艺形成的高厄立电压横向PNP晶体管顶视图;
其中,(a)为实施例1通过传统方法制备的结构图;(b)为实施例2通过传统方法制备的结构图;
图4:采用集电区双扩散新工艺形成的高厄立电压横向PNP纵向剖面图;
图5:N型外延层表面生长离子注入二氧化硅层后的结构示意图;
图6:光刻形成横向PNP晶体管集电区、发射区窗口并完成P型硼杂质注入及去胶后的结构示意图;
图7:光刻形成横向PNP晶体管集电区窗口并完成N型磷杂质注入及去胶后的结构示意图;
图8:高温退火和杂质再分布后形成高厄利电压横向PNP晶体管的结构示意图。
其中,1-N型外延层;2-P型集电区;3-二氧化硅层;4-磷杂质基区;5-P型发射区;6-光刻胶;。
【具体实施方式】
下面结合附图对本发明做进一步详细描述:
在本发明的描述中,需要说明的是,术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制;术语“第一”、“第二”、“第三”仅用于描述目的,而不能理解为指示或暗示相对重要性;此外,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本发明中的具体含义。
本发明针对厄立电压的产生机理,提出了一种通过集电区双扩散工艺制备高厄立电压横向PNP晶体管的方法,通过横向PNP晶体管的双扩散工艺,提高了横向PNP晶体管集电区一侧的N型基区杂质浓度:在横向PNP晶体管完成P型集电区2和发射区5离子注入P型硼杂质之后,增加一次光刻和离子注入,在横向PNP晶体管集电区进行较低浓度的N型磷杂质掺杂,因磷杂质的扩散系数高于硼杂质的扩散系数,在后续集电区退火再扩散过程中N型杂质(磷杂质)和P型杂质(硼杂质)双扩散,提高横向PNP晶体管基区在集电区一侧的N型杂质浓度梯度,而在发射区一侧N型杂质浓度不受影响。该方法形成的横向PNP晶体管在CE电压增大时,由于集电区一侧基区掺杂浓度较高,可抑制N型基区空间电荷区扩展,减小因CE电压增大导致的基区宽度变化,从而获得较高的厄立电压。同时由于发射区一侧掺杂浓度与传统横向PNP晶体管一致,故该横向PNP晶体管放大倍数等参数不受该影响。
参见图3和图4为本发明制备出的高厄立电压横向PNP晶体管的结构示意图,包括N型外延层1,N型外延层1中设置有发射区5和P型集电区2,发射区5被P型集电区2围绕;P型集电区2在N型外延层1的部分包裹有磷杂质基区4。P型集电区2的上表面和N型外延层1的上表面平齐,整个P型集电区2设置在N型外延层1中,P型集电区2的四个侧壁和底部均被一层磷杂质基区4包裹,磷杂质基区4中为磷杂质。
参见图5~图8为采用集电区双扩散新工艺形成的高厄立电压横向PNP晶体管的过程,具体包括步骤如下:
1.参见图5,在N型外延层1的上表面生长不超过200nm的注入二氧化硅层3;
2.参见图6,在二氧化硅层3表面涂覆光刻胶6,通过曝光、显影,形成横向PNP晶体管的P型集电区2和发射区5的图形,然后通过光刻形成横向PNP晶体管的P型集电区2的窗口,以及发射区5的窗口,光刻胶6的厚度应保证对离子注入的有效屏蔽;
3.参见图6,对整个N型外延层1的上表面注入P型硼杂质离子,通过光刻胶对离子注入的屏蔽作用,实现对PNP晶体管P型集电区2和发射区5的选择性掺杂;注入完成后通过H2SO4+H2O2溶液去除二氧化硅层3表面的光刻胶6;
4.参见图7,在二氧化硅层3的上表面再次涂覆光刻胶6,通过曝光、显影,形成横向PNP晶体管P型集电区2的图形,对P型集电区2的图形进行光刻,形成横向PNP晶体管的P型集电区2的窗口,光刻胶6的厚度应保证对离子注入的有效屏蔽;
5.参见图7,对整个N型外延层1的上表面注入N型磷杂质离子,通过光刻胶6对离子注入的屏蔽作用,实现对PNP晶体管的P型集电区2进行N型杂磷质选择性掺杂,注入剂量应控制满足横向PNP晶体管耐压要求;
6.参见图8,在卧式扩散炉内进行注入退火和杂质再分布,在这一步,在P型集电区2内部的N型磷杂质离子进行扩散,形成磷杂质基区4,形成本发明的高厄立电压横向PNP晶体管结构。
现结合实施例,对本发明作进一步描述:
实施案例1:
采用本发明工艺方法形成的高厄利电压横向PNP晶体管结构如下:
1.横向PNP晶体管采用直径6μm的圆形发射区;内径6μm、外径30μm的圆环形基区;内径30μm、外径50μm的270°圆环形P型集电区2;
2.横向PNP晶体管P型集电区2和P型发射区5掺杂杂质为硼,杂质浓度为2E18cm-3;N型基区掺杂杂质为磷,杂质浓度为1E15cm-3;横向PNP晶体管基区宽度为12μm;
3.在相同横向PNP晶体管放大倍数条件下,采用本发明工艺方法形成的高厄利电压横向PNP晶体管的厄利电压达到60V,传统横向PNP晶体管厄利电压为30V,新工艺方法形成的PNP晶体管厄利电压远高于传统结构横向PNP晶体管。
本结构可通过以下方法实现:
1.在温度950℃下,通过氢氧合成氧化,在N型衬底硅表面生长100nm的二氧化硅层3,形成了N型外延层1上设置有二氧化硅层3的结构;
2.在二氧化硅层3表面涂覆1.3μm的光刻胶6,通过曝光、显影,形成横向PNP晶体管P型集电区2和发射区5的图形;通过离子注入对横向PNP晶体管的P型集电区2和发射区5进行掺杂,注入杂质11B+,注入能量60keV,注入剂量4E14cm-2;注入完成后通过H2SO4+H2O2溶液去除二氧化硅层3表面的光刻胶6;
3.在二氧化硅层3表面涂覆1.3μm的光刻胶6,通过曝光、显影,形成横向PNP晶体管的P型集电区2的图形;通过离子注入对横向PNP晶体管的P型集电区2进行掺杂,注入杂质31P+,注入能量120keV,注入剂量1E12cm-2;注入完成后通过H2SO4+H2O2溶液去除二氧化硅层3表面的光刻胶6;
4.通过1050℃90min,以及1150℃85min的两阶段退火完成杂质再分布,形成高厄利电压横向PNP晶体管,在P型集电区2的外部星辰磷杂质基区4.
本实施例制备的晶体管和传统工艺制备的晶体管的性能对比如下表所示。
表1本实施例制备的晶体管和传统工艺制备的晶体管的性能表
实施案例2:
采用本发明工艺方法形成的高厄利电压横向PNP晶体管结构如下:
1.横向PNP晶体管采用边长4μm的正方形发射区;内边长4μm、外边长14μm的正方环形基区;内边长14μm、外边长28m的正方环形的P型集电区2;
2.横向PNP晶体管P型集电区2和P型发射区5掺杂杂质为硼,杂质浓度为1E19cm-3;N型基区掺杂杂质为磷,杂质浓度为3.5E15cm-3;横向PNP晶体管基区宽度为5μm;
3.在相同横向PNP晶体管放大倍数条件下,采用本发明工艺方法形成的高厄利电压横向PNP晶体管的厄利电压达到50V,传统横向PNP晶体管厄利电压为20V,新工艺方法形成的横向PNP晶体管厄利电压远高于传统结构横行PNP晶体管。
本结构可通过以下方法实现:
1.在温度950℃下,通过氢氧合成氧化,在N型衬底硅表面生长50nm的二氧化硅层3,形成了N型外延层1上设置有二氧化硅层3的结构;
2.在二氧化硅层3表面涂覆1.3μm的光刻胶6,通过曝光、显影,形成横向PNP晶体管P型集电区2的图形;通过离子注入对横向PNP晶体管的P型集电区2和发射区5进行掺杂,注入杂质11B+,注入能量50keV,注入剂量1E15cm-2;注入完成后通过H2SO4+H2O2溶液去除二氧化硅层3表面的光刻胶6;
3.在二氧化硅层3表面涂覆1.3μm的光刻胶6,通过曝光、显影,形成横向PNP晶体管的P型集电区2的图形;通过离子注入对横向PNP晶体管的P型集电区2进行掺杂,注入杂质31P+,注入能量60keV,注入剂量2E12cm-2;注入完成后通过H2SO4+H2O2溶液去除二氧化硅层3表面的光刻胶6;
4.通过1100℃50min退火和杂质再分布,形成高厄利电压横向PNP晶体管,形成磷杂质基区4。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (9)
1.一种基于集电区双扩散的高厄利电压横向PNP晶体管,其特征在于,包括N型外延层(1),N型外延层(1)中设置有发射区(5)和P型集电区(2),发射区(5)被P型集电区(2)围绕;所述P型集电区(2)的侧壁和底部均被磷杂质基区(4)包裹;所述发射区(5)和P型集电区(2)中注入有硼杂质离子,N型外延层(1)中注入有磷杂质,磷杂质基区(4)中的磷杂质浓度高于N型外延层(1)中的磷杂质浓度。
2.一种权利要求1所述的基于集电区双扩散的高厄利电压横向PNP晶体管的制备方法,其特征在于,包括以下步骤:
步骤1,在N型外延层(1)上制备二氧化硅层(3);
步骤2,在二氧化硅层(3)的表面涂覆光刻胶(6),光刻形成P型集电区(2)的窗口和发射区(5)的窗口;
步骤3,对P型集电区(2)的窗口和发射区(5)的窗口同时注入P型硼杂质离子;
步骤4,对P型集电区(2)再次注入N型磷杂质,得到过程高厄利电压横向PNP晶体管;
步骤5,将步骤4制得的过程高厄利电压横向PNP晶体管进行退火后,形成最终的高厄利电压横向PNP晶体管。
3.根据权利要求2所述的制备方法,其特征在于,步骤3中,注入P型硼杂质离子后,去除二氧化硅层(3)表面的光刻胶(6),然后再次涂覆一层光刻胶(6),再次通过光刻形成P型集电区(2)的窗口,然后进行步骤4。
4.根据权利要求3所述的制备方法,其特征在于,步骤2中和步骤3中光刻胶(6)的厚度均为1.3μm。
5.根据权利要求3所述的制备方法,其特征在于,步骤2和步骤3中,在形成P型集电区(2)的窗口和发射区(5)的窗口前,通过曝光和显影在光刻胶上形成相对应窗口的图形。
6.根据权利要求2所述的制备方法,其特征在于,步骤3中,注入P型硼杂质的能量为60keV,注入剂量为4E14cm-2;步骤4中,注入N型磷杂质的能量为120keV,注入剂量1E12cm-2。
7.根据权利要求6所述的制备方法,其特征在于,步骤5中,退火分为两个阶段,第一阶段的退火温度为1050℃,退火时间为90min;第二阶段的退火温度为1150℃,退火时间为85min。
8.根据权利要求2所述的制备方法,其特征在于,步骤3中,注入P型硼杂质离子的能量为50keV,注入剂量1E15cm-2;步骤4中,注入N型磷杂质的能量为60keV,注入剂量2E12cm-2。
9.根据权利要求8所述的制备方法,其特征在于,步骤5中,退火温度为1100℃,退火时间为50min。
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CN113644054A (zh) * | 2021-07-14 | 2021-11-12 | 中国振华集团永光电子有限公司(国营第八七三厂) | 一种抗辐射晶体管 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1529562A (en) * | 1975-12-29 | 1978-10-25 | Tokyo Shibaura Electric Co | Semiconductor devices and circuits |
JPS5787168A (en) * | 1980-11-20 | 1982-05-31 | Toshiba Corp | Semiconductor device |
JPS62141765A (ja) * | 1985-12-16 | 1987-06-25 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPS63245957A (ja) * | 1987-04-01 | 1988-10-13 | Toko Inc | ラテラルpnpトランジスタとその製造方法 |
US20020030244A1 (en) * | 1998-09-11 | 2002-03-14 | Armand Pruijmboom | Lateral bipolar transistor and method of making same |
CN1381900A (zh) * | 2001-04-25 | 2002-11-27 | 三垦电气株式会社 | 具有分级基区的横向晶体管,半导体集成电路及制造方法 |
CN110828559A (zh) * | 2019-11-14 | 2020-02-21 | 西安微电子技术研究所 | 一种高厄利电压横向晶体管结构及其制备方法 |
-
2021
- 2021-02-26 CN CN202110218622.1A patent/CN112993015B/zh active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1529562A (en) * | 1975-12-29 | 1978-10-25 | Tokyo Shibaura Electric Co | Semiconductor devices and circuits |
JPS5787168A (en) * | 1980-11-20 | 1982-05-31 | Toshiba Corp | Semiconductor device |
JPS62141765A (ja) * | 1985-12-16 | 1987-06-25 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPS63245957A (ja) * | 1987-04-01 | 1988-10-13 | Toko Inc | ラテラルpnpトランジスタとその製造方法 |
US20020030244A1 (en) * | 1998-09-11 | 2002-03-14 | Armand Pruijmboom | Lateral bipolar transistor and method of making same |
CN1381900A (zh) * | 2001-04-25 | 2002-11-27 | 三垦电气株式会社 | 具有分级基区的横向晶体管,半导体集成电路及制造方法 |
CN110828559A (zh) * | 2019-11-14 | 2020-02-21 | 西安微电子技术研究所 | 一种高厄利电压横向晶体管结构及其制备方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113644054A (zh) * | 2021-07-14 | 2021-11-12 | 中国振华集团永光电子有限公司(国营第八七三厂) | 一种抗辐射晶体管 |
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