CN112908851A - 半导体功率器件的制造方法 - Google Patents

半导体功率器件的制造方法 Download PDF

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CN112908851A
CN112908851A CN201911223282.0A CN201911223282A CN112908851A CN 112908851 A CN112908851 A CN 112908851A CN 201911223282 A CN201911223282 A CN 201911223282A CN 112908851 A CN112908851 A CN 112908851A
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floating gate
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CN112908851B (zh
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龚轶
刘伟
刘磊
袁愿林
王睿
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Suzhou Dongwei Semiconductor Co ltd
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Abstract

本发明实施例提供的半导体功率器件的制造方法,包括:在提供的半导体衬底的顶部形成p型体区;形成第一绝缘介质层并在第一绝缘介质层中形成开口;形成n型浮栅并使得n型浮栅通过所述开口与所述p型体区接触形成p‑n结二极管,形成栅极。本发明实施例提供的半导体功率器件的制造方法,与现有技术的半导体功率器件的制造方法兼容,制造工艺简单稳定,所制造得到的半导体功率器件具有快的反向恢复速度。

Description

半导体功率器件的制造方法
技术领域
本发明属于半导体功率器件技术领域,尤其是涉及一种半导体功率器件的制造方法。
背景技术
图1是现有技术的一种半导体功率器件的剖面结构示意图,如图1所示,现有技术的一种半导体功率器件包括n型漏区31和位于n型漏区31之上的n型漂移区30,在n型漂移区30内设有p型体区33,p型体区33和n型漂移区30之间形成半导体功率器件中寄生的体二极管结构。在p型体区33内设有n型源区34,p型体区接触区38和源极金属接触层47形成欧姆接触结构。栅介质层35和栅极36位于p型体区33内的电流沟道之上。n型源区34和p型体区接触区38通过源极金属接触层47接源极电压。源极金属接触层47与其它导电层之间由层间绝缘层50隔离。
现有技现有技术的半导体功率器件在关断时,当漏源电压Vds小于0V时,半导体功率器件内寄生的体二极管处于正偏压状态,反向电流从源极经体二极管流至漏极,此时体二极管的电流存在注入少子载流子现象,而这些少子载流子在半导体功率器件再一次开启时进行反向恢复,导致较大的反向恢复电流,反向恢复时间长。
发明内容
有鉴于此,本发明的目的是提供一种反向恢复速度快的半导体功率器件的制造方法,以解决现有技术中的半导体功率器件因少子载流子注入问题造成的反向恢复时间长的技术问题。
本发明实施例提供的一种半导体功率器件的制造方法,包括:
提供一半导体衬底;
在所述半导体衬底的顶部形成p型体区;
在所述半导体衬底的表面形成第一绝缘介质层;
在所述第一绝缘介质层中形成开口,所述开口将所述p型体区露出;
在所述第一绝缘介质层之上形成n型浮栅,所述n型浮栅通过所述开口与所述p型体区接触形成p-n结二极管;
在所述半导体衬底的表面并覆盖所述n型浮栅形成第二绝缘介质层;
在所述第二绝缘介质层之上形成栅极,所述栅极通过电容耦合作用于所述n型浮栅;
在所述p型体区内形成n型源区。
可选的,在电流沟道的长度方向上,所述开口的中心到所述n型浮栅的靠近所述n型源区的一侧边沿的距离大于所述开口的中心到所述n型浮栅的另一侧边沿的距离。
可选的,在电流沟道的长度方向上,所述栅极用于控制靠近所述n型源区的一段的电流沟道的开启和关断,所述n型浮栅用于控制剩余一段的电流沟道的开启和关断,所述栅极延伸至所述n型浮栅之上。
可选的,所述栅极覆盖所述n型浮栅的远离所述n型源区的一侧的边沿。
可选的,所述第一绝缘介质层的材质为二氧化硅。
可选的,所述第一绝缘介质层通过热氧化的方法形成。
可选的,所述第二绝缘介质层的材质为二氧化硅。
可选的,所述第二绝缘介质层通过热氧化的方法形成。
本发明实施例提供的一种半导体功率器件的制造方法,与现有技术的半导体功率器件的制造方法兼容,制造工艺简单稳定,所制造得到的半导体功率器件具有快的反向恢复速度。
附图说明
为了更加清楚地说明本发明示例性实施例的技术方案,下面对描述实施例中所需要用到的附图做一简单介绍。
图1是现有技术的一种半导体功率器件的剖面结构示意图。
图2至图6是本发明实施例提供的一种半导体功率器件的制造方法中的主要工艺节点结构的剖面结构示意图。
具体实施方式
以下将结合本发明实施例中的附图,通过具体实施方式,完整地描述本发明的技术方案。同时,为清楚地说明本发明的具体实施方式,说明书附图中所列示意图,放大了本发明所述的层和区域的尺寸,且所列图形大小并不代表实际尺寸。说明书中所列实施例不应仅限于说明书附图中所示区域的特定形状,而是包括所得到的形状如制备引起的偏差等。
图2至图6是本发明实施例提供的一种半导体功率器件的制造方法中的主要工艺节点结构的剖面结构示意图,首先,如图2所示,提供一半导体衬底20,半导体衬底20的材质通常为硅且具有n型掺杂。通过光刻工艺和刻蚀工艺定义p型体区的位置,然后进行p型离子注入在半导体衬底20的顶部形成p型体区21。
需要说明的是,根据半导体功率器件所设计需要的功能,在提供的半导体衬底20中可以已经形成有其它结构,如沟槽结构、用于形成超结结构的p型柱状掺杂区等,这些结构在本发明实施例中不再具体展示。
半导体功率器件中通常包含由多个p型体区形成的p型体区阵列,本发明实施例中仅示例性的示出了一个p型体区21。
接下来,如图3所示,通过热氧化工艺,在半导体衬底20的表面形成第一绝缘介质层22,第一绝缘介质层22的材质通常为二氧化硅。然后通过光刻工艺定义出位于第一绝缘介质层22中的开口的位置,之后对第一绝缘介质层22进行刻蚀,在第一绝缘介质层22中形成开口10,开口10将p型体区21暴露出来。
接下来,如4所示,在第一绝缘介质层22之上形成一层n型多晶硅,然后对所形成的n型多晶硅层进行刻蚀并继续刻蚀掉暴露出的第一绝缘介质层22,刻蚀后剩余的n型多晶硅形成半导体功率器件的n型浮栅23,n型浮栅23通过开口30与p型体区21接触形成p-n结二极管。
接下来,如图5所示,在半导体衬底20的表面并覆盖n型浮栅23形成第二绝缘介质层24,并继续在第二绝缘介质层24之上形成掺杂的多晶硅,然后对所形成多晶硅进行刻蚀并继续刻蚀掉暴露出的第二绝缘介质层24,刻蚀后剩余的多晶硅形成半导体功率器件的栅极25,栅极25通过电容耦合作用与n型浮栅23。第二绝缘介质层24通常为通过热氧化工艺形成的二氧化硅。
接下来,如图6所示,在p型体区21内形成n型源区26。
通过本发明提供的半导体功率器件的制造方法制备得到n型浮栅23和栅极25时,使得栅极25用于控制靠近n型源区26的一段的电流沟道的开启和关断,n型浮栅23用于控制剩余一段的电流沟道的开启和关断,栅极25延伸至n型浮栅23之上可以增大栅极25覆盖n型浮栅23的面积,进而增大栅极25对n型浮栅23的电容耦合率。可选的,栅极25延伸至n型浮栅23之上时还可以覆盖n型浮栅23的远离n型源区26的一侧的边沿,由此进一步增大栅极25对n型浮栅的电容耦合率。
最后,通过现有技术的半导体功率器件的制造方法制备得到半导体功率器件的源极接触金属层、栅极接触金属层、n型漏区、漏极接触金属层即可,本发明实施例中不再具体展示该步骤。
通过本发明提供的半导体功率器件的制造方法得到的半导体功率器件,n型浮栅23与p型体区21接触形成p-n结二极管,半导体功率器件在正向阻断状态时,漏极被施加高电压,由n型浮栅23与p型体区21形成的p-n结二极管被正向偏置,n型浮栅23被充入正电荷,这使得n型浮栅23下面的电流沟道的阈值电压Vht1降低。本发明的半导体功率器件的制造方法,在制造得到位于第一绝缘介质层22中的开口10时,可以在电流沟道的长度方向上,使得开口10的中心到n型浮栅23的靠近n型源区26的一侧边沿的距离大于开口10的中心到n型浮栅23的另一侧边沿的距离,即使得开口10更靠近p型体区21的边沿设置,这样可使n型浮栅23更容易的被充入正电荷。
半导体功率器件在正向阻断状态和正向开启状态时,漏源电压Vds大于0V,n型浮栅23下面的电流沟道的阈值电压Vht1对整个半导体功率器件的阈值电压Vth的影响很低,半导体功率器件仍具有高阈值电压Vth。本发明实施例的半导体功率器件在关断时,当源漏电压Vsd大于0V时,n型浮栅23下面的电流沟道的阈值电压Vht1对整个半导体功率器件的阈值电压Vth的影响很大,使得半导体功率器件具有低阈值电压Vth,从而使半导体功率器件在低栅极电压(或0V电压)下开启,从而能够增加流过半导体功率器件中电流沟道的反向电流,减少流过半导体功率器件中寄生的体二极管的电流,提高半导体功率器件的反向恢复速度。
以上具体实施方式及实施例是对本发明技术思想的具体支持,不能以此限定本发明的保护范围,凡是按照本发明提出的技术思想,在本技术方案基础上所做的任何等同变化或等效的改动,均仍属于本发明技术方案保护的范围。

Claims (8)

1.半导体功率器件的制造方法,其特征在于,包括:
提供一半导体衬底;
在所述半导体衬底的顶部形成p型体区;
在所述半导体衬底的表面形成第一绝缘介质层;
在所述第一绝缘介质层中形成开口,所述开口将所述p型体区露出;
在所述第一绝缘介质层之上形成n型浮栅,所述n型浮栅通过所述开口与所述p型体区接触形成p-n结二极管;
在所述半导体衬底的表面并覆盖所述n型浮栅形成第二绝缘介质层;
在所述第二绝缘介质层之上形成栅极,所述栅极通过电容耦合作用于所述n型浮栅;
在所述p型体区内形成n型源区。
2.如权利要求1所述的半导体功率器件的制造方法,其特征在于,在电流沟道的长度方向上,所述开口的中心到所述n型浮栅的靠近所述n型源区的一侧边沿的距离大于所述开口的中心到所述n型浮栅的另一侧边沿的距离。
3.如权利要求1所述的半导体功率器件的制造方法,其特征在于,在电流沟道的长度方向上,所述栅极用于控制靠近所述n型源区的一段的电流沟道的开启和关断,所述n型浮栅用于控制剩余一段的电流沟道的开启和关断,所述栅极延伸至所述n型浮栅之上。
4.如权利要求1所述的半导体功率器件的制造方法,其特征在于,所述栅极覆盖所述n型浮栅的远离所述n型源区的一侧的边沿。
5.如权利要求1所述的半导体功率器件的制造方法,其特征在于,所述第一绝缘介质层的材质为二氧化硅。
6.如权利要求5所述的半导体功率器件的制造方法,其特征在于,所述第一绝缘介质层通过热氧化的方法形成。
7.如权利要求1所述的半导体功率器件的制造方法,其特征在于,所述第二绝缘介质层的材质为二氧化硅。
8.如权利要求7所述的半导体功率器件的制造方法,其特征在于,所述第二绝缘介质层通过热氧化的方法形成。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113643981A (zh) * 2021-07-29 2021-11-12 上海华力集成电路制造有限公司 具有双金属控制栅的半浮栅晶体管的制造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020051378A1 (en) * 2000-08-17 2002-05-02 Takashi Ohsawa Semiconductor memory device and method of manufacturing the same
CN102169882A (zh) * 2010-02-26 2011-08-31 苏州东微半导体有限公司 一种半导体存储器器件及其制造方法
CN104882447A (zh) * 2015-05-27 2015-09-02 上海集成电路研发中心有限公司 一种漏区嵌入反型层的半浮栅器件及制造方法
CN104916639A (zh) * 2014-03-13 2015-09-16 中芯国际集成电路制造(上海)有限公司 一种半浮栅存储器结构及其制作方法
US20150303207A1 (en) * 2013-09-06 2015-10-22 Su Zhou Oriental Semiconductor Co., Ltd. Manufacturing method for semi-floating gate device
CN105097919A (zh) * 2014-05-14 2015-11-25 中芯国际集成电路制造(上海)有限公司 半浮栅晶体管结构及其制作方法
US20170179115A1 (en) * 2014-08-17 2017-06-22 Fudan University Semi-floating-gate power device and manufacturing method therefor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0142516A1 (en) * 1983-04-11 1985-05-29 Semi Processes Inc. Vertical d-mos eprom
US10068834B2 (en) * 2013-03-04 2018-09-04 Cree, Inc. Floating bond pad for power semiconductor devices
CN103247626A (zh) * 2013-05-02 2013-08-14 复旦大学 一种半浮栅器件及其制造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020051378A1 (en) * 2000-08-17 2002-05-02 Takashi Ohsawa Semiconductor memory device and method of manufacturing the same
CN102169882A (zh) * 2010-02-26 2011-08-31 苏州东微半导体有限公司 一种半导体存储器器件及其制造方法
US20150303207A1 (en) * 2013-09-06 2015-10-22 Su Zhou Oriental Semiconductor Co., Ltd. Manufacturing method for semi-floating gate device
CN104916639A (zh) * 2014-03-13 2015-09-16 中芯国际集成电路制造(上海)有限公司 一种半浮栅存储器结构及其制作方法
CN105097919A (zh) * 2014-05-14 2015-11-25 中芯国际集成电路制造(上海)有限公司 半浮栅晶体管结构及其制作方法
US20170179115A1 (en) * 2014-08-17 2017-06-22 Fudan University Semi-floating-gate power device and manufacturing method therefor
CN104882447A (zh) * 2015-05-27 2015-09-02 上海集成电路研发中心有限公司 一种漏区嵌入反型层的半浮栅器件及制造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113643981A (zh) * 2021-07-29 2021-11-12 上海华力集成电路制造有限公司 具有双金属控制栅的半浮栅晶体管的制造方法
CN113643981B (zh) * 2021-07-29 2024-06-11 上海华力集成电路制造有限公司 具有双金属控制栅的半浮栅晶体管的制造方法

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