CN112447610A - 半导体装置及半导体元件 - Google Patents

半导体装置及半导体元件 Download PDF

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Publication number
CN112447610A
CN112447610A CN202010886116.5A CN202010886116A CN112447610A CN 112447610 A CN112447610 A CN 112447610A CN 202010886116 A CN202010886116 A CN 202010886116A CN 112447610 A CN112447610 A CN 112447610A
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China
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semiconductor element
film
semiconductor device
anchor
protective film
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CN202010886116.5A
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中田洋辅
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication of CN112447610A publication Critical patent/CN112447610A/zh
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Abstract

本发明涉及半导体装置及半导体元件。提供即使在由于由温度循环引起的应力而使半导体元件从封装树脂承受到应力的情况下，也对半导体元件表面的保护膜的剥离进行了抑制的半导体装置。具有：基板；半导体元件，其与基板接合；以及封装树脂，其对基板的至少一部分和半导体元件进行封装，半导体元件具有：有源区域，其在半导体元件的接通状态下流过主电流；有源区域的周围的末端区域；锚定膜，其设置于末端区域的绝缘膜之上；以及保护膜，其至少将包含锚定膜的末端区域覆盖，锚定膜由与绝缘膜不同的材料构成，具有分散地设置的多个开口部。

Description

半导体装置及半导体元件
技术领域
本发明涉及半导体装置，特别是就对半导体元件进行树脂封装的半导体装置而言，涉及对保护半导体元件的保护膜的剥离进行了抑制的半导体装置。
背景技术
在专利文献1中公开了通过环氧类树脂等固化型树脂对半导体元件进行了封装的半导体装置。另外，在专利文献2中公开了如下半导体装置，即，电极部件与半导体元件的表面侧和背面侧接合，电极部件的至少一部分和半导体元件由封装树脂覆盖。另外，近年来，为了能够进一步应对损耗降低和高温工作，由碳化硅(SiC)构成的SiC半导体元件正在被开发、实用化，也搭载于上述那样的半导体装置。在专利文献3中公开了如下半导体装置，即，在SiC层之上形成层叠有第1、第2绝缘层的绝缘层，在第1绝缘层设置到达SiC层表面的贯穿孔，通过将第2绝缘层埋入于该贯穿孔而成为凸部，通过该凸部使绝缘层的密接性提高。
专利文献1：日本特开2004-165406号公报
专利文献2：日本特开2001-274177号公报
专利文献3：国际公开第2013/137177号
现有的半导体装置存在如下课题，即，由于由温度循环引起的应力，半导体元件从封装树脂承受到应力，半导体元件表面的保护膜剥离，可靠性降低等。就专利文献2所公开的结构的半导体装置而言，认为由于施加于半导体元件的应力进一步提高，因此保护膜剥离的可能性更高。如果保护膜的剥离例如进展到与末端区域相比处于内侧的覆盖栅极配线的区域，则有时会破坏栅极配线，最终导致特性不良。特别地，就搭载SiC半导体元件的半导体装置而言，由于SiC的杨氏模量比Si高，因此施加于保护膜的应力提高，剥离容易进一步发展。另外，即使具有如专利文献3所公开那样的使绝缘层的密接性提高的结构，在不能够完全对剥离进行抑制的情况下，也存在成为强电场的SiC半导体元件的末端区域露出，从剥离位置产生放电，耐压降低的可能性。
发明内容
本发明就是为了解决上述那样的问题而提出的，其目的在于提供即使在由于由温度循环引起的应力而使半导体元件从封装树脂承受到应力的情况下，也对半导体元件表面的保护膜的剥离进行了抑制的半导体装置。
本发明涉及的半导体装置具有：基板；半导体元件，其与所述基板接合；以及封装树脂，其对所述基板的至少一部分和所述半导体元件进行封装，所述半导体元件具有：有源区域，其在所述半导体元件的接通状态下流过主电流；所述有源区域的周围的末端区域；锚定膜，其设置于所述末端区域的绝缘膜之上；以及保护膜，其至少将包含所述锚定膜的所述末端区域覆盖，所述锚定膜由与所述绝缘膜不同的材料构成，具有分散地设置的多个开口部。
发明的效果
根据本发明涉及的半导体装置，通过在半导体元件的末端区域的绝缘膜之上设置锚定膜，即使在由于由温度循环引起的应力而使半导体元件从封装树脂承受到应力的情况下，保护膜也会钩挂于锚定膜的开口部，由此保护膜作为拉伸应力而分担地承受来自封装树脂的应力，其结果，能够减小剥离前端部的压缩应力，能够抑制保护膜的剥离。
附图说明
图1是说明本发明涉及的实施方式1的半导体装置的结构的剖视图。
图2是表示本发明涉及的实施方式1的半导体装置所搭载的半导体元件的结构的俯视图。
图3是表示本发明涉及的实施方式1的半导体装置所搭载的半导体元件的结构的局部剖视图。
图4是表示本发明涉及的实施方式1的半导体装置所搭载的半导体元件的结构的局部俯视图。
图5是表示本发明涉及的实施方式1的半导体装置所搭载的半导体元件的结构的局部俯视图。
图6是表示本发明涉及的实施方式1的半导体装置所搭载的半导体元件的结构的局部俯视图。
图7是表示承受到由温度循环引起的应力的情况下的在保护膜和半导体元件的界面产生的应力的模拟结果的等值线图。
图8是表示承受到由温度循环引起的应力的情况下的在保护膜和半导体元件的界面产生的应力的模拟结果的等值线图。
图9是表示承受到由温度循环引起的应力的情况下的在保护膜和半导体元件的界面产生的应力的模拟结果的等值线图。
标号的说明
1半导体装置，11半导体元件，11a末端区域，12层间绝缘膜，13锚定膜，14保护膜。
具体实施方式
<引言>
在下面的说明中，“有源区域”是指在半导体元件的接通状态下流过主电流的区域。另外，下面，“外侧”是朝向半导体元件的外周的方向，“内侧”是与“外侧”相反的方向。另外，在下面的记载中，关于杂质的导电型，通常将n型定义为“第1导电型”，将与n型相反导电型的p型定义为“第2导电型”，但也可以是其相反的定义。
此外，附图是示意性地示出的，在不同的附图各自示出的图像的尺寸及位置的相互关系不一定是准确地记载的，有能够适当变更。另外，在下面的说明中，对同样的结构要素标注相同的标号而进行图示，它们的名称及功能也相同。因此，有时会省略对它们的详细的说明。另外，在本说明书中，在“～之上”及“覆盖～”这样的情况下，不排除在结构要素之间存在夹杂物。例如，在记载为“在A之上设置的B”或“A将B覆盖”的情况下，可能意味着在A和B之间设置有其它结构要素C、或没有设置其它结构要素C。另外，在下面的说明中，有时使用“上”、“下”、“侧”、“底”、“表”或“背”等意味着特定的位置及方向的术语，这些术语只是为了容易对实施方式的内容进行理解，出于方便而使用的，与实际实施时的方向没有关系。
另外，“MOS”这样的术语以前用于金属-氧化物-半导体的接合构造，采用了Metal-Oxide-Semiconductor的首字母。但是，特别地，就具有MOS构造的场效应晶体管(下面，仅称为“MOS晶体管”)而言，从近年来的集成化、制造工艺的改善等观点出发，正在改善栅极绝缘膜及栅极电极的材料。
例如，就MOS晶体管而言，主要从自对准地形成源极、漏极的观点出发，作为栅极电极的材料能够替代金属而采用多晶硅。另外，从改善电气特性的观点出发，作为栅极绝缘膜的材料采用高介电常数的材料，但该材料并非必须限于氧化物。
因此，“MOS”这样的术语并非必须仅限于采用金属-氧化物-半导体的层叠构造，在本说明书中不以这样的限定为前提。即，鉴于技术常识，这里，“MOS”不仅作为源自其词源的缩写，还具有广义地包含导体-绝缘体-半导体的层叠构造的含义。
<实施方式1>
<装置结构>
图1是表示实施方式1涉及的半导体装置1的结构的剖视图，图2是表示半导体装置1所搭载的半导体元件11的结构的俯视图。
如图1所示，半导体装置1具有经由焊料材料等接合材料31接合至导体基板21的一个主面(上表面)之上的多个半导体元件11。半导体元件11在与通过接合材料31接合的下表面相反侧的上表面，经由焊料等接合材料32接合有引线框22。引线框22与半导体元件11的上表面的源极电极(未图示)电连接，引线框22的一端凸出至半导体装置1的外部。
外部端子23的一端连接于导体基板21的上表面的端缘部，外部端子23的另一端凸出至半导体装置1的外部。外部端子23与半导体元件11的下表面的漏极电极(未图示)电连接。
另外，导线WR的一端通过导线键合而连接于半导体元件11的上表面，导线WR的另一端通过导线键合而连接于控制端子24的一端。控制端子24的另一端凸出至半导体装置1的外部。导线WR与半导体元件11的栅极焊盘11d(图2)连接，经由控制端子24从半导体装置1的外部输入控制信号。
引线框22、外部端子23及控制端子24的至少一部分、导线WR、导体基板21及半导体元件11被封装树脂41封装，引线框22、外部端子23及控制端子24各自的另一端从封装树脂41的侧面凸出至外部。导体基板21的下表面没有被封装树脂41覆盖，露出至外部。此外，图1所示的半导体装置1的结构为一个例子，并不限于该结构。
如图2所示，半导体元件11具有矩形的外形，其中央部成为有源区域AR。有源区域AR的俯视形状呈四角具有曲率的矩形，其一边的中央部向内侧以矩形状凹陷，以进入至向有源区域AR的内侧凹陷的部分的方式设置有栅极焊盘11d。另外，在有源区域AR之上设置有具有与有源区域AR大致同等大小及形状的源极电极11c。
另外，与栅极焊盘11d的一边连接的栅极配线11b是沿有源区域AR的外周设置的，有源区域AR被栅极配线11b包围。此外，有源区域AR、源极电极11c及栅极焊盘11d的配置及俯视形状并不限于上述情况。
在栅极配线11b的更外周侧沿栅极配线11b设置有锚定膜13。将包含锚定膜13在内从栅极配线11b的外缘至半导体元件11的外缘为止的区域定义为末端区域11a。
在图3中示出图2中的A-A线所示的区域的矢向剖视图，图4是与图3对应的区域的局部俯视图。
如图3所示，在末端区域11a，在层间绝缘膜12之上设置有锚定膜13，形成有覆盖层间绝缘膜12及栅极配线11b并且覆盖源极电极11c的至少一部分的保护膜14。此外，保护膜14由与层间绝缘膜12不同的材料构成。另外，虽然省略了图示，但在末端区域也可以设置用于保持耐压的杂质区域。
半导体元件11为由碳化硅(SiC)构成的SiC半导体元件(碳化硅半导体元件)，具有在半导体基板即SiC晶片之上外延生长出的半导体层，在经过各种晶片工艺在SiC晶片之上形成了多个半导体元件构造后，在各半导体元件构造的末端区域11a形成锚定膜13，通过保护膜14将末端区域11a覆盖。之后，将SiC晶片研磨为100μm左右的厚度，例如，通过切割法等沿切割线将多个半导体元件构造切断而单片化，从而成为半导体元件11。
此外，虽然省略了半导体元件11的半导体元件构造的图示及说明，但在本实施方式中设想的是MOS晶体管。但是，半导体元件11并不限于MOS晶体管，也可以是绝缘栅型双极晶体管(Insulated Gate Bipolar Transistor：IGBT)、pn结二极管、肖特基二极管等。
例如将聚酰亚胺或聚酰胺作为主要材料而构成保护膜14。就保护膜14而言，在晶片工艺中通过旋涂法将保护膜14的前驱体溶液涂敷于SiC晶片之上后，经过照相制版工艺，形成为所期望的图案。作为该图案，举出例如MOS晶体管的源极电极11c及栅极焊盘11d的上方开口，在它们之外的区域，即包含末端区域11a及形成了栅极配线11b的区域在内的区域被保护膜14覆盖的图案。
如果进一步详细地叙述，则在使用圆盘状的刃磨石而对半导体晶片进行切割的情况下，如果通过保护膜14覆盖至切割线之上，则在切割时产生碎裂等，有可能成品率降低。因此，优选保护膜14的外侧端面设置于与切割线相比向内侧后退的位置，以使得在切割时不与刃磨石接触，成为切割线的上方也为开口部的图案。因此，如图3所示，保护膜14的外侧端面处于从半导体元件11的端面后退的位置。此外，该后退距离根据刃磨石的刀刃宽度等切割条件而不同，例如为20～100μm。
层间绝缘膜12例如以氧化硅为主要材料而构成，能够通过热氧化法或使用TEOS(四乙氧基硅烷)而堆积TEOS氧化膜的方法以任意的厚度形成。
半导体元件11的末端区域11a也是用于保持耐压的耐压保持区域，由于成为高电场，因此覆盖末端区域11a的层间绝缘膜12是以至少使得末端区域11a没有露出的方式设定厚度及形成区域。另外，层间绝缘膜12设定为不会由于高电场产生漏电流而使耐压降低的厚度。
锚定膜13例如以氮化硅为主要材料构成。如图2所示，锚定膜13在俯视观察中是沿末端区域11a而设置的，呈环状。另外，如图4所示，在锚定膜13整体分散地设置有多个开口部13a。
锚定膜13以在栅极配线11b的外侧包围栅极配线11b及有源区域AR的方式形成为环状，由此能够对保护膜14的剥离发展而使剥离到达至栅极配线11b及有源区域AR进行抑制。
就锚定膜13而言，在晶片工艺中通过化学气相沉积法(CVD法)在SiC晶片整体之上形成了氮化硅膜后，在氮化硅膜之上形成抗蚀膜，经过照相制版工艺，沿末端区域11a环状地残留抗蚀膜，并且以分散地形成多个开口部13a的方式将抗蚀膜图案化。之后，通过将被图案化后的抗蚀膜用作蚀刻掩模而对氮化硅膜进行蚀刻，从而得到所期望的图案。
这里，层间绝缘膜12由氧化硅构成，锚定膜13由氮化硅构成，因此通过蚀刻工艺得到选择性，所以能够抑制在锚定膜13的图案化工艺中层间绝缘膜12被去除。
图4所示的锚定膜13的开口部13a的俯视形状为圆形，开口部13a间的最小间隔被设定为大于或等于5μm且小于或等于20μm。
此外，通过将开口部13a的俯视形状设为圆形，从而能够均等地承受在剥离后的保护膜14钩挂于开口部13a时产生的拉伸应力。
另外，开口部13a的俯视形状并不限于圆形，例如如图5所示，也可以设为与半圆接近的形状(半圆状)，如图6所示，也可以设为与月牙形接近的形状(月牙形状)。内侧(形成了有源区域AR及栅极配线11b的一侧)的边是呈圆弧状的形状，开口部13a间的最小间隔大于或等于5μm且小于或等于20μm即可。
通过设为半圆状或月牙形状而能够增加每单位面积的开口部13a的配置个数，能够提高由设置开口部13a带来的保护膜14的锚定效应。锚定效应是指通过表面的凹凸钩挂于开口部13a，利用保护膜14的弹性，得到针对水平方向的应力的抵抗力的效应。
<制造方法>
为了将具有这样的结构的半导体元件11搭载于半导体装置1，如图1所示，在半导体元件11为MOS晶体管的情况下，使用以锡为主要材料的焊料材料、或以银及铜为主要材料的烧结材料等接合材料31将成为下表面的漏极电极接合于导体基板21。
导体基板21为在由铜等导热性良好的材料构成的散热器(未图示)之上搭载了绝缘基板(未图示)的基板，在绝缘基板的上表面形成有电路图案，半导体元件11的漏极电极通过接合材料31与电路图案热连接且电连接。
成为半导体元件11的上表面的源极电极11c使用以锡为主要材料的焊料材料、或以银及铜为主要材料的烧结材料等接合材料32与以铜为主要材料的引线框22接合。此外，源极电极11c也可以设为通过导线键合等将以铝或铜为主要材料的直径几百μm的导线机械地接合，导线的另一端与外部端子连接的结构。
在半导体元件11向导体基板21的搭载完成后，例如，在模塑模具搭载将半导体元件11接合于导体基板21及引线框22的状态下的半成品，通过在向模塑模具内加压注入了模塑树脂后进行加热的传递模塑封装技术对封装树脂41进行成型，由此完成半导体装置1。
通过将环氧类树脂用于封装树脂41，从而与将凝胶用于封装材料的情况相比，能够使耐湿性及耐温度循环性等可靠性提高。
在将热固化型的树脂用于封装树脂41的情况下，如果半导体装置1承受到由温度循环引起的应力，则承受到来自封装树脂41的应力而在半导体元件11之上产生应力，半导体元件11的表面的保护膜14有可能剥离。
因此，使用图7～图9所示的应力等值线图说明针对半导体装置1承受到由温度循环引起的应力的情况下的在保护膜14和半导体元件11的界面产生的应力进行应力模拟而得到的结果。
图7是表示关于在栅极配线11b的外周侧不具有锚定膜13的半导体元件111的应力模拟结果的应力等值线图。
在图7中从上方起依次示出以半导体元件111的端部为起点开始保护膜14的剥离，剥离发展到内侧(源极电极11c侧)的情况下的剥离前端部14E的位置的变化。
在图7的最上部分的应力等值线图中，在半导体元件111及保护膜14的端部处产生拉伸应力的峰值，在剥离前端部14E处产生压缩应力的峰值。此外，在图7～图9中，颜色越深表示应力越高。
如从上方起第2个应力等值线图所示，如果应力进一步提高，则剥离前端部14E向内侧移动，剥离区域14O扩展。这样的情况在从上方起第3、第4、第5个应力等值线图中也相同，可知剥离前端部14E向内侧移动，剥离区域14O扩展。
另外，如图7所示，可知伴随剥离的发展，半导体元件111及保护膜14的端部的剥离起点处的拉伸应力的峰值的范围变大。
就半导体元件111而言，当剥离在末端区域11a之上向内侧发展的情况下，剥离前端部14E处的压缩应力的峰值没有变化，维持高的值。即，示出在一旦产生了保护膜14的剥离后，不能够对保护膜14的剥离的发展进行抑制。如果保护膜14的剥离进一步向内侧发展，例如到达栅极配线11b等，则引起栅极电极与源极电极之间的短路及栅极电极与漏极电极之间的放电开始电压的降低，半导体装置的可靠性降低。
图8是表示关于在栅极配线11b的外周侧设置了锚定膜13的半导体元件11的应力模拟结果的应力等值线图，是将锚定膜13的开口部13a的配置间隔设为10μm的情况下的应力模拟结果。
在图8中也与图7相同地从上方依次示出以半导体元件11的端部为起点开始保护膜14的剥离，剥离发展到内侧(源极电极11c侧)的情况下的剥离前端部14E的位置的变化。
在图8的最上部分的应力等值线图中，在半导体元件11及保护膜14的端部处产生拉伸应力的峰值，在剥离前端部14E处产生压缩应力的峰值。
如从上方起第2个应力等值线图所示，如果应力进一步提高，则剥离前端部14E向内侧移动，剥离区域14O扩展。这样的情况在从上方起第3、第4、第5个应力等值线图中也相同，可知剥离前端部14E向内侧移动，剥离区域14O扩展，这一点与半导体元件111相同，但当剥离在末端区域11a之上向内侧发展的情况下，在比剥离前端部14E更靠外侧的剥离区域14O，保护膜14钩挂于锚定膜13，拉伸应力在剥离区域14O分散开。
即，在从上方起第2个以下的应力等值线图中，在剥离区域14O内存在多个拉伸应力的峰值点，就该部分而言，保护膜14钩挂于锚定膜13的开口部13a，从而保护膜14作为拉伸应力而分担地承受来自封装树脂41的应力，其结果，能够使剥离前端部14E的压缩应力的峰值比半导体元件111小。可知其原因在于，与图7相比，即使剥离发展，半导体元件11及保护膜14的端部的剥离起点处的拉伸应力的峰值的范围也没有变大。
如果剥离前端部14E的压缩应力的峰值降低，则能够对剥离的发展进行抑制，如果能够对剥离的发展进行抑制，则能够使剥离进一步向内侧发展的速度降低，使半导体装置1长寿命化。
另外，即使从半导体元件11的最外周产生保护膜14的剥离而发展至末端区域11a的中途，也由于锚定膜13的开口部13a没有贯穿层间绝缘膜12，仅存在于锚定膜13，因此末端区域11a的碳化硅层维持被层间绝缘膜12覆盖的状态。因此，在末端区域11a不产生引起放电等的劣化现象，能够防止半导体元件11的耐压降低。
图9是表示关于在栅极配线11b的外周侧设置了锚定膜13的半导体元件11的应力模拟结果的应力等值线图，是将锚定膜13的开口部13a的配置间隔设为50μm的情况下的应力模拟结果。
在图9中也与图8相同地从上方依次示出以半导体元件11的端部为起点开始保护膜14的剥离，剥离发展到内侧(源极电极11c侧)的情况下的剥离前端部14E的位置的变化。
在图9的最上部分的应力等值线图中与图8的相同点是，在半导体元件11及保护膜14的端部处产生拉伸应力的峰值，在剥离前端部14E处产生压缩应力的峰值。根据从上方起第2个以下的应力等值线图可知，比剥离前端部14E更靠外侧的剥离区域14O处的保护膜14向开口部13a钩挂的位置少，因此锚定膜13不能够分担地承受剥离前端部14E的压缩应力。认为其原因在于，保护膜14本身伸展，由此通过锚定膜13的向开口部13a的钩挂不能够充分地保持在剥离前端部14E产生的压缩应力。
这样，需要与保护膜14的杨氏模量及击穿强度对应地对锚定膜13的开口部13a的间隔进行设计。在由聚酰亚胺形成保护膜14的情况下，如果考虑到聚酰亚胺烧制后的收缩等图案尺寸的变化，则优选将开口部13a的间隔设为大于或等于5μm且小于或等于20μm，能够兼顾应力降低效果和图案精度的确保。
例如，通过由氧化硅形成层间绝缘膜12，由氮化硅形成锚定膜13，由聚酰亚胺形成保护膜14，从而能够将层间绝缘膜12和锚定膜13设为比保护膜14硬的材料，在产生了保护膜14的剥离时，保护膜14产生变形，从而能够分担应力，能够防止锚定膜13剥离或层间绝缘膜12产生裂纹。另外，如果各自为上述材料，则能够通过现有的晶片工艺容易地形成，能够抑制制造成本的上升。
另外，通过将锚定膜13的开口部13a的内侧(形成了有源区域AR及栅极配线11b的一侧)的边设为圆弧状，从而能够将在剥离后的保护膜14发生卡挂时所产生的拉伸应力分散，能够防止锚定膜13剥离。
并且，通过分散地配置开口部13a，从而在发生了保护膜14的剥离时，能够在末端区域11a的平面内将压缩应力平面式地分散，能够防止剥离局部地发展。
就以上说明过的实施方式1的半导体装置1而言，将半导体元件11设为SiC半导体元件，但也可以是由硅构成的Si半导体元件。
SiC的绝缘破坏强度高达Si的约10倍，能够将半导体层的厚度降低为Si的约1/10，因此SiC半导体元件能够实现低导通电压，另外，在高温下也能够工作，因此SiC半导体元件与Si半导体元件相比能够实现小型化及高效化。
另外，半导体元件11并不限于向图1所示的结构的半导体装置1的搭载，只要是通过树脂对半导体元件进行封装的半导体装置，通过搭载半导体元件11就会取得与上述效果相同的效果。
此外，本发明可以在其发明的范围内对实施方式进行适当变形、省略。

Claims (11)

1.一种半导体装置，其具有：
基板；
半导体元件，其与所述基板接合；以及
封装树脂，其对所述基板的至少一部分和所述半导体元件进行封装，
所述半导体元件具有：
有源区域，其在所述半导体元件的接通状态下流过主电流；
所述有源区域的周围的末端区域；
锚定膜，其设置于所述末端区域的绝缘膜之上；以及
保护膜，其至少将包含所述锚定膜的所述末端区域覆盖，
所述锚定膜由与所述绝缘膜不同的材料构成，具有分散地设置的多个开口部。
2.根据权利要求1所述的半导体装置，其中，
所述锚定膜在俯视观察中是沿所述末端区域设置的，呈环状。
3.根据权利要求1所述的半导体装置，其中，
所述多个开口部具有至少所述有源区域侧的边呈圆弧状的俯视形状。
4.根据权利要求3所述的半导体装置，其中，
所述多个开口部的所述俯视形状呈圆形。
5.根据权利要求3所述的半导体装置，其中，
所述多个开口部的所述俯视形状呈半圆状。
6.根据权利要求3所述的半导体装置，其中，
所述多个开口部的所述俯视形状呈月牙形状。
7.根据权利要求1所述的半导体装置，其中，
所述多个开口部的最小间隔设置为大于或等于5μm且小于或等于20μm。
8.根据权利要求1所述的半导体装置，其中，
所述半导体元件为碳化硅半导体元件。
9.根据权利要求1所述的半导体装置，其中，
所述保护膜是以聚酰亚胺或聚酰胺为主要材料构成的膜。
10.根据权利要求1所述的半导体装置，其中，
所述锚定膜是以氮化硅为主要材料构成的膜。
11.一种半导体元件，其具有：
有源区域，其在接通状态下流过主电流；
所述有源区域的周围的末端区域；
锚定膜，其设置于所述末端区域的绝缘膜之上；以及
保护膜，其至少将包含所述锚定膜的所述末端区域覆盖，
所述锚定膜由与所述绝缘膜不同的材料构成，具有在所述锚定膜整体分散地设置的多个开口部。
CN202010886116.5A 2019-09-04 2020-08-28 半导体装置及半导体元件 Pending CN112447610A (zh)

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