CN112018053A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN112018053A
CN112018053A CN202010454386.9A CN202010454386A CN112018053A CN 112018053 A CN112018053 A CN 112018053A CN 202010454386 A CN202010454386 A CN 202010454386A CN 112018053 A CN112018053 A CN 112018053A
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semiconductor device
package
semiconductor element
die pad
lead
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CN112018053B (zh
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城地雅史
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

目的在于提供能够确保可靠性，并且实现引线的窄间距化及大数量化的半导体装置。半导体装置包含半导体元件、管芯焊盘、封装材料、多个引线。管芯焊盘在表面搭载有半导体元件。封装材料将半导体元件覆盖而进行封装。多个引线各自的一端在封装材料的内部与半导体元件连接，各自的另一端被从封装材料的侧面引出。包含半导体元件、管芯焊盘和封装材料的封装件的下表面位于管芯焊盘的背面侧，具有凸状的翘曲形状。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
当前，表面安装型的半导体装置广泛使用了SOP(Small Outline Package)、SON(Small Outline No leads)等封装件。表面安装型的封装件由于其下表面直接与基板等的规定位置接触地安装，因此散热特性优异。
SOP型的半导体装置由搭载于管芯焊盘之上的半导体元件、引线、封装树脂构成。引线设置于封装件的两端，通过键合线与半导体元件电连接。封装树脂对管芯焊盘、半导体元件及引线的一部分进行封装而构成封装件。在专利文献1中示出SOP型的半导体装置的一个例子。该半导体装置具有在封装树脂的下表面设置的凸部，通过该凸部及引线对半导体装置进行支撑。另外，专利文献1的半导体装置通过在由该凸部形成的封装件下部的空间，埋入其它封装件的引线而进行安装，从而实现高密度安装。
SON型的半导体装置具有与SOP型的半导体装置相同的内部结构，但其引线是通过切割等加工的，形成为与封装树脂的下表面及侧面共面。
专利文献1：日本特开平08-125069号公报
就SOP型的半导体装置而言，在封装件的下表面、鸥翼型的引线的高度产生偏差的情况下，封装件的下表面与基板的接触、或引线与基板的接触的任意者容易产生不良。这样的不良使半导体装置的可靠性变差。
另一方面，就SON型的半导体装置而言，由于封装件的下表面与引线形成为共面，因此它们与基板可靠地接触。但是，引线需要适于向基板直接安装的平坦性及机械强度，从该观点出发，封装件的外形尺寸受到限制。因此，引线的窄间距化及大数量化受到限制。
发明内容
本发明就是为了解决上述那样的问题而提出的，其目的在于提供能够确保可靠性，并且实现引线的窄间距化及大数量化的半导体装置。
本发明涉及的半导体装置包含半导体元件、管芯焊盘、封装材料、多个引线。管芯焊盘在表面搭载有半导体元件。封装材料将半导体元件覆盖而进行封装。多个引线各自的一端在封装材料的内部与半导体元件连接，各自的另一端被从封装材料的侧面引出。包含半导体元件、管芯焊盘和封装材料的封装件的下表面位于管芯焊盘的背面侧，具有凸状的翘曲形状。
发明的效果
根据本发明，能够提供确保可靠性，并且实现引线的窄间距化及大数量化的半导体装置。
通过下面的详细的说明和附图，本发明的目的、特征、方案、及优点会变得更加明了。
附图说明
图1是表示实施方式1中的半导体装置的结构的仰视图。
图2是图1所示的A-A’处的剖视图。
图3是图1所示的B-B’处的剖视图。
图4是表示图1所示的半导体装置的接线的结构的接线图。
图5是表示实施方式1中的半导体装置安装于印刷电路基板时的半导体装置的状态的剖视图。
图6是表示实施方式1中的半导体装置安装于印刷电路基板时的半导体装置的状态的剖视图。
图7是表示实施方式1中的半导体装置安装于印刷电路基板时的半导体装置的状态的剖视图。
图8是表示实施方式1中的半导体装置安装于印刷电路基板时的半导体装置的状态的剖视图。
图9是表示实施方式2中的半导体装置的结构的剖视图。
图10是表示实施方式3中的半导体装置的结构的剖视图。
图11是表示实施方式3中的半导体装置的结构的剖视图。
图12是表示实施方式4中的半导体装置的结构的剖视图。
图13是表示实施方式5中的半导体装置的结构的剖视图。
图14是表示图13所示的半导体装置的接线的结构的接线图。
标号的说明
1半导体元件，2管芯焊盘，3封装材料，3A侧面，4引线，4A一端，4B另一端，7凸起部，8缓冲电容器，9封装件，9A下表面，10控制IC，C中心，G重心。
具体实施方式
<实施方式1>
图1是表示实施方式1中的半导体装置的结构的仰视图。图2是图1所示的A-A’处的剖视图。图3是图1所示的B-B’处的剖视图。图4是表示图1所示的半导体装置的接线的结构的接线图。
半导体装置包含半导体元件1、管芯焊盘2、封装材料3及多个引线4。
半导体元件1例如为IGBT(Insulated Gate Bipolar Transistor)、MOSFET(MetalOxide Semiconductor Field Effect Transistor)、肖特基势垒二极管等电力半导体元件(功率半导体元件)。实施方式1中的半导体装置包含2个半导体元件1。2个半导体元件1各自为低电位侧电力半导体元件1A及高电位侧电力半导体元件1B。
管芯焊盘2具有导电性，在其表面搭载有半导体元件1。实施方式1中的半导体装置与低电位侧电力半导体元件1A及高电位侧电力半导体元件1B对应地包含2个管芯焊盘2。低电位侧电力半导体元件1A及高电位侧电力半导体元件1B通过焊料，被固定于与各自对应的管芯焊盘2的表面。另外，管芯焊盘2的背面具有以凸状翘曲的形状。
封装材料3具有绝缘性，将半导体元件1和管芯焊盘2的表面覆盖而进行封装。封装材料3例如为树脂。实施方式1中的封装材料3形成为使得管芯焊盘2的背面露出，并且使得封装材料3的背面成为与管芯焊盘2的翘曲形状共面的曲面。
封装件9包含半导体元件1、管芯焊盘2和封装材料3。封装件9的下表面9A是位于管芯焊盘2的背面侧的面。该封装件9的下表面9A由封装材料3的背面、从封装材料3露出的管芯焊盘2的背面构成。封装件9的下表面9A具有凸状的翘曲形状，并且，与从封装材料3露出的管芯焊盘2的背面共面。在实施方式1中，凸状的翘曲形状是在封装件9的下表面9A的一个方向以凸状翘曲。具体而言，如图2及图3所示，凸状的翘曲形状是在X方向翘曲，在Y方向没有翘曲。
引线4的一端4A在封装材料3的内部经由键合线5与半导体元件1连接。实施方式1中的半导体装置包含5根引线4。该5根中的1根引线4的一端4A通过键合线5与低电位侧电力半导体元件1A的发射极电极(未图示)连接。
引线4的另一端4B被从封装材料3的侧面3A引出。实施方式1中的引线4从封装材料3的侧面3A凸出，并且具有鸥翼型的形状。
优选包含封装件9和引线4的构造即半导体装置的重心G相对于俯视观察中的封装件9的中心C偏心。实施方式1中的重心G位于管芯焊盘2的端部(右端R)和引出了引线4的侧面3A之间。
在实施方式1中，引线4被从构成封装材料3的外表面的多个侧面中的一个方向的侧面引出。该一个方向与封装件9的下表面9A翘曲的X方向对应。5根引线4是偏聚在位于该X方向的2个侧面中的右侧的1个侧面3A而设置的。通过这样的结构，重心G位于比管芯焊盘2的端部(右端R)更偏向引出了引线4的侧面3A的方向的位置。换言之，重心G的位置能够通过对引线4的形状或材质进行变更而调整。
接着，对半导体装置的电连接进行说明。由于低电位侧电力半导体元件1A及高电位侧电力半导体元件1B各自直接被焊接于管芯焊盘2，因此各自的集电极(collector)电极(electrode)(未图示)与管芯焊盘2电连接。
5根中的1根引线4的一端4A通过键合线5与低电位侧电力半导体元件1A的发射极电极连接。与低电位侧电力半导体元件1A的集电极电极电连接的管芯焊盘2通过键合线5与高电位侧电力半导体元件1B的发射极电极(未图示)连接。
虽然省略了图示，但是低电位侧电力半导体元件1A的栅极电极及发射极感测电极通过键合线5而各自连接于与上述引线4不同的2根引线4的一端4A。相同地，高电位侧电力半导体元件1B的栅极电极及发射极感测电极通过键合线5而各自连接于剩余的2根引线4的一端4A。
如图4所示，低电位侧电力半导体元件1A及高电位侧电力半导体元件1B串联地接线。在图4中，高电位侧电力半导体元件1B的集电极电极由C1表示。高电位侧电力半导体元件1B的发射极电极和低电位侧电力半导体元件1A的集电极电极由C2E1表示。低电位侧电力半导体元件1A的发射极电极由E2表示。高电位侧电力半导体元件1B及低电位侧电力半导体元件1A的栅极电极各自由G1及G2表示。发射极感测电极由Es1、Es2表示。此外，在图4中如双点划线所示，也可以在低电位侧电力半导体元件1A及高电位侧电力半导体元件1B各自的集电极-发射极间并联连接续流二极管6。
图5至图8是表示实施方式1中的半导体装置安装于印刷电路基板11时的半导体装置的状态的剖视图。图5及图6示出引线4的另一端4B处于比预先确定好的位置高的位置的情况。图7及图8示出引线4的另一端4B处于比预先确定好的位置低的位置的情况。这里，预先确定好的位置对应于如下情况，即，引线4的另一端4B的高度为与包含封装件9的下表面9A的顶部在内的水平面相同的高度。这样的引线4的另一端4B的高度波动例如是由引线4从封装材料3凸出的位置相对于设计位置偏移、引线4的成型相对于设计形状产生偏差等半导体装置的制造波动产生的。在印刷电路基板11中，在预先确定好的位置设置有基板电极12。这里，作为基板电极12，印刷电路基板11具有用于与管芯焊盘2的背面连接的基板电极12A、以及用于与引线4的另一端4B连接的基板电极12B。
如图5所示，在引线4的另一端4B处于比预先确定好的位置高的位置的情况下，与封装件9的下表面9A的顶部对应的管芯焊盘2与印刷电路基板11的基板电极12A接触。另一方面，引线4的另一端4B没有与基板电极12B接触。另外，在该状态下，管芯焊盘2和基板电极12A的接触点CP与重心G相对于重力方向(-Z方向)来说没有位于同一直线上。
因此，在图5所示的箭头的方向产生力矩。其结果，如图6所示，半导体装置顺时针地旋转。此时，半导体装置进行旋转，直至接触点CP与重心G相对于重力方向来说位于同一直线上为止、或引线4的另一端4B与基板电极12B接触为止。这里，就半导体装置而言，引线4的另一端4B与基板电极12B接触而静止。管芯焊盘2的背面及引线4的另一端4B都与基板电极12接触。在该状态下，管芯焊盘2的背面及引线4的另一端4B各自被焊接于基板电极12A及12B。其结果，管芯焊盘2以可靠地与基板电极12A接触的状态被固定，引线4的另一端4B以可靠地与基板电极12B接触的状态被固定。
如图7所示，在引线4处于比预先确定好的位置低的位置的情况下，引线4的另一端4B与基板电极12B接触。另一方面，与封装件9的下表面9A的顶部对应的管芯焊盘2没有与基板电极12A接触。
因此，在图7所示的箭头的方向产生力矩。其结果，如图8所示，半导体装置逆时针地旋转。而且，就半导体装置而言，管芯焊盘2的背面与基板电极12A接触而静止。在该状态下，管芯焊盘2的背面及引线4的另一端4B各自被焊接于基板电极12。其结果，管芯焊盘2以可靠地与基板电极12A接触的状态被固定，引线4的另一端4B以可靠地与基板电极12B接触的状态被固定。
这样，通过将引线4设置为偏聚在1个侧面3A而使重心G偏心，并且使封装件9的下表面9A具有凸状的翘曲形状，从而半导体装置旋转。由此，缓和了引线4的高度波动的影响。
综上所述，实施方式1中的半导体装置包含半导体元件1、管芯焊盘2、封装材料3、多个引线4。管芯焊盘2在表面搭载有半导体元件1。封装材料3将半导体元件1覆盖而进行封装。多个引线4各自的一端4A在封装材料3的内部与半导体元件1连接，各自的另一端4B被从封装材料3的侧面3A引出。包含半导体元件1、管芯焊盘2和封装材料3的封装件9的下表面9A位于管芯焊盘2的背面侧，具有凸状的翘曲形状。
这样的半导体装置即使在引线4的另一端4B的高度产生制造波动的情况下，也能够使管芯焊盘2及引线4这两者可靠地与印刷电路基板11的基板电极12接触而固定。因此，散热特性及电特性的可靠性提高。另外，由于不需要严格地对与封装件9的平面度及引线4的高度相关的制造精度进行管理，因此半导体装置的制造变得容易。并且，由于引线4具有鸥翼型的形状，因此与扁平引线、无引线封装件等相比，能够实现引线4的窄间距化及大数量化。具有这样的结构的表面安装型的半导体装置适于电动机驱动用等的电力半导体装置。
另外，实施方式1中的包含封装件9和多个引线4的构造的重心G在俯视观察中相对于封装件9的中心C偏心。
这样的半导体装置即使在引线4相对于预先确定好的位置偏移的情况下，也能够使管芯焊盘2及引线4的另一端4B这两者各自与基板电极12接触而固定。
另外，实施方式1中的半导体装置的凸状的翘曲形状在封装件9的下表面9A的一个方向以凸状翘曲。多个引线4被从构成封装材料3的外表面的多个侧面中的一个方向的侧面3A引出。
这样的半导体装置即使在引线4相对于预先确定好的位置偏移的情况下，也能够通过封装件9向一个方向的旋转，使管芯焊盘2及引线4的另一端4B这两者各自与基板电极12接触而固定。
<实施方式2>
对实施方式2中的半导体装置进行说明。实施方式2为实施方式1的下位概念，实施方式2中的半导体装置包含实施方式1中的半导体装置的各结构。此外，关于与实施方式1相同的结构及动作，省略说明。
图9是表示实施方式2中的半导体装置的结构的剖视图。
封装材料3在背面包含凸起部7。即，封装材料3在封装件9的下表面9A包含凸起部7。凸起部7由与封装材料3相同的材料形成，具有封装材料3的下表面的一部分凸出的形状。凸起部7相对于封装件9的中心C，设置于与设置有引线4侧相反侧的封装件9的下表面9A。另外，实施方式2中的凸起部7位于管芯焊盘2附近。
通过该凸起部7，限制了封装件9的由图9的箭头所示的逆时针的旋转，限定为顺时针的旋转。凸起部7防止了在装配中或输送中，半导体装置从规定位置旋转或摇晃。另外，如实施方式1所示，在引线4从比预先确定好的位置低的位置凸出的情况下，凸起部7防止了半导体装置过度地逆时针旋转。其结果，管芯焊盘2及引线4这两者各自可靠地与基板电极12接触。这样，凸起部7作为限位器起作用。
<实施方式3>
对实施方式3中的半导体装置进行说明。实施方式3为实施方式1的下位概念，实施方式3中的半导体装置包含实施方式1中的半导体装置的各结构。此外，关于与实施方式1或2相同的结构及动作，省略说明。
图10及图11是表示实施方式3中的半导体装置的结构的剖视图。
半导体装置还包含在封装材料3的内部设置的缓冲电容器8。缓冲电容器8搭载于与实施方式1所示的引线4不同的引线4的一端4A之上。该不同的引线4从引出了引线4的封装材料3的侧面3A向与该侧面3A相反侧的侧面的方向延伸。
缓冲电容器8的一个电极通过键合线5与高电位侧电力半导体元件1B的集电极电极连接。另一个电极通过键合线5与低电位侧电力半导体元件1A的发射极电极连接。由于缓冲电容器8之外的接线与图3所示的接线相同，因此在图11中省略。这样，缓冲电容器8与半导体元件1并联连接。
包含缓冲电容器8的缓冲电路在与引出了引线4的侧面3A相反侧，以不与半导体元件1及控制电路配线交叉及干涉的方式与半导体元件1连接。缓冲电容器8是在半导体元件1的紧邻处连接的。
通过这样的结构，能够降低配线的电感，降低通断动作时的浪涌电压。
<实施方式4>
对实施方式4中的半导体装置进行说明。实施方式4为实施方式1的下位概念，实施方式4中的半导体装置包含实施方式1中的半导体装置的各结构。此外，关于与实施方式1至3中的任意者相同的结构及动作，省略说明。
图12是表示实施方式4中的半导体装置的结构的剖视图。半导体装置包含与实施方式3相同的缓冲电容器8。
作为材料，实施方式4中的半导体元件1包含碳化硅(SiC)等宽带隙半导体。
作为材料包含宽带隙半导体的半导体元件1与通常的硅制的半导体元件1相比能够进行高速通断动作。另一方面，通断动作时的浪涌电压大。在实施方式4中，连接于半导体元件1的紧邻处的缓冲电容器8对该浪涌电压进行抑制。
这样的半导体装置兼顾了半导体元件1的高速通断动作、通断动作时的浪涌电压的抑制。
宽带隙半导体并不限于碳化硅。氮化镓(GaN)等其它宽带隙半导体也取得与上述相同的效果。
<实施方式5>
对实施方式5中的半导体装置进行说明。实施方式5为实施方式1的下位概念，实施方式5中的半导体装置包含实施方式1中的半导体装置的各结构。此外，关于与实施方式1至4中的任意者相同的结构及动作，省略说明。
图13是表示实施方式5中的半导体装置的结构的剖视图。图14是表示图13所示的半导体装置的接线的结构的接线图。
半导体装置设置于封装材料3的内部，包含对半导体元件1的驱动进行控制的控制IC(Integrated Circuit)10。这里，半导体装置包含各自对高电位侧电力半导体元件1B及低电位侧电力半导体元件1A的驱动进行控制的2个控制IC 10。
引线4和控制IC 10通过键合线5连接，另外，控制IC 10和半导体元件1也通过键合线5连接。
在图14中，与高电位侧电力半导体元件1B连接的控制IC 10的控制输入信号端子由HIN表示，控制电源端子由VP1表示，驱动电源端子由VB表示。与低电位侧电力半导体元件1A连接的控制IC10的控制输入信号端子由LIN表示，控制电源端子由VN1表示。2个控制IC10的控制GND端子由VNC表示。
由于搭载控制IC 10，引线4的根数增加。但是，由于引线4具有鸥翼型的形状，因此与扁平引线、无引线封装件等相比，实施方式5中的半导体装置不需要使其制造精度提高，能够实现引线4的窄间距化及大数量化。
此外，在实施方式5中，关于控制IC 10的端子，仅示出半导体元件1的驱动所需要的端子。但是，也可以追加地设置错误信号输出端子、模拟温度输出端子等与控制IC 10的功能对应的引线4及键合线5。
另外，实施方式5中的半导体装置也可以是如下结构，即，取代2个控制IC 10而包含对高电位侧电力半导体元件1B及低电位侧电力半导体元件1A这两者的驱动进行控制的1个控制IC。
此外，本发明可以在其发明的范围内将各实施方式自由地组合，对各实施方式适当进行变形、省略。
虽然对本发明进行了详细说明，但上述的说明在全部的方面都只是例示，本发明并不限定于此。应当理解为，在不脱离本发明的范围的情况下，能够设想到未例示的无数的变形例。

Claims (7)

1.一种半导体装置，其具有：
半导体元件；
管芯焊盘，其在表面搭载所述半导体元件；
封装材料，其将所述半导体元件覆盖而封装；以及
多个引线，它们各自的一端在所述封装材料的内部与所述半导体元件连接，各自的另一端被从所述封装材料的侧面引出，
包含所述半导体元件、所述管芯焊盘和所述封装材料的封装件的下表面位于所述管芯焊盘的背面侧，具有凸状的翘曲形状。
2.根据权利要求1所述的半导体装置，其中，
包含所述封装件和所述多个引线的构造的重心在俯视观察中相对于所述封装件的中心偏心。
3.根据权利要求1或2所述的半导体装置，其中，
还具有控制IC即控制集成电路，该控制IC设置于所述封装材料的所述内部，对所述半导体元件的驱动进行控制。
4.根据权利要求1至3中任一项所述的半导体装置，其中，
还具有缓冲电容器，该缓冲电容器设置于所述封装材料的所述内部，与所述半导体元件并联连接。
5.根据权利要求1至4中任一项所述的半导体装置，其中，
作为材料，所述半导体元件包含宽带隙半导体。
6.根据权利要求1至5中任一项所述的半导体装置，其中，
所述封装材料在所述封装件的所述下表面包含凸起部。
7.根据权利要求1至6中任一项所述的半导体装置，其中，
所述凸状的所述翘曲形状在所述封装件的所述下表面的一个方向以凸状翘曲，
所述多个引线被从构成所述封装材料的外表面的多个侧面中的所述一个方向的所述侧面引出。
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