CN1119341A - 用于多层晶片的吸收层和生产该吸收层的方法 - Google Patents

用于多层晶片的吸收层和生产该吸收层的方法 Download PDF

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Publication number
CN1119341A
CN1119341A CN95107181A CN95107181A CN1119341A CN 1119341 A CN1119341 A CN 1119341A CN 95107181 A CN95107181 A CN 95107181A CN 95107181 A CN95107181 A CN 95107181A CN 1119341 A CN1119341 A CN 1119341A
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CN
China
Prior art keywords
polysilicon
wafer
working lining
layer
absorbed layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN95107181A
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English (en)
Chinese (zh)
Inventor
威廉·G·伊斯特尔
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AT&T Corp
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AT&T Corp
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Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Publication of CN1119341A publication Critical patent/CN1119341A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/912—Charge transfer device using both electron and hole signal carriers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
CN95107181A 1994-06-03 1995-06-02 用于多层晶片的吸收层和生产该吸收层的方法 Pending CN1119341A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US253657 1988-10-05
US25365794A 1994-06-03 1994-06-03

Publications (1)

Publication Number Publication Date
CN1119341A true CN1119341A (zh) 1996-03-27

Family

ID=22961174

Family Applications (1)

Application Number Title Priority Date Filing Date
CN95107181A Pending CN1119341A (zh) 1994-06-03 1995-06-02 用于多层晶片的吸收层和生产该吸收层的方法

Country Status (6)

Country Link
US (1) US5892292A (en:Method)
JP (2) JPH07335654A (en:Method)
KR (1) KR960002685A (en:Method)
CN (1) CN1119341A (en:Method)
DE (1) DE19519533B4 (en:Method)
TW (1) TW274628B (en:Method)

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US6008082A (en) * 1995-09-14 1999-12-28 Micron Technology, Inc. Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry
US5567644A (en) 1995-09-14 1996-10-22 Micron Technology, Inc. Method of making a resistor
US6093624A (en) * 1997-12-23 2000-07-25 Philips Electronics North America Corporation Method of providing a gettering scheme in the manufacture of silicon-on-insulator (SOI) integrated circuits
JP2000323484A (ja) * 1999-05-07 2000-11-24 Mitsubishi Electric Corp 半導体装置及び半導体記憶装置
US6508363B1 (en) 2000-03-31 2003-01-21 Lucent Technologies Slurry container
US20020140030A1 (en) * 2001-03-30 2002-10-03 Mandelman Jack A. SOI devices with integrated gettering structure
US6958264B1 (en) * 2001-04-03 2005-10-25 Advanced Micro Devices, Inc. Scribe lane for gettering of contaminants on SOI wafers and gettering method
US7045885B1 (en) 2004-12-09 2006-05-16 Hewlett-Packard Development Company, L.P. Placement of absorbing material in a semiconductor device

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JPS542657A (en) * 1977-06-08 1979-01-10 Mitsubishi Electric Corp Manufacture for semiconductor device
US4178191A (en) * 1978-08-10 1979-12-11 Rca Corp. Process of making a planar MOS silicon-on-insulating substrate device
JPS574163A (en) * 1980-06-09 1982-01-09 Nec Corp Manufacture of sos/mos transistor
JPS57162444A (en) * 1981-03-31 1982-10-06 Fujitsu Ltd Manufacture of semiconductor device
US4574209A (en) * 1982-06-21 1986-03-04 Eaton Corporation Split gate EFET and circuitry
US4498227A (en) * 1983-07-05 1985-02-12 Fairchild Camera & Instrument Corporation Wafer fabrication by implanting through protective layer
US4661202A (en) * 1984-02-14 1987-04-28 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US4583282A (en) * 1984-09-14 1986-04-22 Motorola, Inc. Process for self-aligned buried layer, field guard, and isolation
US4631804A (en) * 1984-12-10 1986-12-30 At&T Bell Laboratories Technique for reducing substrate warpage springback using a polysilicon subsurface strained layer
JPS61256740A (ja) * 1985-05-10 1986-11-14 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6224854A (ja) * 1985-07-24 1987-02-02 Nippon Kokan Kk <Nkk> 真空ア−ク再溶解装置
JPS6276646A (ja) * 1985-09-30 1987-04-08 Toshiba Corp 半導体装置の製造方法
DD258681A1 (de) * 1986-04-02 1988-07-27 Erfurt Mikroelektronik Verfahren zum herstellen getterfaehiger und formstabiler halbleiterscheiben
JPS632370A (ja) * 1986-06-23 1988-01-07 Nissan Motor Co Ltd 半導体装置
US4732865A (en) * 1986-10-03 1988-03-22 Tektronix, Inc. Self-aligned internal mobile ion getter for multi-layer metallization on integrated circuits
JPS63237574A (ja) * 1987-03-26 1988-10-04 Nec Corp Ｍｉｓ型半導体装置の製造方法
JPS63310123A (ja) * 1987-06-12 1988-12-19 Kyushu Denshi Kinzoku Kk シリコン半導体基板
US4820653A (en) * 1988-02-12 1989-04-11 American Telephone And Telegraph Company Technique for fabricating complementary dielectrically isolated wafer
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JPH02148855A (ja) * 1988-11-30 1990-06-07 Fujitsu Ltd 半導体装置及びその製造方法
US4883215A (en) * 1988-12-19 1989-11-28 Duke University Method for bubble-free bonding of silicon wafers
JPH02237120A (ja) * 1989-03-10 1990-09-19 Fujitsu Ltd 半導体装置とその製造方法
US5001075A (en) * 1989-04-03 1991-03-19 Motorola Fabrication of dielectrically isolated semiconductor device
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JP2597022B2 (ja) * 1990-02-23 1997-04-02 シャープ株式会社 素子分離領域の形成方法
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Also Published As

Publication number Publication date
JPH07335654A (ja) 1995-12-22
DE19519533B4 (de) 2009-05-28
US5892292A (en) 1999-04-06
KR960002685A (ko) 1996-01-26
JP2006324688A (ja) 2006-11-30
TW274628B (en:Method) 1996-04-21
DE19519533A1 (de) 1995-12-07

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