CN111831049A - 恒流电路及半导体装置 - Google Patents

恒流电路及半导体装置 Download PDF

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CN111831049A
CN111831049A CN202010304850.6A CN202010304850A CN111831049A CN 111831049 A CN111831049 A CN 111831049A CN 202010304850 A CN202010304850 A CN 202010304850A CN 111831049 A CN111831049 A CN 111831049A
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constant current
nmos transistor
resistor
current circuit
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挽地友生
深井健太郎
飞冈孝明
小川洋平
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Ablic Inc
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Abstract

一种恒流电路，具备漏极与恒流输出端子连接的耗尽型NMOS晶体管和设置在NMOS晶体管与接地端子之间的电阻元件，耗尽型NMOS晶体管由并联连接且以电流方向相差90度的方式配置的耗尽型第一及第二NMOS晶体管构成，电阻元件由以电流方向相差90度的方式配置的第一及第二电阻构成。

Description

恒流电路及半导体装置
技术领域
本发明涉及恒流电路及具备该恒流电路的半导体装置。
背景技术
以往，已知如下的恒流电路：具备与耗尽型MOS晶体管串联的电阻，即使在制造工序中MOS晶体管的阈值变动，也能够得到稳定的恒流（例如参照专利文献1）。
【现有技术文件】
【专利文献】
【专利文献1】日本特开平11-194844号公报。
发明内容
【发明要解决的课题】
然而，在以往的恒流电路中，针对制造工序中MOS晶体管的特性偏差来管理电流值的精度，但是没有针对在被密封于树脂封装时施加应力而电流值的精度等特性发生偏移的情况进行考虑。
本发明的目的在于提供能够针对被密封于树脂封装时的应力来管理恒流的精度的恒流电路。
【解决课题的手段】
本发明的实施例涉及的恒流电路的特征在于：具备漏极与恒流输出端子连接的耗尽型NMOS晶体管和设置在所述NMOS晶体管与接地端子之间的电阻元件，所述耗尽型NMOS晶体管由并联连接且以电流方向成90度的方式配置的耗尽型第一及第二NMOS晶体管构成，所述电阻元件由以电流方向成90度的方式配置的第一及第二电阻构成。
【发明效果】
根据本发明的恒流电路，由于用并联连接且以电流方向成90度的方式配置的2个耗尽型NMOS晶体管构成耗尽型NMOS晶体管，所以能够针对被密封于树脂封装时的应力容易地管理恒流值。
【附图说明】
【图1】是示出本发明的实施方式的恒流电路的一个示例的电路图。
【图2】是示出本实施方式的恒流电路的其他示例的电路图。
【图3】是示出本实施方式的恒流电路的其他示例的电路图。
【图4】是示出本实施方式的恒流电路的其他示例的电路图。
【具体实施方式】
以下，参照附图，对本发明的实施方式进行说明。
图1是示出本发明的实施方式的恒流电路的一个示例的电路图。
恒流电路100具备耗尽型NMOS晶体管11、耗尽型NMOS晶体管12、电阻21和电阻22。
关于NMOS晶体管11和NMOS晶体管12，漏极都与电流输出端子2连接，栅极都与接地端子1连接，源极都与电阻21的一端连接。即，NMOS晶体管11和NMOS晶体管12并联地电连接。电阻22的一端与电阻21的另一端连接，而另一端与接地端子1连接。
NMOS晶体管11和NMOS晶体管12在半导体基板上以电流流动的方向、即漏极-源极方向成90度的方式配置。同样地，电阻21和电阻22以电流流动的方向成90度的方式配置。在此，将NMOS晶体管11和电阻21的电流流动的方向作为x方向（第一方向），将NMOS晶体管12和电阻22的电流流动的方向作为y方向（第二方向）。
关于如上述那样构成的恒流电路100，说明特性相对于被密封于树脂封装时的应力的变化。
在被密封于树脂封装的半导体芯片中，若将芯片表面作为xy平面，则施加于芯片中心部分的应力成为x分量应力σxx与y分量应力σyy之和（σxx +σyy：各向同性应力）。将应力乘以构成电路的元件固有的压电常数π的π（σxx+σyy）成为主要的偏移量，从而特性发生变化。
严格地说，有必要将压电常数π分解为电流方向与应力矢量平行的情况下的π//和电流方向与应力矢量垂直的情况下的π⊥来进行讨论。
由于NMOS晶体管11和电阻21的电流流动的方向是x方向，所以主要的偏移量是π//σxx+π⊥σyy。另外，由于NMOS晶体管12和电阻22的电流流动的方向是y方向，所以主要的偏移量是π⊥σxx +π//σyy。
因此，NMOS晶体管11和NMOS晶体管12以及电阻21和电阻22的特性的主要的偏移量成为（π//+π⊥）（σxx+σyy），成为与各向同性应力成比例的形式。
如以上说明的那样，恒流电路100将NMOS晶体管11和NMOS晶体管12、以及电阻21和电阻22分别以成90度的方式配置，从而x分量应力σxx和y分量应力σyy各自独立地产生偏差时，只要它们的和不产生偏差，则主要的偏移量也是恒定的。因此，能够得到容易预估响应应力的动作这一效果。
这样，恒流电路100将构成要素即晶体管和电阻分别以成90°的方式配置，因此能够输出相对于各向同性应力成比例的恒流。
图2是示出本实施方式的恒流电路的其他示例的电路图。
恒流电路200具备耗尽型NMOS晶体管11、耗尽型NMOS晶体管12、电阻21和电阻22。
与恒流电路100的区别在于：电阻21和电阻22并联地电连接。即，并联连接的NMOS晶体管11和NMOS晶体管12、以及电阻21和电阻22分别以成90度的方式配置。
图3是示出本实施方式的恒流电路的其他示例的电路图。
恒流电路300具备耗尽型NMOS晶体管11、耗尽型NMOS晶体管12、电阻21和电阻22。
与恒流电路200的区别在于：NMOS晶体管11和电阻21串联连接、NMOS晶体管12和电阻22串联连接。即，串联连接的电流方向相同的NMOS晶体管11和电阻21、以及串联连接的电流方向相同的NMOS晶体管12和电阻22以成90度的方式配置。
图4是示出本实施方式的恒流电路的其他示例的电路图。
恒流电路400具备耗尽型NMOS晶体管11、耗尽型NMOS晶体管12、电阻21和电阻22。
与恒流电路300的区别在于：串联连接的NMOS晶体管和电阻以彼此的电流方向不同且分别成90度的方式配置。
图2至图4所示出的恒流电路200、300、400能够得到与图1的恒流电路100同样的效果。
以上对本发明的实施方式进行了说明，但本发明不限于上述实施方式，能够在不脱离本发明的主旨的范围内进行各种变更这一点无需赘述。
例如，示出了耗尽型晶体管栅极接地的示例，但与超过阈值VTH的基准电压连接也没有关系。
本发明的恒流电路组装到半导体装置中是容易的。例如，适合使用于成为具备霍尔元件的传感器的半导体装置。作为霍尔元件，其主要特性的偏移量与各向同性应力成比例地被决定。因此，本发明的恒流电路在要对被密封于树脂封装时的霍尔元件的主要特性的偏移进行校正时，发挥利用价值。
【标号说明】
1　 　接地端子
2　 　电流输出端子
11、12 　　耗尽型晶体管
21、22　 　电阻
100、200、300、400　　恒流电路。

Claims (7)

1.一种恒流电路，该恒流电路具备漏极与恒流输出端子连接的耗尽型NMOS晶体管；和设置在所述NMOS晶体管与接地端子之间的电阻元件，其特征在于：
所述耗尽型NMOS晶体管由耗尽型第一及第二NMOS晶体管构成，该耗尽型第一及第二NMOS晶体管并联连接且以电流方向成90度的方式配置，
所述电阻元件由第一及第二电阻构成，该第一及第二电阻以电流方向成90度的方式配置。
2.如权利要求1所述的恒流电路，其特征在于：
所述第一电阻和所述第二电阻在所述第一及第二NMOS晶体管的源极与接地端子之间串联连接。
3.如权利要求1所述的恒流电路，其特征在于：
所述第一电阻和所述第二电阻在所述第一及第二NMOS晶体管的源极与接地端子之间并联连接。
4.一种恒流电路，该恒流电路具备漏极与恒流输出端子连接的耗尽型NMOS晶体管和设置在所述NMOS晶体管与接地端子之间的电阻元件，其特征在于：
所述耗尽型NMOS晶体管由耗尽型第一及第二NMOS晶体管构成，该耗尽型第一及第二NMOS晶体管栅极共同连接且以电流方向成90度的方式配置，
所述电阻元件由第一及第二电阻构成，该第一及第二电阻以电流方向成90度的方式配置，
所述第一电阻在所述第一NMOS晶体管的源极与接地端子之间连接，
所述第二电阻在所述第二NMOS晶体管的源极与接地端子之间连接。
5.如权利要求4所述的恒流电路，其特征在于：
所述第一电阻以与所述第一NMOS晶体管电流方向相同的方式配置，
所述第二电阻以与所述第二NMOS晶体管电流方向相同的方式配置。
6.如权利要求4所述的恒流电路，其特征在于：
所述第一电阻以与所述第一NMOS晶体管电流方向成90度的方式配置，
所述第二电阻以与所述第二NMOS晶体管电流方向成90度的方式配置。
7.一种半导体装置，具备如权利要求1至6中任一项所述的恒流电路。
CN202010304850.6A 2019-04-17 2020-04-17 恒流电路及半导体装置 Pending CN111831049A (zh)

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