CN111668171B - 芯片承载结构及芯片承载设备 - Google Patents
芯片承载结构及芯片承载设备 Download PDFInfo
- Publication number
- CN111668171B CN111668171B CN201910329373.6A CN201910329373A CN111668171B CN 111668171 B CN111668171 B CN 111668171B CN 201910329373 A CN201910329373 A CN 201910329373A CN 111668171 B CN111668171 B CN 111668171B
- Authority
- CN
- China
- Prior art keywords
- chip
- micro
- circuit substrate
- chips
- heaters
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 claims abstract description 82
- 239000012790 adhesive layer Substances 0.000 claims abstract description 20
- 229910000679 solder Inorganic materials 0.000 claims description 45
- 239000002131 composite material Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 13
- 230000008569 process Effects 0.000 abstract description 12
- 238000003466 welding Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 38
- 238000010586 diagram Methods 0.000 description 12
- 238000010438 heat treatment Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- 238000001179 sorption measurement Methods 0.000 description 9
- 238000004093 laser heating Methods 0.000 description 8
- 230000009286 beneficial effect Effects 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000010453 quartz Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 3
- 239000004696 Poly ether ether ketone Substances 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 description 2
- 229920002530 polyetherether ketone Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000011532 electronic conductor Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/345—Arrangements for heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75253—Means for applying energy, e.g. heating means adapted for localised heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7565—Means for transporting the components to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
- H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
- H01L2224/95136—Aligning the plurality of semiconductor or solid-state bodies involving guiding structures, e.g. shape matching, spacers or supporting members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- External Artificial Organs (AREA)
- Telephone Function (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Sliding-Contact Bearings (AREA)
- Magnetic Bearings And Hydrostatic Bearings (AREA)
- Wire Bonding (AREA)
Abstract
本发明公开了一种芯片承载结构及芯片承载设备。芯片承载结构包括:非电路基板、多个微加热器以及粘着层。多个微加热器设置在所述非电路基板上。粘着层设置在所述多个微加热器上,多个芯片设置在所述粘着层上。借此,本发明通过一种芯片承载结构及芯片承载设备,来提升工艺的焊接良率。
Description
技术领域
本发明涉及一种承载结构及承载设备,特别是涉及一种芯片承载结构及芯片承载设备。
背景技术
近年来,随着电子及半导体技术的日新月异,使得电子产品不断地推陈出新,并朝向轻、薄、短、小的趋势设计。而电路板广泛地使用于各种电子设备当中。电路板表面上通常具有多个焊接垫,在工艺中将焊料形成于电路板的焊接垫上,接着利用回焊处理将各种电子零件固定于电路板上,而各个电子零件通过电路板内的线路层彼此电连接。
目前回焊处理可以用回焊炉、红外加热灯或热风枪等不同加温方式来进行焊接。虽然上述回焊处理的加温方法大致符合使用上的需求,但仍有需要对工艺进行改良,以提高工艺的良率及效能,并降低生产成本。
发明内容
本发明所要解决的技术问题在于,针对现有技术的不足提供一种芯片承载结构及芯片承载设备。
为了解决上述的技术问题,本发明所采用的其中一技术方案是,提供一种芯片承载结构,包括:非电路基板、多个微加热器以及粘着层。多个微加热器设置在所述非电路基板上。粘着层设置在所述多个微加热器上,多个芯片设置在所述粘着层上。
优选地,所述非电路基板为单一基板或是复合式基板。
优选地,所述多个芯片分别对应地设置在所述多个微加热器的上方,且所述芯片为IC芯片或者LED芯片。
优选地,每一个所述微加热器对所述多个芯片之中的至少一个进行加热,使得所述芯片通过锡球而固接在电路基板上且脱离所述粘着层。
为了解决上述的技术问题,本发明所采用的另外一技术方案是,提供一种芯片承载结构,包括:非电路基板以及至少一个微加热器。非电路基板承载至少一个芯片。至少一个微加热器被所述非电路基板所承载,以加热至少一个所述芯片所接触的至少一个锡球。
优选地,至少一个所述芯片通过至少一个所述锡球,以固接在电路基板上且脱离所述非电路基板的承载。
优选地,至少一个所述芯片为IC芯片或者LED芯片,所述非电路基板为玻璃、石英、蓝宝石、陶瓷或者晶圆。
为了解决上述的技术问题,本发明所采用的另外一技术方案是,提供一种芯片承载设备,包括:芯片承载结构以及吸附结构。芯片承载结构包括非电路基板以及被所述非电路基板所承载的至少一个微加热器。吸附结构设置在所述芯片承载结构的上方,以将至少一个芯片吸附且转移到所述芯片承载结构。其中,至少一个所述芯片被所述非电路基板所承载,至少一个所述微加热器加热至少一个所述芯片所接触的至少一个锡球。
优选地,至少一个所述芯片通过至少一个所述锡球,以固接在电路基板上且脱离所述非电路基板的承载;其中,至少一个所述芯片为IC芯片或者LED芯片,所述非电路基板为玻璃、石英、蓝宝石、陶瓷或者晶圆;其中,所述吸附结构为真空吸嘴模块或者静电吸附模块。
优选地,所述芯片承载设备还进一步包括:激光加热模块,设置在所述芯片承载结构的上方,以对至少一个所述锡球投射激光光源。
本发明的其中一有益效果在于,本发明所提供的芯片承载结构,能通过“多个微加热器设置在所述非电路基板上”以及“粘着层设置在所述多个微加热器上,多个芯片设置在所述粘着层上”的技术方案,以提升工艺的焊接良率。
本发明的另外一有益效果在于,本发明所提供的芯片承载结构,能通过“非电路基板承载至少一个芯片”以及“至少一个微加热器被所述非电路基板所承载,以加热至少一个所述芯片所接触的至少一个锡球”的技术方案,以提升工艺的焊接良率。
本发明的另外又一有益效果在于,本发明所提供的芯片承载设备,能通过“芯片承载结构包括非电路基板以及被所述非电路基板所承载的至少一个微加热器”、“吸附结构设置在所述芯片承载结构的上方,以将至少一个芯片吸附且转移到所述芯片承载结构”以及“至少一个所述芯片被所述非电路基板所承载,至少一个所述微加热器加热至少一个所述芯片所接触的至少一个锡球”的技术方案,以提升工艺的焊接良率。
为使能更进一步了解本发明的特征及技术内容,请参阅以下有关本发明的详细说明与附图,然而所提供的附图仅用于提供参考与说明,并非用来对本发明加以限制。
附图说明
图1为本发明第一实施例的芯片承载结构的第一实施示意图。
图2为本发明第一实施例的芯片承载结构的第二实施示意图。
图3为本发明第一实施例的芯片承载结构的第三实施示意图。
图4为本发明第一实施例的芯片承载结构的第四实施示意图。
图5为图4中V部分的放大示意图。
图6为本发明第一实施例的芯片承载结构的第五实施示意图。
图7为本发明第一实施例的芯片承载结构的第六实施示意图。
图8为本发明第一实施例的芯片承载结构的第七实施示意图。
图9为本发明第一实施例的芯片承载结构的第八实施示意图。
图10为本发明第二实施例的芯片承载设备的前视示意图。
图11为本发明第二实施例的芯片承载结构的第一实施示意图。
图12为本发明第二实施例的芯片承载结构的第二实施示意图。
图13为本发明第二实施例的芯片承载结构的第三实施示意图。
图14为本发明第二实施例的芯片承载结构的微加热器与芯片的结构示意图。
具体实施方式
以下是通过特定的具体实施例来说明本发明所公开有关“芯片承载结构及芯片承载设备”的实施方式,本领域技术人员可由本说明书所公开的内容了解本发明的优点与效果。本发明可通过其他不同的具体实施例加以施行或应用,本说明书中的各项细节也可基于不同观点与应用,在不脱离本发明的构思下进行各种修改与变更。另外,本发明的附图仅为简单示意说明,并非依实际尺寸的描绘,事先声明。以下的实施方式将进一步详细说明本发明的相关技术内容,但所公开的内容并非用以限制本发明的保护范围。
应当可以理解的是,虽然本文中可能会使用到“第一”、“第二”、“第三”等术语来描述各种元件,但这多个元件不应受这多个术语的限制。这多个术语主要是用以区分一元件与另一元件。另外,本文中所使用的术语“或”,应视实际情况可能包括相关联的列出项目中的任一个或者多个的组合。
[第一实施例]
参阅图1至图9所示,本发明第一实施例提供一种芯片承载结构S1,包括:非电路基板1、多个微加热器2以及粘着层3。多个微加热器2设置在非电路基板1上。粘着层3设置在所述多个微加热器2上,多个芯片4设置在粘着层3上。
首先,配合图1所示,本发明的芯片承载结构S1包括了非电路基板1、多个微加热器2以及粘着层3。非电路基板1可为单一基板或是复合式基板,例如单一基板可为玻璃、石英、蓝宝石、陶瓷或者晶圆,但不以此为限。非电路基板1间隔设置了多个微加热器2;其中,多个微加热器2可以串联或并联等方式设置,并与一供电端(例如市电或主机,但不以此为限)电连接,且微加热器2可设置于非电路基板1的表面,或嵌设于非电路基板1中,但不以此为限。非电路基板1上还设置了粘着层3,覆盖了多个微加热器2。而多个芯片4则分别对应其中一微加热器2而位于粘着层3上,即所述多个芯片4分别对应地设置在所述多个微加热器2的上方,且芯片4可为IC芯片或者LED芯片,但不以此为限。其中,粘着层3可为聚醚醚酮(polyetheretherketone,PEEK)、苯并环丁烯(Benzocyclobutene,BCB)以及含氢硅酸盐(Hydrogen Silsesquioxane,HSQ)的其中一种,但不以此为限。
接着,配合图2所示,提供电路基板6,电路基板6还包括多个导电焊垫60。每一个导电焊垫60上可以设置至少一个锡球5,或是其他型体且具有导电性的材料。进一步来说,非电路基板1设置有多个芯片4的一面可朝向电路基板6设置有多个导电焊垫60的一面,并朝电路基板6趋近。其中,本发明可通过取放模块(图中未示出,可例如真空吸嘴或者任何种类的取放机器(pick and place machine))驱使非电路基板1朝电路基板6趋近,而使芯片4对应在两个锡球5上。然而,本发明不以上述所举的例子为限。
最后,配合图3所示,每一个微加热器2对所述多个芯片4之中的至少一个进行加热,使得芯片4通过锡球5而固接在电路基板6上且脱离粘着层3。举例来说,每一个芯片4都设置在两个锡球5上。在供给电能至多个微加热器2后,每一个微加热器2对所对应的芯片4进行加热,以通过芯片4对锡球5加热,而使锡球5产生软化,进而与芯片4产生连接。接着,在锡球5固化后,会使得芯片4被固接在电路基板6,并通过锡球5而与电路基板6电连接,且芯片4会脱离非电路基板1的承载。值得一提的是,本发明的非电路基板1可设有回授电路单元(图中未示出,主要由驱动电路、信号读取电路,及温度控制电路所构成),用以控制微加热器2的加热温度。
进一步来说,配合图4及图5所示,每一个芯片4可为微型半导体发光元件(MicroLED),包括呈堆叠状设置的n型导电层N、可被激光光源L穿过的发光层M以及p型导电层P,n型导电层N可为n型氮化镓材料层或n型砷化镓材料层,发光层M为多量子阱结构层,p型导电层P可为p型氮化镓材料层或p型砷化镓材料层。或者,每一个芯片4也可为次毫米发光二极管(Mini LED),包括呈堆叠状设置的基底层(图中未示出)、n型导电层N、被激光光源穿过的发光层M以及p型导电层P,基底层可为蓝宝石(sapphire)材料层,n型导电层N可为n型氮化镓材料层或n型砷化镓材料层,发光层M为多量子阱结构层,p型导电层P可为p型氮化镓材料层或p型砷化镓材料层。基底层还可以是石英基底层、玻璃基底层、硅基底层或者任何材料的基底层。然而,本发明不以上述所举的例子为限。
更进一步来说,配合图6及图7所示,在每一个微加热器2对所对应的芯片4进行加热之前,还可通过激光加热模块S2朝锡球5投射激光光源L。举例来说,激光加热模块S2所产生的激光光源L会穿过芯片4的n型导电层N、发光层M及p型导电层P,而投射在电路基板6上的锡球5。通过激光加热模块S2预先对锡球5进行加热,再利用微加热器2对锡球5进行加热,可大幅降低供给微加热器2的电压;即,通过激光光源L对锡球5进行预热,可使得微加热器2原先瞬间所要提升的温度预设值可大幅降低,例如,仅利用微加热器2对锡球5进行加热的情况下,微加热器2瞬间所要提升到的温度预设值为700度,而在激光光源L对锡球5进行预热的情况下,微加热器2瞬间所要提升到的温度预设值可为400度或者更低。然而,本发明不以上述所举的例子为限。
更进一步来说,配合图8及图9所示,本发明可通过设置在芯片承载结构S1上方的吸附结构S3,以将至少一个芯片4吸附且转移到芯片承载结构S1。举例来说,本发明可先通过吸附结构S3(可为真空吸嘴模块或者静电吸附模块,但不以此为限)使用相反电荷的吸力吸附一个或多个芯片4;其中,在本实施例中以静电吸附模块作为示例,但不以此为限。接着,通过吸附结构S3将芯片4放置于芯片承载结构S1上。最后,吸附结构S3取消相反电荷的吸力而使芯片4连接在芯片承载结构S1上。
然而,上述所举的例子只是其中一可行的实施例而并非用以限定本发明。
[第二实施例]
参阅图10至图14,并请一并参阅图1至图9,本发明第二实施例所提供的一种芯片承载结构S1,与第一实施例的芯片承载结构S1略为相近,因此,相似的结构、步骤以及动作不再赘述。而本发明第二实施例与第一实施的差异在于,本实施的芯片承载结构S1包括了非电路基板1以及至少一个微加热器2。非电路基板1承载至少一个芯片4。至少一个微加热器2被非电路基板1所承载,以加热至少一个芯片4所接触的至少一个锡球5。
举例来说,配合图10所示,本发明可通过设置在芯片承载结构S1上方的吸附结构S3,以相反电荷的吸力吸附一个或多个芯片4;接着,通过吸附结构S3将芯片4放置于芯片承载结构S1上,并取消相反电荷的吸力,而使芯片4连接在芯片承载结构S1上。进一步来说,非电路基板1间隔设置了多个微加热器2,部分的微加热器2位于相邻的两个芯片4之间,另一部分的微加热器2位于芯片4的侧边。其中,微加热器2可不覆盖粘着层3,但不以此为限。
接着,配合图11所示,将非电路基板1设置有多个芯片4的一面朝向电路基板6设置有多个导电焊垫60的一面,并朝电路基板6趋近。每一个导电焊垫60上可以设置至少一个锡球5,或是其他型体且具有导电性的材料。
最后,配合图12所示,通过供给电能至非电路基板1上的每一个微加热器2,以使每一个微加热器2对所述多个芯片4之中的至少一个进行加热,以间接加热至少一个芯片4所接触的锡球5,而使锡球5产生软化,进而与芯片4产生连接。在锡球5固化后,会使得芯片4被固接在电路基板6,并通过锡球5而与电路基板6电连接,且芯片4会脱离非电路基板1的承载。
更进一步来说,配合图13所示,在每一个微加热器2对所对应的芯片4进行加热之前,还可通过激光加热模块S2朝锡球5投射激光光源L。举例来说,激光加热模块S2所产生的激光光源L会穿过芯片4,而投射在电路基板6上的锡球5。通过激光加热模块S2预先对锡球5进行加热,再利用微加热器2对锡球5进行加热,可大幅降低供给微加热器2的电压;即,通过激光光源L对锡球5进行预热,可使得微加热器2原先瞬间所要提升的温度预设值可大幅降低,例如,仅利用微加热器2对锡球5进行加热的情况下,微加热器2瞬间所要提升到的温度预设值为700度,而在激光光源L对锡球5进行预热的情况下,微加热器2瞬间所要提升到的温度预设值可为400度或者更低。然而,本发明不以上述所举的例子为限。
更进一步来说,配合图14所示,本发明的微加热器2可设置于芯片4的四周,也可以设置在芯片4的至少两侧,例如相对的两侧,但不以此为限。
此外,配合图10至图14所示,本发明还提供一种芯片承载设备Z,包括:芯片承载结构S1以及吸附结构S3。芯片承载结构S1包括非电路基板1以及被非电路基板1所承载的至少一个微加热器2。吸附结构S3设置在芯片承载结构S1的上方,以将至少一个芯片4吸附且转移到芯片承载结构S1。其中,至少一个芯片4被非电路基板1所承载,至少一个微加热器2加热至少一个芯片4所接触的至少一个锡球5。
然而,上述所举的例子只是其中一可行的实施例而并非用以限定本发明。
[实施例的有益效果]
本发明的其中一有益效果在于,本发明所提供的芯片承载结构,能通过“多个微加热器2设置在非电路基板1上”以及“粘着层3设置在所述多个微加热器2上,多个芯片4设置在粘着层3上”的技术方案,以提升工艺的焊接良率。
本发明的另外一有益效果在于,本发明所提供的芯片承载结构,能通过“非电路基板1承载至少一个芯片4”以及“至少一个微加热器2被非电路基板1所承载,以加热至少一个芯片4所接触的至少一个锡球5”的技术方案,以提升工艺的焊接良率。
本发明的另外一有益效果在于,本发明所提供的芯片承载设备,能通过“芯片承载结构S1包括非电路基板1以及被非电路基板1所承载的至少一个微加热器2”、“吸附结构S3设置在芯片承载结构S1的上方,以将至少一个芯片4吸附且转移到芯片承载结构S1”以及“至少一个芯片4被非电路基板1所承载,至少一个微加热器2加热至少一个芯片4所接触的至少一个锡球5”的技术方案,以提升工艺的焊接良率。
更进一步来说,本发明所提供的芯片承载结构S1及芯片承载设备Z通过上述各实施例的技术方案,利用芯片承载结构S1上的微加热器2对电路基板6上的锡球5进行加热,以提升工艺的焊接良率。此外,本发明进一步还可配合激光加热模块S2所产生的激光光源L对锡球5进行预热,可使得微加热器2原先瞬间所要提升到达的目标温度预设值能大幅降低。
以上所公开的内容仅为本发明的优选可行实施例,并非因此局限本发明的权利要求书的保护范围,所以凡是运用本发明说明书及附图内容所做的等效技术变化,均包含于本发明的权利要求书的保护范围内。
Claims (4)
1.一种芯片承载结构,其特征在于,包括:
非电路基板;
多个间隔的微加热器,设置在所述非电路基板上;以及
粘着层,设置在所述多个间隔的微加热器上,多个芯片设置在所述粘着层上,其中所述多个间隔的微加热器、所述粘着层与所述多个芯片设置在所述非电路基板的相同侧。
2.根据权利要求1所述的芯片承载结构,其特征在于,所述非电路基板为单一基板或是复合式基板。
3.根据权利要求1所述的芯片承载结构,其特征在于,所述多个芯片分别对应地设置在所述多个间隔的微加热器的上方,且所述芯片为IC芯片或者LED芯片。
4.根据权利要求1所述的芯片承载结构,其特征在于,每一个所述微加热器对所述多个芯片之中的至少一个进行加热,使得所述芯片通过锡球而固接在电路基板上且脱离所述粘着层。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108107747 | 2019-03-08 | ||
TW108107747A TWI774936B (zh) | 2019-03-08 | 2019-03-08 | 承載結構及承載設備 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN111668171A CN111668171A (zh) | 2020-09-15 |
CN111668171B true CN111668171B (zh) | 2023-05-30 |
Family
ID=72334681
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910329373.6A Active CN111668171B (zh) | 2019-03-08 | 2019-04-23 | 芯片承载结构及芯片承载设备 |
Country Status (3)
Country | Link |
---|---|
US (1) | US11302541B2 (zh) |
CN (1) | CN111668171B (zh) |
TW (1) | TWI774936B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI693119B (zh) * | 2019-03-06 | 2020-05-11 | 台灣愛司帝科技股份有限公司 | 應用於固接led的雷射加熱裝置 |
TWI770612B (zh) * | 2020-09-18 | 2022-07-11 | 歆熾電氣技術股份有限公司 | 晶片移轉系統與晶片移轉方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102931123A (zh) * | 2011-08-12 | 2013-02-13 | 英飞凌科技股份有限公司 | 在干燥和压力支撑组装过程中固定半导体管芯 |
CN104145328A (zh) * | 2012-03-07 | 2014-11-12 | 东丽株式会社 | 半导体装置的制造方法及半导体装置的制造装置 |
CN104904001A (zh) * | 2012-12-14 | 2015-09-09 | 勒克斯维科技公司 | 具有枢转支座的微型器件转移系统 |
WO2016175654A2 (en) * | 2015-04-28 | 2016-11-03 | Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno | Transfer and soldering of chips |
CN107154374A (zh) * | 2017-05-23 | 2017-09-12 | 深圳市华星光电技术有限公司 | 微转印方法 |
TWI618157B (zh) * | 2016-11-02 | 2018-03-11 | Shinkawa Kk | Electronic component mounting device |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW320687B (zh) * | 1996-04-01 | 1997-11-21 | Toray Industries | |
US7296727B2 (en) * | 2001-06-27 | 2007-11-20 | Matsushita Electric Industrial Co., Ltd. | Apparatus and method for mounting electronic components |
KR101939240B1 (ko) * | 2011-11-25 | 2019-01-17 | 삼성전자 주식회사 | 반도체 패키지 |
JP5902114B2 (ja) * | 2013-03-22 | 2016-04-13 | 株式会社東芝 | 半導体装置及びその製造方法 |
GB2523788B (en) * | 2014-03-05 | 2020-04-22 | Ams Sensors Uk Ltd | Method of fabrication of CMOS-based Semiconductor Devices comprising CMOS-incompatible metals |
TWI610411B (zh) * | 2014-08-14 | 2018-01-01 | 艾馬克科技公司 | 用於半導體晶粒互連的雷射輔助接合 |
US9607907B2 (en) | 2014-12-01 | 2017-03-28 | Industrial Technology Research Institute | Electric-programmable magnetic module and picking-up and placement process for electronic devices |
US10177016B2 (en) | 2015-08-18 | 2019-01-08 | Goertek Inc. | Pre-screening method, manufacturing method, device and electronic apparatus of micro-LED |
-
2019
- 2019-03-08 TW TW108107747A patent/TWI774936B/zh active
- 2019-04-23 CN CN201910329373.6A patent/CN111668171B/zh active Active
- 2019-07-24 US US16/520,398 patent/US11302541B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102931123A (zh) * | 2011-08-12 | 2013-02-13 | 英飞凌科技股份有限公司 | 在干燥和压力支撑组装过程中固定半导体管芯 |
CN104145328A (zh) * | 2012-03-07 | 2014-11-12 | 东丽株式会社 | 半导体装置的制造方法及半导体装置的制造装置 |
CN104904001A (zh) * | 2012-12-14 | 2015-09-09 | 勒克斯维科技公司 | 具有枢转支座的微型器件转移系统 |
WO2016175654A2 (en) * | 2015-04-28 | 2016-11-03 | Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno | Transfer and soldering of chips |
TWI618157B (zh) * | 2016-11-02 | 2018-03-11 | Shinkawa Kk | Electronic component mounting device |
CN107154374A (zh) * | 2017-05-23 | 2017-09-12 | 深圳市华星光电技术有限公司 | 微转印方法 |
Also Published As
Publication number | Publication date |
---|---|
US20200286758A1 (en) | 2020-09-10 |
TWI774936B (zh) | 2022-08-21 |
CN111668171A (zh) | 2020-09-15 |
TW202034431A (zh) | 2020-09-16 |
US11302541B2 (en) | 2022-04-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI698964B (zh) | 晶片固接結構及晶片固接設備 | |
TWI698949B (zh) | 薄膜結構、晶片承載組件及晶片承載設備 | |
CN111668171B (zh) | 芯片承载结构及芯片承载设备 | |
CN109103117B (zh) | 结合半导体芯片的设备和结合半导体芯片的方法 | |
JP4371619B2 (ja) | リフロー装置 | |
KR20160002405A (ko) | 열압착 본더, 열압착 본더 작동 방법, 및 미세 피치의 플립 칩 조립체 상호 접속 방법 | |
KR101994667B1 (ko) | 전자 부품 실장 장치 및 전자 부품의 제조 방법 | |
WO2019188105A1 (ja) | 転写基板ならびにこれを用いた実装方法および画像表示装置の製造方法 | |
CN111344849A (zh) | 封装装置 | |
CN113436988A (zh) | 芯片贴装装置、剥离夹具以及半导体器件的制造方法 | |
CN113948627A (zh) | 芯片承载结构与芯片安装方法 | |
CN113808988B (zh) | 发光芯片承载结构及其制作方法 | |
JP3902037B2 (ja) | 半導体装置の製造方法 | |
TWM600468U (zh) | 應用於固接led的高週波加熱裝置 | |
JPH11251335A (ja) | 半導体素子の実装装置及びその実装方法 | |
KR102121407B1 (ko) | 반도체 발광소자의 이송방법 | |
JP2004111901A (ja) | 電子部品接合装置及び方法、並びに回路基板、並びに電子部品実装装置 | |
US20210134613A1 (en) | Chip carrying structure having chip-suction function | |
JP7023700B2 (ja) | 実装装置及び実装方法 | |
TWM623341U (zh) | 用於固接電子元件的裝置 | |
TWM624043U (zh) | 用於轉移電子元件的裝置 | |
KR20200088933A (ko) | 반도체 발광소자의 이송장치 | |
CN118156205A (zh) | 用以顶推电子基板的装置 | |
JP6461822B2 (ja) | 半導体装置の実装方法および実装装置 | |
JPH10187067A (ja) | 表示装置の実装方法および実装装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |