CN111199958A - 半导体功率器件 - Google Patents

半导体功率器件 Download PDF

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CN111199958A
CN111199958A CN201811364479.1A CN201811364479A CN111199958A CN 111199958 A CN111199958 A CN 111199958A CN 201811364479 A CN201811364479 A CN 201811364479A CN 111199958 A CN111199958 A CN 111199958A
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power device
mosfet power
metal layer
device chip
mosfet
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袁愿林
刘伟
刘磊
毛振东
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Suzhou Oriental Semiconductor Co Ltd
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Suzhou Oriental Semiconductor Co Ltd
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Priority to CN201811364479.1A priority Critical patent/CN111199958A/zh
Priority to PCT/CN2019/117051 priority patent/WO2020098590A1/zh
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Abstract

本发明属于半导体功率器件技术领域，具体公开了一种半导体功率器件，包括：封装在同一个封装体内的第一MOSFET功率器件芯片和第二MOSFET功率器件芯片，其中：所述第一MOSFET功率器件芯片的漏极金属层与所述第二MOSFET功率器件芯片的源极金属层电性连接；所述第一MOSFET功率器件芯片的源极金属层与所述第二MOSFET功率器件芯片的栅极金属层均接所述封装体的源极引脚；所述第一MOSFET功率器件芯片的栅极金属层接所述封装体的栅极引脚；所述第二MOSFET功率器件芯片的漏极金属层接所述封装体的漏极引脚。本发明能够降低半导体功率器件的特征导通电阻。

Description

半导体功率器件
技术领域
本发明属于半导体功率器件技术领域，特别是涉及一种低特征导通电阻的半导体功率器件。
背景技术
特征导通电阻(Rsp)是评价半导体功率器件电流导通能力的重要指标之一，通常特征导通电阻与栅极电荷(Qg)的乘积作为半导体功率器件的品质因子(FOM)，品质因子是评判半导体功率器件产品综合性能最直接最重要的技术指标，FOM越小，表示半导体功率器件在工作时的功率损耗越低。对于中低压半导体功率器件来说，由于沟道电阻占总的导通电阻的比重很高，因此传统降低半导体功率器件的特征导通电阻的方法有提高n型漂移区的掺杂浓度和增加半导体功率器件的元胞密度两种方式，但是n型漂移区的掺杂浓度的提高会影响半导体功率器件的耐压，而元胞密度的增加会大大增加半导体功率器件的栅源充电电荷(Qgs)和栅漏充电电荷(Qgd)。
发明内容
有鉴于此，本发明的目的是提供一种半导体功率器件，以解决现有技术中的如何降低半导体功率器件的特征导通电阻的问题。
为达到本发明的上述目的，本发明提供了一种半导体功率器件，包括：
封装在同一个封装体内的第一MOSFET功率器件芯片和第二MOSFET功率器件芯片，所述第二MOSFET功率器件芯片为n沟道耗尽型，其中：
所述第一MOSFET功率器件芯片的漏极金属层与所述第二MOSFET功率器件芯片的源极金属层电性连接；
所述第一MOSFET功率器件芯片的源极金属层与所述第二MOSFET功率器件芯片的栅极金属层均接所述封装体的源极引脚；
所述第一MOSFET功率器件芯片的栅极金属层接所述封装体的栅极引脚；
所述第二MOSFET功率器件芯片的漏极金属层接所述封装体的漏极引脚。
可选的，所述第一MOSFET功率器件芯片的尺寸小于所述第二MOSFET功率器件芯片的源极金属层的尺寸，所述第一MOSFET功率器件芯片放置在所述第二MOSFET功率器件芯片的源极金属层上。
可选的，所述第一MOSFET功率器件芯片的漏极金属层通过导电胶与所述第二MOSFET功率器件芯片的源极金属层电性连接。
可选的，所述第一MOSFET功率器件芯片为n沟道增强型。
本发明提供的一种半导体功率器件是将两个串联的MOSFET功率器件芯片封装在同一个封装体内，使得半导体功率器件的击穿电压为两个MOSFET功率器件芯片的击穿电压的和，半导体功率器件的特征导通电阻为两个MOSFET功率器件芯片的特征导通电阻的和，与现有技术中的半导体功率器件相比，在相同的击穿电压条件下，本发明的半导体功率器件具有更低的特征导通电阻。
附图说明
为了更加清楚地说明本发明示例性实施例的技术方案，下面对描述实施例中所需要用到的附图做一简单介绍。显然，所介绍的附图只是本发明所要描述的一部分实施例的附图，而不是全部的附图，对于本领域普通技术人员，在不付出创造性劳动的前提下，还可以根据这些附图得到其他的附图。
图1是本发明提供的一种半导体功率器件中的第一MOSFET功率器件芯片和第二MOSFET功率器件芯片封装在同一个封装体内的内部结构示意图；
图2是本发明提供的一种半导体功率器件的等效电路示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，以下将结合本发明实施例中的附图，通过具体方式，完整地描述本发明的技术方案。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例，基于本发明的实施例，本领域普通技术人员在没有做出创造性劳动的前提下获得的所有其他实施例，均落入本发明的保护范围之内。
应当理解，本发明所使用的诸如“具有”、“包含”以及“包括”等术语并不配出一个或多个其它元件或其组合的存在或添加。同时，为清楚地说明本发明的具体实施方式，说明书附图中所列示意图，放大了本发明所述的层和区域的厚度，且所列图形大小并不代表实际尺寸；说明书附图是示意性的，不应限定本发明的范围。说明书中所列实施例不应仅限于说明书附图中所示区域的特定形状，而是包括所得到的形状如制备引起的偏差等。
图1是本发明提供的一种半导体功率器件中的第一MOSFET功率器件芯片和第二MOSFET功率器件芯片封装在同一个封装体内的内部结构示意图，图1中仅示例性的示出了第一MOSFET功率器件芯片50和第二MOSFET功率器件芯片60封装在同一个封装体内的打线结构示意图，如图1所示，本发明提供的一种半导体功率器件中：第一MOSFET功率器件芯片50的源极金属层51通过金属导线72接封装体的源极引脚83，第二MOSFET功率器件芯片60的栅极金属层62通过金属导线71接封装体的源极引脚83(可选的，第二MOSFET功率器件芯片60的栅极金属层62也可以通过金属导线接第一MOSFET功率器件芯片50的源极金属层51，然后第一MOSFET功率器件芯片50的源极金属层51通过金属导线接封装体的源极引脚83，本发明实施例中不再展示该具体结构)；第一MOSFET功率器件芯片50的漏极金属层(第一MOSFET功率器件芯片50的漏极金属层位于第一MOSFET功率器件芯片50的背面(或称之为底面)，在图1中未示出)与第二MOSFET功率器件芯片60的源极金属层61电性连接，优选的，第一MOSFET功率器件芯片50的尺寸小于第二MOSFET功率器件芯片60的源极金属层61的尺寸，从而，第一MOSFET功率器件芯片50可以放置在第二MOSFET功率器件芯片60的源极金属层61上，由此第一MOSFET功率器件芯片50的漏极金属层可以直接与第二MOSFET功率器件芯片60的源极金属层61通过导电胶电性连接，将第一MOSFET功率器件芯片50和第二MOSFET功率器件芯片60叠放在一起进行封装(如图1所示)，可以将第一MOSFET功率器件芯片50和第二MOSFET功率器件芯片60封装在更小尺寸的封装体内。
第一MOSFET功率器件芯片50的栅极金属层52通过金属导线73接封装体的栅极引脚81。第二MOSFET功率器件芯片60的漏极金属层接封装体的漏极引脚82，第二MOSFET功率器件芯片60的漏极金属层位于第二MOSFET功率器件芯片60的背面(或称之为底面)，第二MOSFET功率器件芯片60直接放置在封装体的漏极金属框架上，第二MOSFET功率器件芯片60的漏极金属层通过导电胶与漏极金属框架电性连接，从而实现第二MOSFET功率器件芯片60的漏极金属层与漏极引脚82电性连接，而不需要打线。
需要说明的是，图1中的第一MOSFET功率器件芯片50和第二MOSFET功率器件芯片60仅是示例性的结构，根据不同的设计要求，第一MOSFET功率器件芯片50和第二MOSFET功率器件芯片60均可以有不同的芯片尺寸和耐压，也可以均有不同的金属层(pad层)形状或结构。
图2是本发明提供的一种半导体功率器件的等效电路示意图，如图2所示，本发明的一种半导体功率器件的等效电路包括第一MOSFET功率器件201(对应图1中的第一MOSFET功率器件芯片50)和第二MOSFET功率器件202(对应图1中的第二MOSFET功率器件芯片60)，其中：第一MOSFET功率器件201的漏极与第二MOSFET功率器件202的源极直接连接；第一MOSFET功率器件201的源极与第二MOSFET功率器件202的栅极均接半导体功率器件的源极31，第一MOSFET功率器件201的栅极接半导体功率器件的栅极33，第二MOSFET功率器件202的漏极接半导体功率器件的漏极32。
本发明的半导体功率器件中的第二MOSFET功率器件202为n沟道耗尽型，对半导体功率器件的源极31施加0V电压时，第二MOSFET功率器件202处于开启状态，半导体功率器件的栅极33电压控制第一MOSFET功率器件201的开启和关断，进而决定本发明的半导体功率器件的开启和关断。优选的，第一MOSFET功率器件201为n沟道增强型，这样对半导体功率器件的栅极33施加0V电压时，第一MOSFET功率器件201处于关断状态，半导体功率器件处于关断状态，对半导体功率器件的栅极33施加合适的正电压(达到第一MOSFET功率器件201的阈值电压)时，第一MOSFET功率器件201的电流沟道开启，半导体功率器件处于开启状态。
对本发明的半导体功率器件的漏极32施加漏极电压并不断增大时，首先施加到漏极32上的电压即为施加到第二MOSFET功率器件202的漏极上的电压，当施加到漏极32上的电压达到第二MOSFET功率器件202的击穿电压时，第二MOSFET功率器件202会先被击穿，然后施加在漏极32上的电压与第二MOSFET功率器件202的击穿电压的差值电压施加到第一MOSFET功率器件201的漏极上，当该差值电压达到第一MOSFET功率器件201的击穿电压时，第一MOSFET功率器件201被击穿。由此，本发明的半导体功率器件的击穿电压值为第一MOSFET功率器件201的击穿电压值与第二MOSFET功率器件202的击穿电压值的和。由于第二MOSFET功率器件202为n沟道耗尽型，第二MOSFET功率器件202具有较厚的栅氧化层层厚度，使得本发明的半导体功率器件具有更高的可靠性。
本发明的半导体功率器件中的第一MOSFET功率器件201和第二MOSFET功率器件202为串联连接的结构，由此，本发明的半导体功率器件的特征导通电阻为第一MOSFET功率器件201的特征导通电阻值与第二MOSFET功率器件202的特征导通电阻值的和。理论上，单个半导体功率器件芯片的特征导通电阻Rsp的计算公式为Rsp＝(4*BV2)/(εs*μn*Ec 3)，BV为击穿电压，εs为半导体的介电常数，μn为电子迁移率，Ec为半导体的临界击穿电场。因此，将一个MOSFET功率器件芯片分解成两个串联的MOSFET功率器件芯片，在相同的击穿电压条件下，两个串联的MOSFET功率器件芯片具有更低的特征导通电阻。
表一是不同的MOSFET功率器件的击穿电压和特征导通电阻的对比数据，芯片1(可对应本发明的第一MOSFET功率器件芯片)的击穿电压是120V、特征导通电阻为90mohm*mm2，芯片2(可对应本发明的第二MOSFET功率器件芯片)的击穿电压为100V、特征导通电阻为65mohm*mm2，将芯片1和芯片2串联连接后的芯片(构成本发明的半导体功率器件)的击穿电压为220V、特征导通电阻为155mohm*mm2，而传统的击穿电压为220V的芯片3的特征导通电阻为250mohm*mm2。需要说明的是表一中的所列数据均是近似值，而不是精确的值。
Figure BDA0001868169060000071
表一：芯片的击穿电压与特征导通电阻对比
以上具体实施方式及实施例是对本发明提出的一种IGBT功率器件的技术思想的具体支持，不能以此限定本发明的保护范围，凡是按照本发明提出的技术思想，在本技术方案基础上所做的任何等同变化或等效的改动，均仍属于本发明技术方案保护的范围。
尽管本发明的实施方案已公开如上，但其并不仅仅限于说明书和实施方式中所列运用，它完全可以被适用于各种适合本发明的领域，对于熟悉本领域的人员而言，可容易地实现另外的修改，因此在不背离权利要求及等同范围所限定的一般概念下，本发明并不限于特定的细节和这里示出与描述的图例。

Claims (4)

1.一种半导体功率器件，其特征在于，包括：
封装在同一个封装体内的第一MOSFET功率器件芯片和第二MOSFET功率器件芯片，所述第二MOSFET功率器件芯片为n沟道耗尽型，其中：
所述第一MOSFET功率器件芯片的漏极金属层与所述第二MOSFET功率器件芯片的源极金属层电性连接；
所述第一MOSFET功率器件芯片的源极金属层与所述第二MOSFET功率器件芯片的栅极金属层均接所述封装体的源极引脚；
所述第一MOSFET功率器件芯片的栅极金属层接所述封装体的栅极引脚；
所述第二MOSFET功率器件芯片的漏极金属层接所述封装体的漏极引脚。
2.如权利要求1所述的一种半导体功率器件，其特征在于，所述第一MOSFET功率器件芯片的尺寸小于所述第二MOSFET功率器件芯片的源极金属层的尺寸，所述第一MOSFET功率器件芯片放置在所述第二MOSFET功率器件芯片的源极金属层上。
3.如权利要求2所述的一种半导体功率器件，其特征在于，所述第一MOSFET功率器件芯片的漏极金属层通过导电胶与所述第二MOSFET功率器件芯片的源极金属层电性连接。
4.如权利要求1所述的一种半导体功率器件，其特征在于，所述第一MOSFET功率器件芯片为n沟道增强型。
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