CN1104037C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN1104037C
CN1104037C CN98116150A CN98116150A CN1104037C CN 1104037 C CN1104037 C CN 1104037C CN 98116150 A CN98116150 A CN 98116150A CN 98116150 A CN98116150 A CN 98116150A CN 1104037 C CN1104037 C CN 1104037C
Authority
CN
China
Prior art keywords
electric conductor
dielectric film
semiconductor device
film
sidewall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN98116150A
Other languages
English (en)
Chinese (zh)
Other versions
CN1215910A (zh
Inventor
富田和朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN1215910A publication Critical patent/CN1215910A/zh
Application granted granted Critical
Publication of CN1104037C publication Critical patent/CN1104037C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H01L21/76852—Barrier, adhesion or liner layers the layer covering a conductive structure the layer also covering the sidewalls of the conductive structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN98116150A 1997-10-29 1998-07-22 半导体器件及其制造方法 Expired - Fee Related CN1104037C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP29723097A JP3856544B2 (ja) 1997-10-29 1997-10-29 半導体装置及びその製造方法
JP297230/1997 1997-10-29
JP297230/97 1997-10-29

Publications (2)

Publication Number Publication Date
CN1215910A CN1215910A (zh) 1999-05-05
CN1104037C true CN1104037C (zh) 2003-03-26

Family

ID=17843859

Family Applications (1)

Application Number Title Priority Date Filing Date
CN98116150A Expired - Fee Related CN1104037C (zh) 1997-10-29 1998-07-22 半导体器件及其制造方法

Country Status (6)

Country Link
US (3) US6023083A (enExample)
JP (1) JP3856544B2 (enExample)
KR (1) KR100272989B1 (enExample)
CN (1) CN1104037C (enExample)
DE (1) DE19826689B4 (enExample)
TW (1) TW459280B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6268661B1 (en) * 1999-08-31 2001-07-31 Nec Corporation Semiconductor device and method of its fabrication
US6074943A (en) * 1997-04-16 2000-06-13 Texas Instruments Incorporated Sidewalls for guiding the via etch
US6278152B1 (en) * 1997-06-27 2001-08-21 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
JP3856544B2 (ja) 1997-10-29 2006-12-13 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JPH11186382A (ja) * 1997-12-19 1999-07-09 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP2001036036A (ja) 1999-07-21 2001-02-09 Mitsubishi Electric Corp 半導体装置およびその製造方法
KR100558005B1 (ko) * 2003-11-17 2006-03-06 삼성전자주식회사 적어도 하나의 스토리지 노드를 갖는 반도체 장치들 및 그제조 방법들

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331116A (en) * 1992-04-30 1994-07-19 Sgs-Thomson Microelectronics, Inc. Structure and method for forming contact structures in integrated circuits
KR970007967B1 (en) * 1994-05-11 1997-05-19 Hyundai Electronics Ind Fabrication method and semiconductor device
KR100211070B1 (ko) * 1994-08-19 1999-07-15 아끼구사 나오유끼 반도체 장치 및 그 제조방법
JPH08250589A (ja) 1995-03-14 1996-09-27 Sony Corp 半導体装置の製造方法
JP2679671B2 (ja) * 1995-03-30 1997-11-19 日本電気株式会社 半導体記憶装置の容量素子の製造方法
JPH08306664A (ja) 1995-05-10 1996-11-22 Sony Corp 半導体装置の製造方法
US5759911A (en) * 1995-08-22 1998-06-02 International Business Machines Corporation Self-aligned metallurgy
US5550076A (en) * 1995-09-11 1996-08-27 Vanguard International Semiconductor Corp. Method of manufacture of coaxial capacitor for dram memory cell and cell manufactured thereby
JP3012187B2 (ja) * 1996-02-05 2000-02-21 松下電子工業株式会社 半導体装置の製造方法
JP2790110B2 (ja) * 1996-02-28 1998-08-27 日本電気株式会社 半導体装置の製造方法
JP2795252B2 (ja) * 1996-02-29 1998-09-10 日本電気株式会社 半導体装置の製造方法
US5710074A (en) * 1996-10-18 1998-01-20 Vanguard International Semiconductor Corporation Increased surface area of an STC structure via the use of a storage node electrode comprised of polysilicon mesas and polysilicon sidewall spacers
US5710075A (en) * 1996-11-06 1998-01-20 Vanguard International Semiconductor Corporation Method to increase surface area of a storage node electrode, of an STC structure, for DRAM devices
US5731130A (en) * 1996-11-12 1998-03-24 Vanguard International Semiconductor Corporation Method for fabricating stacked capacitors on dynamic random access memory cells
US5792692A (en) * 1997-08-18 1998-08-11 Chartered Semiconductor Manufacturing, Ltd. Method of fabricating a twin hammer tree shaped capacitor structure for a dram device
JP3856544B2 (ja) 1997-10-29 2006-12-13 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JPH11176833A (ja) 1997-12-10 1999-07-02 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH11186382A (ja) 1997-12-19 1999-07-09 Mitsubishi Electric Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
CN1215910A (zh) 1999-05-05
KR19990036498A (ko) 1999-05-25
DE19826689A1 (de) 1999-05-12
KR100272989B1 (ko) 2000-12-01
DE19826689B4 (de) 2005-03-31
JP3856544B2 (ja) 2006-12-13
US20010023122A1 (en) 2001-09-20
US6023083A (en) 2000-02-08
JPH11135746A (ja) 1999-05-21
US6344406B2 (en) 2002-02-05
TW459280B (en) 2001-10-11
US6284618B1 (en) 2001-09-04

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C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: RENESAS ELECTRONICS CORPORATION

Free format text: FORMER OWNER: MISSUBISHI ELECTRIC CORP.

Effective date: 20141029

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20141029

Address after: Kawasaki, Kanagawa, Japan

Patentee after: Renesas Electronics Corporation

Address before: Tokyo, Japan, Japan

Patentee before: Missubishi Electric Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20030326

Termination date: 20150722

EXPY Termination of patent right or utility model