CN110246840A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN110246840A
CN110246840A CN201910173514.XA CN201910173514A CN110246840A CN 110246840 A CN110246840 A CN 110246840A CN 201910173514 A CN201910173514 A CN 201910173514A CN 110246840 A CN110246840 A CN 110246840A
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igbt
diode
groove
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斋藤纯一
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Denso Corp
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Toyota Motor Corp
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Abstract

本发明为了抑制流过二极管区域与IGBT区域之间的边界部的空穴，提供一种半导体装置，其具有IGBT区域和二极管区域。半导体基板具有配置在所述IGBT区域内的n型发射极区、配置在所述IGBT区域内的p型体区、配置在所述二极管区域内的p型阳极区、以及横跨所述IGBT区域和所述二极管区域配置的n型漂移区。位于最靠近二极管区域侧的边界沟槽间半导体区域内的漂移区具有高浓度层。高浓度层的n型杂质浓度高于位于其下部的漂移区的n型杂质浓度。

Description

半导体装置
技术领域
本说明书公开的技术涉及一种半导体装置。
背景技术
专利文献1公开了一种具备IGBT(insulated gate bipolar transistor)和二极管的半导体装置。在该半导体装置中，IGBT的发射极区、IGBT的体区、以及二极管的阳极区连接至上部电极。另外，IGBT的集电极区和二极管的阴极区连接至下部电极。横跨IGBT区域和二极管区域而配置有漂移区。作为漂移区，在IGBT区域内配置在体区与集电极区之间，在二极管区域内配置在阳极区与阴极区之间。
专利文献1：日本特开2012-054403号公报
在专利文献1的半导体装置中，如果对上部电极施加高于下部电极的电位，则二极管导通。也就是说，电流将从阳极区经过漂移区流向阴极区。此时，由于体区与上部电极连接，因此，在体区与漂移区的分界面的pn结处也沿正向施加有电压。其结果是，空穴从体区经过漂移区而流向阴极区。也就是说，空穴向二极管区域与IGBT区域之间的边界部流动。如果空穴如上所述地向边界部流动，则会发生二极管导通时正向电压不稳定的问题。在本说明书中，提出一种能够对向二极管区域与IGBT区域之间的边界部流动的空穴进行抑制的技术。
发明内容
本说明书公开的半导体装置具备IGBT和二极管。该半导体装置具有：半导体基板；上部电极，其覆盖所述半导体基板的上表面；以及下部电极，其覆盖所述半导体基板的下表面。所述半导体基板具有：IGBT区域，在其与所述下部电极接触的区域内设置有p型集电极区；以及二极管区域，在其与所述下部电极接触的区域内设置有n型阴极区。所述IGBT区域内的所述半导体基板的所述上表面设置有多个沟槽。各个所述沟槽内设置有栅极绝缘膜、以及通过所述栅极绝缘膜与所述半导体基板绝缘的栅极。所述半导体基板具有发射极区、体区、阳极区以及漂移区。所述发射极区为n型区域，其配置在所述IGBT区域内，与所述上部电极接触，并与所述栅极绝缘膜接触。所述体区为p型区域，其配置在所述IGBT区域内，与所述上部电极接触，并在所述发射极区的下侧与所述栅极绝缘膜接触。所述阳极区为p型区域，其配置在所述二极管区域内，与所述上部电极接触。所述漂移区为n型区域，其横跨所述IGBT区域和所述二极管区域配置，在所述IGBT区域内配置在所述体区的下侧且位于所述集电极区的上侧，在所述二极管区域内配置在所述阳极区的下侧且位于所述阴极区的上侧，在所述体区的下侧与所述栅极绝缘膜接触，并且n型杂质浓度低于所述阴极区。在将位于沟槽下端的上侧且在所述IGBT区域内由一对沟槽夹持的半导体区域均作为沟槽间半导体区域时，位于最靠近二极管区域侧的边界沟槽间半导体区域内的漂移区具有高浓度层。所述高浓度层的n型杂质浓度高于位于该高浓度层下部的漂移区的n型杂质浓度。
此外，作为高浓度层，可以仅设置在边界沟槽间半导体区域中，也可以设置在包含边界沟槽间半导体区域在内的多个沟槽间半导体区域中，还可以设置在IGBT区域内的所有沟槽间半导体区域中。
在该半导体装置中，边界沟槽间半导体区域内的漂移区具有n型杂质浓度较高的高浓度层。因此，高浓度层成为屏障，空穴的流动被抑制。由此，在该半导体装置中，当二极管导通时，空穴难以流动至二极管区域与IGBT区域之间的边界部。
附图说明
图1是实施方式的半导体装置的剖视图。
具体实施方式
图1所示的实施方式的半导体装置10具备半导体基板12。半导体基板12是由硅构成的。半导体基板12的上表面12a配置有上部电极60。半导体基板12的下表面12b配置有下部电极62。
在半导体基板12的内部，在与下部电极62接触的区域内设置有p型集电极区32和n型阴极区39。以下，将沿着半导体基板12的厚度方向俯视观察半导体基板12时与集电极区32重合的区域称作IGBT区域16，将与阴极区39重合的区域称作二极管区域18。IGBT区域16内设置有IGBT，二极管区域18内设置有二极管，这些将在后面详细说明。也就是说，半导体装置10是所谓的RC-IGBT(reverse-conducting IGBT)。
半导体基板12的上表面12a上设置有多个沟槽40。各沟槽40沿着与图1的纸面垂直的方向(y方向)相互平行地延伸。多个沟槽40在图1的左右方向(x方向)上隔着间隔排列。在IGBT区域16和二极管区域18内分别设置有多个沟槽40。此外，在下文中，将半导体基板12的内部中，位于各沟槽40的下端的上侧且由一对沟槽40夹持的各个半导体区域称作沟槽间半导体区域70。另外，将IGBT区域16内最靠近二极管区域18侧的沟槽间半导体区域70称作边界沟槽间半导体区域70a。
各沟槽40的内表面被栅极绝缘膜42覆盖。各沟槽40的内部配置有栅极44。栅极44通过栅极绝缘膜42与半导体基板12绝缘。栅极44的表面被层间绝缘膜46覆盖。栅极44通过层间绝缘膜46与上部电极60绝缘。IGBT区域16内的各栅极44设置为，其电位能够从外部进行控制。二极管区域18内的各栅极44在未图示的位置与上部电极60连接。也就是说，二极管区域18内的各栅极44是无法改变电位的伪电极。
IGBT区域16内的各沟槽间半导体区域70内设置有发射极区20、体接触区22a、上部体区22b、势垒区23以及下部体区25。
发射极区20为n型杂质浓度较高的n型区域。发射极区20与上部电极60欧姆接触。发射极区20在沟槽40的上端部与栅极绝缘膜42接触。
体接触区22a为p型杂质浓度较高的p型区域。体接触区22a与上部电极60欧姆接触。体接触区22a与发射极区20相邻。
上部体区22b是p型杂质浓度低于体接触区22a的p型区域。上部体区22b从下侧接触发射极区20和体接触区22a。上部体区22b在发射极区20的下侧与栅极绝缘膜42接触。
势垒区23是n型杂质浓度低于发射极区20的n型区域。势垒区23从下侧接触上部体区22b。势垒区23隔着上部体区22b与发射极区20分离。势垒区23在上部体区22b的下侧与栅极绝缘膜42接触。
下部体区25是p型杂质浓度低于体接触区22a的p型区域。下部体区25从下侧接触势垒区23。下部体区25隔着势垒区23与上部体区22b分离。下部体区25在势垒区23的下侧与栅极绝缘膜42接触。
二极管区域18内的各沟槽间半导体区域70设置有阳极接触区34a、上部阳极区34b、势垒区36以及下部阳极区38。
阳极接触区34a是含有高浓度p型杂质的p型区域。阳极接触区34a与上部电极60欧姆接触。
上部阳极区34b是p型杂质浓度低于阳极接触区34a的p型区域。上部阳极区34b从下侧及侧方接触阳极接触区34a。上部阳极区34b与栅极绝缘膜42接触。上部阳极区34b的下端配置为深度与上部体区22b的下端大致相同。
势垒区36为n型区域，从下侧接触上部阳极区34b。势垒区36在上部阳极区34b的下侧与栅极绝缘膜42接触。势垒区36配置为深度与势垒区23大致相同。
下部阳极区38是p型杂质浓度低于阳极接触区34a的p型区域。下部阳极区38从下侧接触势垒区36。下部阳极区38隔着势垒区36与上部阳极区34b分离。下部阳极区38在势垒区36的下侧与栅极绝缘膜42接触。下部阳极区38配置为深度与下部体区25大致相同。
横跨IGBT区域16和二极管区域18而设置有漂移区26和缓冲区28。
漂移区26是n型杂质浓度低于阴极区39的n型区域。漂移区26从下侧接触下部体区25及下部阳极区38。漂移区26在下部体区25及下部阳极区38的下侧与栅极绝缘膜42接触。漂移区26从下部体区25及下部阳极区38的下端位置扩展至各沟槽40的下端的下侧。漂移区26在IGBT区域16内配置在体区22a、22b、25的下侧且配置在集电极区32的上侧。漂移区26在二极管区域18内配置在阳极区34a、34b、38的下侧且配置在阴极区39的上侧。漂移区26具有上部层26a、浮层26b以及主层26c。浮层26b的n型杂质浓度高于上部层26a及主层26c的n型杂质浓度。上部层26a的n型杂质浓度与主层26c的n型杂质浓度大致相等。
浮层26b设置在包含边界沟槽间半导体区域70a在内的IGBT区域16内的各沟槽间半导体区域70中。浮层26b在各沟槽间半导体区域70中从一个沟槽40延伸至另一个沟槽40。也就是说，浮层26b与位于其两侧的栅极绝缘膜42接触。浮层26b设置在IGBT区域16内，但没有设置在二极管区域18内。
上部层26a配置在浮层26b的上侧。上部层26a从下侧接触下部体区25，并且从上侧接触浮层26b。上部层26a与位于其两侧的栅极绝缘膜42接触。浮层26b隔着上部层26a与下部体区25分离。
主层26c分布为横跨IGBT区域16至二极管区域18。主层26c在IGBT区域16内从下侧接触浮层26b。另外，主层26c在二极管区域18内从下侧接触下部阳极区38。主层26c在浮层26b的下侧及下部阳极区38的下侧与栅极绝缘膜42接触。主层26c从浮层26b的下端及下部阳极区38的下端开始分布至各沟槽40的下端的下侧为止。
缓冲区28是n型杂质浓度高于漂移区26的n型区域。缓冲区28在IGBT区域16内和二极管区域18内从下侧接触漂移区26的主层26c。
IGBT区域16内设置有上述集电极区32。集电极区32具有较高的p型杂质浓度。集电极区32设置在包含下表面12b在内的区域内，与下部电极62欧姆接触。集电极区32从下侧接触缓冲区28。
二极管区域18内设置有上述阴极区39。阴极区39与缓冲区28相比具有较高的n型杂质浓度。阴极区39设置在包含下表面12b在内的区域内，与下部电极62欧姆接触。阴极区39从下侧接触缓冲区28。
在IGBT区域16内，通过发射极区20、体接触区22a、上部体区22b、势垒区23、下部体区25、漂移区26、缓冲区28、集电极区32以及栅极44等形成连接在上部电极60与下部电极62之间的IGBT。在半导体装置10作为IGBT动作的情况下，上部电极60为发射极，下部电极62为集电极。
在二极管区域18内，通过阳极接触区34a、上部阳极区34b、势垒区36、下部阳极区38、漂移区26、缓冲区28以及阴极区39等形成连接在上部电极60与下部电极62之间的二极管。在半导体装置10作为二极管动作的情况下，上部电极60为阳极，下部电极62为阴极。
对IGBT区域16内的IGBT的动作进行说明。如果使栅极44的电位上升至栅极阈值以上，则在栅极绝缘膜42的附近，上部体区22b和下部体区25反转为n型。由此形成了沟道。发射极区20、势垒区23、漂移区26通过沟道彼此连接。因此，电流就能够从集电极区32流向发射极区20。也就是说，IGBT导通。如果使栅极44的电位降低至低于栅极阈值，则沟道消失，IGBT断开。
对二极管区域18内的二极管的动作进行说明。如果对上部电极60施加高于下部电极62的电位，则在下部阳极区38和漂移区26的分界面的pn结处沿正向施加电压。如果该正向电压超过规定值，则二极管导通。其结果是，电流从阳极接触区34a经由上部阳极区34b、势垒区36、下部阳极区38、漂移区26、缓冲区28流向阴极区39。此外，虽然上部阳极区34b与下部阳极区38之间存在势垒区36，但由于势垒区36的n型杂质浓度比较低，因此，电流穿过势垒区36而从上部阳极区34b流向下部阳极区38。如果使上部电极60的电位降低，则二极管断开。
IGBT区域16内的各沟槽间半导体区域70的结构(即，在漂移区26的上侧设置有下部体区25、势垒区23、上部体区22b以及体接触区22a的结构)与二极管区域18内的各沟槽间半导体区域70的结构(即，在漂移区26的上侧设置有下部阳极区38、势垒区36、上部阳极区34b以及阳极接触区34a的结构)大致相同。因此，当二极管区域18内的二极管导通时，在IGBT区域16内，也在下部体区25和漂移区26的分界面的pn结处沿正向施加有电压。特别是，在靠近阴极区39的边界沟槽间半导体区域70a中，很容易在下部体区25和漂移区26的分界面的pn结处沿正向施加电压。因此，当二极管区域18内的二极管导通时，边界沟槽间半导体区域70a内的pn结导通，空穴将如图1的箭头100所示流动。也就是说，空穴从体接触区22a经由上部体区22b、势垒区23、下部体区25、漂移区26以及缓冲区28流向阴极区39。如果如箭头100所示流动的空穴较多，则二极管的正向电压将发生变动，这会成为元件特性产生偏差的主要因素。但是，在本实施方式的半导体装置10中，在边界沟槽间半导体区域70a内设置有浮层26b。由于浮层26b的n型杂质浓度高于主层26c的n型杂质浓度，因此，空穴难以流入主层26c。因此，通过浮层26b抑制了箭头100所示的空穴的流动。因此，在批量生产半导体装置10时，二极管的正向电压难以产生偏差。
另外，如上所述地，在二极管区域18内没有设置浮层26b。从而，在二极管区域18内，空穴流动不会受到浮层26b影响。因此，能够抑制二极管区域18内产生的损耗。
此外，在上述实施方式中，浮层26b从沟槽间半导体区域70两侧的一个沟槽40延伸至另一个沟槽40。但是，浮层26b也可以不与两侧的沟槽40中的一者接触或者不与任一个沟槽40接触。在此情况下，由于边界沟槽间半导体区域70a的漂移区26内存在浮层26b，因此也能够在一定程度上抑制箭头100所示的空穴流动。但是，如果浮层26b不与沟槽40接触，则空穴会通过浮层26b与沟槽40之间的间隙流动，因此抑制空穴流动的效果降低。由此，优选浮层26b从边界沟槽间半导体区域70a两侧的沟槽40的一个沟槽40延伸至另一个沟槽40。
另外，在上述实施方式中，浮层26b与下部体区25之间设置有n型杂质浓度较低的上部层26a，但也可以不设置上部层26a而使浮层26b与下部体区25接触。但是，如果使浓度相对较高的浮层26b与下部体区25接触，则有可能施加在它们之间的pn结处的反向电压超过内建电位，导致IGBT意外导通。因此，优选在浮层26b与下部体区25之间设置n型杂质浓度较低的上部层26a。
另外，在上述实施方式中，上部体区22b隔着势垒区23与下部体区25分离，但也可以不存在势垒区23而使上部体区22b与下部体区25接触。
另外，在上述实施方式中，上部阳极区34b隔着势垒区36与下部阳极区38分离，但也可以不存在势垒区36而使上部阳极区34b与下部阳极区38接触。
另外，在上述实施方式中，IGBT区域16内的所有沟槽间半导体区域70内均设置有浮层26b，但浮层26b也可以仅设置在边界沟槽间半导体区域70a内。另外，浮层26b也可以仅设置在包含边界沟槽间半导体区域70a在内的一部分沟槽间半导体区域70内。
此外，上述实施方式的浮层26b是权利要求书中的高浓度层的一个例子。
本说明书公开的技术要素在下面列出。此外，以下的各技术要素分别独立地起作用。
在本说明书公开的半导体装置的一个示例中，浮层也可以与位于边界沟槽间半导体区域两侧的各个栅极绝缘膜接触。
根据这一结构，能够更高效地抑制二极管区域与IGBT区域的边界处的空穴流动。
在本说明书公开的半导体装置的一个示例中，漂移区也可以具有位于浮层与体区之间且n型杂质浓度低于浮层的上部层。
根据这一结构，能够抑制IGBT意外导通。
以上对本发明的具体实施例进行了详细说明，但上述说明都不过是例示，并不限定权利要求书的保护范围。权利要求书的保护范围所记载的技术包含对以上例示的具体实施例进行各种变形、变更而得到的内容。本说明书或附图中说明的技术要素可以单独地或者通过各种组合而发挥技术实用性，并不被本申请的权利要求书记载的组合所限定。另外，本说明书或附图中例示的技术能够同时实现多个目的，仅实现其中一个目的本身也具有技术实用性。
标号的说明
10：半导体装置
12：半导体基板
16：IGBT区域
18：二极管区域
20：发射极区
22a：体接触区
22b：上部体区
23：势垒区
25：下部体区
26：漂移区
26a：上部层
26b：浮层
26c：主层
28：缓冲区
32：集电极区
34a：阳极接触区
34b：上部阳极区
36：势垒区
38：下部阳极区
39：阴极区
40：沟槽
42：栅极绝缘膜
44：栅极
46：层间绝缘膜
60：上部电极
62：下部电极
70：沟槽间半导体区域
70a：边界沟槽间半导体区域

Claims (3)

1.一种半导体装置，其具备IGBT和二极管，其特征在于，
具有：
半导体基板；
上部电极，其覆盖所述半导体基板的上表面；以及
下部电极，其覆盖所述半导体基板的下表面，
所述半导体基板具有：
IGBT区域，其在与所述下部电极接触的区域内设置有p型集电极区；以及
二极管区域，其在与所述下部电极接触的区域内设置有n型阴极区，
所述IGBT区域内的所述半导体基板的所述上表面设置有多个沟槽，
各个所述沟槽内设置有栅极绝缘膜、以及通过所述栅极绝缘膜与所述半导体基板绝缘的栅极，
所述半导体基板具有：
n型发射极区，其配置在所述IGBT区域内，与所述上部电极接触，并与所述栅极绝缘膜接触；
p型体区，其配置在所述IGBT区域内，与所述上部电极接触，并在所述发射极区的下侧与所述栅极绝缘膜接触；
p型阳极区，其配置在所述二极管区域内，与所述上部电极接触；以及
以及n型漂移区，其横跨所述IGBT区域和所述二极管区域配置，在所述IGBT区域内配置在所述体区的下侧且位于所述集电极区的上侧，在所述二极管区域内配置在所述阳极区的下侧且位于所述阴极区的上侧，在所述体区的下侧与所述栅极绝缘膜接触，并且n型杂质浓度低于所述阴极区，
在将位于沟槽下端的上侧且在所述IGBT区域内由一对沟槽夹持的半导体区域均设为沟槽间半导体区域时，位于最靠近二极管区域侧的边界沟槽间半导体区域内的漂移区具有高浓度层，
所述高浓度层的n型杂质浓度高于位于其下部的漂移区的n型杂质浓度。
2.根据权利要求1所述的半导体装置，其特征在于，
所述高浓度层与位于所述边界沟槽间半导体区域两侧的各个所述栅极绝缘膜接触。
3.根据权利要求1或2所述的半导体装置，其特征在于，
所述漂移区具有上部层，所述上部层位于所述高浓度层与所述体区之间，n型杂质浓度低于所述高浓度层。
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