CN1099703C - 在注塑模塑封装中用于集成电路装配的引线框架 - Google Patents

在注塑模塑封装中用于集成电路装配的引线框架 Download PDF

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CN1099703C
CN1099703C CN97194071A CN97194071A CN1099703C CN 1099703 C CN1099703 C CN 1099703C CN 97194071 A CN97194071 A CN 97194071A CN 97194071 A CN97194071 A CN 97194071A CN 1099703 C CN1099703 C CN 1099703C
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C·豪瑟尔
H·施密德特
J·温德尔
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Abstract

引线框架1有一种弹性零件(6)，在封装(5)的注塑模塑期间弹性零件(6)可以被注塑模具(7a，7b)压缩。总合弹力有这样的效果，即，引线(2)的接触表面(3)可以被压紧靠在注塑模具(7a，7b)的一个内壁(8)上。优点：防止在接触表面(3)上形成聚合物溢料，在注射操作期间固定引线(2)，在完成了的封装(5)中锚定引线(2)，对于在注塑模具(7a，7b)里面的压紧柱的必要性已不再存在。

Description

在注塑模塑封装中用于集成电路装配的引线框架
发明领域
本发明涉及一种引线框架，在注塑模塑封装中用于集成电路的装配，引线框架有一种引线(这是一种导体零件用于在电学上连接集成电路)，引线被提供有一种接触表面，这种接触表面在完成注塑模塑封装之后，则是该接触表面的一种外部接触，用于集成电路从封装外边的电连接。
背景技术
特别是，如果注塑模塑封装是以一种芯片卡形式或者其它类似的形式，那么接触表面在注塑模塑封装中不是直接在集成电路附近往往是人们所希望的。这就有这样一种结果，即这些引线在封装内或在封装的表面上延伸相对较远。产品通常借助于两半式的注塑模具来完成，注塑模具有一个腔体，集成电路被放进该腔体里面，集成电路有连接它的引线框架。在这种情况下，集成电路通常被提供有一种热固性外壳(所谓的模塑体)，带有接触表面的引线从热固性外壳伸出。在所谓的模具内加标牌的情况下，一种装潢膜或装潢标牌被放置在注塑模具中所形成的腔体的两个面的每一个面上。集成电路的外壳在两个装潢膜之间并且同它们直接接触。通过把热塑性聚合物挤压注入到两个装潢膜之间剩余的腔体中，实际的卡体于是就被制造成了。
在这种情况下可能出现两种不希望的结果：一方面，在注射热塑性聚合合成物的过程中通过相对高的注射压力(往往远超过1000巴)使得从集成电路外壳伸出的相对长的引线发生变形。另一方面，存在着所谓的溢料形成在引线的接触表面上，并在接触表面上产生一层热塑性聚合合成物薄膜的风险。当然这是不利的，因为为了以后的电连接，接触表面就必须没有聚合物。为了以后去掉溢料，通过一种清洁处理工艺再从接触表面上除去该层聚合物薄膜。另一种已知的可能避免溢料形成的方法是使用一些细的压紧柱，它们是注塑模具的组成部分并且，当两半注塑模具吻合在一起时，是把接触表面穿过作为结果所形成的腔体压紧靠在注塑模具的一个内壁上。以这种方法，避免了热塑性聚合物溢到接触表面的那个面上，即与注塑模具内壁接触着的那个面上。然而，这些压紧柱的使用有这样的缺点，即，在把聚合物注射到腔体里以后并且此后取出这些压紧柱以后，一些孔洞仍然留在被形成的注塑模塑封装中。
发明技术方案
本发明是基于这样一个目的，即给出另一种可能的方法，以这种方法在引线的接触表面上聚合物溢料的形成可以被避免。
通过根据权利要求1的一种引线框架这一目的被达到了。
本发明提供这样一种方法，即，每一条引线都被提供有一种弹性零件，在封装的注塑模塑期间弹性零件可以被注塑模具压缩，被压缩的弹性零件的总合力有这样的效果，即，引线的接触表面可以被压紧靠在注塑模具的内壁上。这种压缩是一种弹性零件的可逆变形。
根据本发明的这些弹性零件使得从以前的技术所知道的那些压紧柱的使用成为是不必要的。这就克服了那些与注塑模具的较复杂的操作相关联的缺点，并且避免了在取出压紧柱之后在注塑模塑封装中产生的那些孔洞。因为接触表面被固定，并因此还有引线被固定，在把聚合合成物注射到注塑模具里面期间在接触表面上溢料的形成及引线的变形通过本发明仍然被避免了。
如果弹性零件被设计成是一种钩形的，在封装里面的一种引线的锚定就可以同时被实现。因此，由于完成了的封装的机械负荷或者热负荷而造成的引线脱落或者接触表面脱落就可以被避免。
附图简介
下面参照附图对本发明进行说明，其中：
图1A至图4给出了一个根据本发明的引线框架的第一种示范实施例以及生产用于被连接到后者的集成电路封装的各种步骤。
图5和图6给出了根据本发明的引线框架的另外的示范实施例。
最佳实施例的描述
图1A从侧面给出了一个引线框架1的断面绘图。它有引线2，由于绘图的原因，在图1A中只有一条引线可以被看到。一块集成电路4被连接到引线框架1，为了保护起见，集成电路被提供有一个外壳9，外壳通常由一种热固性材料(模塑体)构成。外壳9只被安排在引线框架1的一个面上。
图1B以透视图绘图方式给出了根据图1A的实体图。外壳9和多条引线2再次被表示出来，在所有的情况下引线2都是作为一种接触表面3用于以后集成电路从尚待被制作的注塑模塑封装外边的外部电连接。下面参照一条引线2对本发明进行说明，不言而喻，引线框架1的所有引线可以按同样的方式被设计。
图1A显示出，引线2在它的从外壳9伸出的末端是以这样的形式被设计的，即，获得一种近似半环形的弹性零件6。在这种情况下，朝向接触表面3(图1A)的方向从下面加到弹性零件6上的压力产生弹性作用。如果弹性零件6如图1A所示那样被安置靠近接触表面3是特别有利的。这样做是因为作用在弹性零件6上的力因而被最佳地传递给接触表面3。为了说明弹性零件6的作用，下面对用于带有引线框架1的集成电路4的注塑模塑封装制作程序进行说明。
图2表示出了根据图1A的在它已被放进注塑模具7a，7b里面之后的实体，注塑模具有一个上半模具7a和一个下半模具7b。在这种情况下，注塑模具的这两个半模具7a，7b还没有完全闭合在一起，因此还没有力被施加在弹性零件6上。一种可能的制作注塑模塑封装的方法是所谓的在模具内加标牌，这里将对其进行说明。在这种情况下，注塑模具7a，7b的两个相对的内面分别被提供有一个热塑性装潢膜10，在这两个膜之间放进带有芯片4及外壳9的引线框架1，届时注塑模具7a，7b被吻合在一起。图2清楚地显示出，在本发明的这种示范实施例的情况下，弹性零件6有利地超过外壳9的厚度。因此，下半模具7b已经处于同弹性零件6相接触的状态，但是还没有与外壳9相接触。正如下面还将被看到的那样，外壳9的厚度，不把装潢膜10考虑在内，精确地对应着将被制作的注塑模塑封装的厚度。所以，弹性零件6因而超过将被制作的注塑模塑封装的厚度。
图3给出了在最终吻合在一起以后的注塑模具7a，7b。弹性零件6的突出部分有这样的效果，即在注塑模具吻合到一起期间它被压缩。其结果是，产生的弹性使得接触表面3被压紧靠在上半模具7a的一个内壁8上。在而后跟着的把热塑性聚合合成物注射到注塑模具7a，7b中剩余的腔体里面期间，通过弹性零件6就确保接触表面3平展地支撑紧靠在它上面的内壁8上，这一侧面此后作为集成电路的外部电连接，于是就没有聚合合成物可以到达这两者之间了。
图4给出了去掉注塑模具7a，7b之后的完成了的注塑模塑封装5。图4显示出接触表面3的上侧没有聚合物。而且，在注射操作期间通过被压缩的弹性零件6的弹性使得引线2是被卡住的或被固定的，使得在封装的制作期间引线2的变形被避免了。根据本发明的弹性零件6的另一个优点是，由于它的形状，引线2被锚定在注塑模塑封装5中。这就具有这样的效果，即，即使在注塑模塑封装5上出现弯曲负荷或者扭转负荷，接触表面3从封装5中的脱落也可以被避免。如果，正如在示范实施例的情况所说明的那样，弹性零件6是部分引线2，那么由于存在从下面覆盖着弹性零件6的下装潢膜10，就防止了经过弹性零件6对封装5的底面的接触，这种接触是一种另外可能的不希望有的接触。
图5给出了本发明的另一个示范实施例，其中弹性零件6再次是引线2的组成部分并被直接放置在接触表面3的附近。在这种情况下，弹性零件不是半环形的设计而是以一种J形设计的。同样，在本发明的这个示范实施例的情况下，它制造起来更简单，如上所述的同样优点被达到：防止溢料在接触表面3的上侧形成，防止在注射操作期间引线2弯曲并且在完成了的注塑模塑封装5中锚定引线2，并因此锚定接触表面3。
本发明特别有利地适合于制作非常薄的注塑模塑封装5，尤其适合于制作芯片卡的封装或者类似的封装。
本发明允许使用一种没有压紧柱的注塑模具，压紧柱是容易损坏的。在完成了的注塑模塑封装中的那些孔洞被避免了。
图6给出了本发明的另外一个示范实施例。只有部分引线框架1被表示出来，确切地说是引线2带有接触表面3及弹性零件6的部分，它在这个示范实施例的情况下同样是引线2的组成部分。在这种情况下，弹性零件6是在引线2的末端以一种锯齿形被形成的，因此就导致了一种特别有利的弹性性能。弹性零件6的末端再次以一种J形被形成，以便实现在完成了的封装5中引线2的附加锚定并且为注塑模具7a，7b提供一个良好的接合表面。

Claims (8)

1.引线框架(1)，在注塑模塑封装(5)中用于集成电路(4)的装配，含有—至少一条引线(2)，引线(2)有一种接触表面(3)用于从封装(5)的外边的电连接该集成电路(4)，—至少一条引线(2)有一弹性零件(6)，在封装(5)的注塑模塑期间弹性零件(6)可以被注塑模具(7a，7b)压缩，以此使得接触表面(3)可以被压紧靠在注塑模具(7a，7b)的一个内壁(8)上。
2.根据权利要求1的引线框架，其特征在于，引线(2)的一个末端被设计成弹性零件(6)。
3.根据权利要求1的引线框架，其特征在于，弹性零件(6)被设计成为一种钩形，以便在完成封装(5)以后引线(2)被锚定在其中。
4.根据权利要求3的引线框架，其特征在于，弹性零件(6)被设计成为一种J形。
5.根据权利要求3的引线框架，其特征在于，弹性零件(6)被设计成为一种半环形。
6.根据权利要求1的引线框架，其特征在于，弹性零件(6)被设计成至少部分是一种锯齿形。
7.根据权利要求1的引线框架，其特征在于，弹性零件(6)被安置在接触表面(3)的附近。
8.根据上述权利要求之一的引线框架，其特征在于，弹性零件(6)通过把两部分注塑模具(7a，7b)吻合在一起可以被压缩，弹性零件(6)超过了封装(5)的厚度。
CN97194071A 1996-06-24 1997-06-24 在注塑模塑封装中用于集成电路装配的引线框架 Expired - Fee Related CN1099703C (zh)

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Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19800646C2 (de) * 1998-01-09 2000-05-04 Siemens Ag Trägerelement für einen Halbleiterchip
EP0949582A1 (de) * 1998-04-07 1999-10-13 ESEC Management SA Elektronikobjekt
EP0949583A1 (de) * 1998-04-07 1999-10-13 ESEC Management SA Elektronikobjekt
TW508774B (en) * 2000-09-15 2002-11-01 Samsung Techwin Co Ltd Lead frame, semiconductor package having the same, method of manufacturing semiconductor package, molding plates and molding machine for manufacturing semiconductor package
US7220615B2 (en) * 2001-06-11 2007-05-22 Micron Technology, Inc. Alternative method used to package multimedia card by transfer molding
KR20050044323A (ko) * 2001-11-23 2005-05-12 나그라아이디 에스.에이. 적어도 하나의 전자부품을 포함하는 모듈 제조방법
FR2895548B1 (fr) * 2005-12-26 2008-03-21 Oberthur Card Syst Sa Procede de fabrication d'une carte a microcircuit, et carte a microcircuit associee
US7380721B2 (en) * 2006-08-22 2008-06-03 Honeywell International Inc. Low-cost compact bar code sensor
US7768231B2 (en) * 2006-09-18 2010-08-03 Lg Chem, Ltd. Battery pack
TWI331084B (en) * 2008-05-12 2010-10-01 Asustek Comp Inc In-mold decoration device and manufacturing method thereof
WO2011044062A1 (en) * 2009-10-05 2011-04-14 Cardiac Pacemakers, Inc. Multi-band antenna for implantable device
DE102012204630A1 (de) 2012-03-22 2013-09-26 Robert Bosch Gmbh Verfahren zur thermoplastischen Umspritzung und thermoplastische Umspritzung
JP6357371B2 (ja) * 2014-07-09 2018-07-11 新光電気工業株式会社 リードフレーム、半導体装置及びリードフレームの製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4709254A (en) * 1980-08-05 1987-11-24 Gao Gessellschaft Fur Automation Und Organisation Mbh Carrier element for an IC module
US4907061A (en) * 1986-10-08 1990-03-06 Mitsubishi Denki Kabushiki Kaisha Electronic device
US5030407A (en) * 1988-04-28 1991-07-09 Schlumberger Industries Method of making cards having graphics elements thereon
US5244840A (en) * 1989-05-23 1993-09-14 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing an encapsulated IC card having a molded frame and a circuit board

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2520541A1 (fr) * 1982-01-22 1983-07-29 Flonic Sa Procede d'insertion d'un circuit integre dans une carte a memoire et carte obtenue suivant ce procede
US4801561A (en) * 1984-07-05 1989-01-31 National Semiconductor Corporation Method for making a pre-testable semiconductor die package
FR2609821B1 (fr) * 1987-01-16 1989-03-31 Flonic Sa Procede de realisation de cartes a memoire et cartes obtenues par la mise en oeuvre dudit procede
US5438481A (en) * 1987-11-17 1995-08-01 Advanced Interconnections Corporation Molded-in lead frames
JPH01272142A (ja) * 1988-04-25 1989-10-31 Mitsubishi Electric Corp 半導体集積回路用ソケット
JPH04284661A (ja) * 1991-03-13 1992-10-09 Toshiba Corp 半導体装置
AU661867B2 (en) * 1991-09-30 1995-08-10 General Dynamics Information Systems, Inc. Plated compliant lead
JP3187106B2 (ja) * 1991-12-27 2001-07-11 ローム株式会社 電気回路素子のパッケージ構造
US5155901A (en) * 1991-12-30 1992-10-20 Fierkens Richard H J Integrated circuit lead frame positioner apparatus and method
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
MY109101A (en) * 1992-05-25 1996-12-31 Hitachi Ltd Thin type semiconductor device, module structure using the device and method of mounting the device on board
US5715872A (en) * 1992-10-14 1998-02-10 Micron Technology, Inc. Process and device for the shaping of leads of integrated circuits
JP3117828B2 (ja) * 1992-12-28 2000-12-18 ローム株式会社 合成樹脂封止型電子部品及びそのリード端子の曲げ加工方法
JP2927660B2 (ja) * 1993-01-25 1999-07-28 シャープ株式会社 樹脂封止型半導体装置の製造方法
US5474958A (en) * 1993-05-04 1995-12-12 Motorola, Inc. Method for making semiconductor device having no die supporting surface
JP2560974B2 (ja) * 1993-06-04 1996-12-04 日本電気株式会社 半導体装置
US5555204A (en) * 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
JP2565091B2 (ja) * 1993-07-01 1996-12-18 日本電気株式会社 半導体装置およびその製造方法
US5767443A (en) * 1993-07-10 1998-06-16 Micron Technology, Inc. Multi-die encapsulation device
US5420752A (en) * 1993-08-18 1995-05-30 Lsi Logic Corporation GPT system for encapsulating an integrated circuit package
US5448824A (en) * 1993-08-27 1995-09-12 Delco Electronics Corporation Method for forming a lead during molding of an electronic housing
JPH07230934A (ja) * 1994-02-18 1995-08-29 Rohm Co Ltd 電子部品及びその基板実装構造
KR950027550U (ko) * 1994-03-07 1995-10-18 정의훈 클로즈 가이드(Cloth guide)의 경사안내로울러 좌. 우 이송장치
US5494562A (en) * 1994-06-27 1996-02-27 Ciba Corning Diagnostics Corp. Electrochemical sensors
SE514116C2 (sv) * 1994-10-19 2001-01-08 Ericsson Telefon Ab L M Förfarande för framställning av en kapslad optokomponent, gjutform för kapsling av en optokomponent och tryckanordning för gjutform
US5945130A (en) * 1994-11-15 1999-08-31 Vlt Corporation Apparatus for circuit encapsulation
US5682673A (en) * 1995-04-17 1997-11-04 Ipac, Inc. Method for forming encapsulated IC packages
US6252302B1 (en) * 1996-09-19 2001-06-26 Warren M. Farnworth Heat transfer material for an improved die edge contacting socket
JP3175609B2 (ja) * 1996-11-19 2001-06-11 日本電気株式会社 チップ型電子部品
JP3011233B2 (ja) * 1997-05-02 2000-02-21 日本電気株式会社 半導体パッケージ及びその半導体実装構造
JPH1126678A (ja) * 1997-06-30 1999-01-29 Oki Electric Ind Co Ltd 電子部品のリード構造
US5869883A (en) * 1997-09-26 1999-02-09 Stanley Wang, President Pantronix Corp. Packaging of semiconductor circuit in pre-molded plastic package
US6081424A (en) * 1998-05-19 2000-06-27 Chrysler Corporation Mechanism for removing heat from electronic components

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4709254A (en) * 1980-08-05 1987-11-24 Gao Gessellschaft Fur Automation Und Organisation Mbh Carrier element for an IC module
US4907061A (en) * 1986-10-08 1990-03-06 Mitsubishi Denki Kabushiki Kaisha Electronic device
US5030407A (en) * 1988-04-28 1991-07-09 Schlumberger Industries Method of making cards having graphics elements thereon
US5244840A (en) * 1989-05-23 1993-09-14 Mitsubishi Denki Kabushiki Kaisha Method for manufacturing an encapsulated IC card having a molded frame and a circuit board

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WO1997050056A1 (de) 1997-12-31
US6614100B1 (en) 2003-09-02
EP0907928A1 (de) 1999-04-14
KR20000010656A (ko) 2000-02-25
JP3640676B2 (ja) 2005-04-20
DE19625228A1 (de) 1998-01-02
DE59705782D1 (de) 2002-01-24
KR100397081B1 (ko) 2003-10-17
DE19625228C2 (de) 1998-05-14
CN1216623A (zh) 1999-05-12
EP0907928B1 (de) 2001-12-12

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