CN109950219A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN109950219A
CN109950219A CN201810926077.XA CN201810926077A CN109950219A CN 109950219 A CN109950219 A CN 109950219A CN 201810926077 A CN201810926077 A CN 201810926077A CN 109950219 A CN109950219 A CN 109950219A
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China
Prior art keywords
metal layer
layer
semiconductor
semiconductor device
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CN201810926077.XA
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English (en)
Inventor
川城史义
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Publication of CN109950219A publication Critical patent/CN109950219A/zh
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Abstract

本发明实施方式提供能够提高可靠性的半导体装置。实施方式的半导体装置具备：半导体芯片，其具有半导体层和设置于半导体层上的电极；以及接合线，其与电极连接，电极具有包含铜的第1金属层、设置于第1金属层与半导体层之间且包含铝的第2金属层、以及设置于第1金属层与第2金属层之间且与第1金属层及第2金属层不同的材料的第3金属层，第1金属层的厚度比第2金属层的厚度及第3金属层的厚度厚。

Description

半导体装置及其制造方法
关联申请
本申请享受以日本专利申请2017-244341号(申请日：2017年12月20日)作为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及半导体装置及其制造方法。
背景技术
在功率半导体模块中，为了实现半导体芯片与电路基板之间或半导体芯片与电力端子之间的电连接而使用接合线。接合线的一端被连接于设置在半导体芯片上的电极衬垫上。
为了插入有功率半导体模块的设备的节能化，功率半导体模块的高密度化、小型化及高温动作化在发展。若功率半导体模块的高密度化、小型化及高温动作化发展，则施加于电极衬垫与接合线的连接部的热应力变大。由于热应力变大，变得容易产生接合线的打开不良等可靠性不良。
发明内容
本发明提供能够提高可靠性的半导体装置及其制造方法。
本发明的一个方案的半导体装置具备：半导体芯片，其具有半导体层和设置于上述半导体层上的电极；以及接合线，其与上述电极连接，上述电极具有包含铜的第1金属层、设置于上述第1金属层与上述半导体层之间且包含铝的第2金属层、以及设置于上述第1金属层与上述第2金属层之间且与上述第1金属层及上述第2金属层不同的材料的第3金属层，上述第1金属层的厚度比上述第2金属层的厚度及上述第3金属层的厚度厚。
附图说明
图1是第1实施方式的半导体装置的示意截面图。
图2是第1实施方式的局部的放大示意截面图。
图3是第1实施方式的半导体装置的制造方法的一个例子的工序流程图。
图4是第1实施方式的作用及效果的说明图。
图5是第2实施方式的局部的放大示意截面图。
图6是第3实施方式的局部的放大示意截面图。
图7是第3实施方式的半导体装置的制造方法的说明图。
图8是第4实施方式的局部的放大示意截面图。
图9是表示实施例的测定结果的图。
符号的说明
10 SBD(半导体芯片)
50 接合线
51 芯层
52 被覆层
100 半导体层
200 电极衬垫(电极)
201 OPM层(第1金属层)
202 衬垫层(第2金属层)
203 阻挡金属层(第3金属层)
204 表面层(第4金属层)
具体实施方式
本说明书中，对于相同或类似的构件标注相同的符号，有时省略重复的说明。
本说明书中，为了表示部件等的位置关系，有时将附图的上方向记述为“上”，将附图的下方向记述为“下”。本说明书中，“上”、“下”的概念未必是表示与重力的方向的关系的用语。
(第1实施方式)
第1实施方式的半导体装置具备：半导体芯片，其具有半导体层和设置于半导体层上的电极；以及接合线，其与电极连接，电极具有包含铜的第1金属层、设置于第1金属层与半导体层之间且包含铝的第2金属层、以及设置于第1金属层与第2金属层之间且与第1金属层及第2金属层不同的材料的第3金属层，第1金属层的厚度比第2金属层的厚度及第3金属层的厚度厚。
图1是第1实施方式的半导体装置的示意截面图。图2是第1实施方式的局部的放大示意截面图。图2是由图1中的点线的圆所围成的区域的放大图。第1实施方式的半导体装置为功率半导体模块。在功率半导体模块内安装有SBD(Schottky Brrier Diode，肖特基势垒二极管)。
第1实施方式的功率半导体模块具备SBD10(半导体芯片)、SBD12、基底板14、绝缘电路基板16、第1软钎料层20、第2软钎料层22、树脂壳26、盖28、第1电力端子30、第2电力端子32、硅胶34以及接合线50。绝缘电路基板16具有第1导电层17、第2导电层18以及陶瓷层19。
SBD10(半导体芯片)具有半导体层100和电极衬垫200(电极)。电极衬垫200具有OPM(Over Pad Metalization，过衬垫金属化)层201(第1金属层)、衬垫层202(第2金属层)以及阻挡金属层203(第3金属层)。
SBD10及SBD12被设置于绝缘电路基板16上。SBD10及SBD12例如为600V以上的高耐压的SBD。SBD10及SBD12通过第2软钎料层22被固定于第1导电层17上。第2软钎料层22为模具装配材。作为模具装配材，也可以使用比软钎料更高热传导的材料、例如Ag烧结材或Cu烧结材。SBD10及SBD12例如为使用了硅(Si)或碳化硅(SiC)的SBD。
基底板14例如为包含铜的金属。基底板14例如为纯铜或铜合金。基底板14也可以为铝。另外，基底板14也可以为高热传导陶瓷与金属的复合材料、例如碳化硅与铝的复合材料。
绝缘电路基板16被设置于SBD10与基底板14之间以及SBD12与基底板14之间。绝缘电路基板16具有确保SBD10与基底板14之间以及SBD12与基底板14之间的电绝缘的功能。在基底板14与绝缘电路基板16之间设置有第1软钎料层20。
绝缘电路基板16具有第1导电层17、第2导电层18以及陶瓷层19。第1导电层17及第2导电层18例如为金属膜。第1导电层17及第2导电层18例如包含铜。第1导电层17及第2导电层18例如为纯铜。陶瓷层19例如为氧化铝、氮化硅或氮化铝。
第1软钎料层20被设置于第2导电层18与基底板14之间。第1软钎料层20将绝缘电路基板16固定在基底板14上。
树脂壳26将绝缘电路基板16的周围包围而设置。在树脂壳26上设置有树脂的盖28。盖28在与基底板14之间夹着绝缘电路基板16。
另外，在功率半导体模块的内部，填充有硅胶34作为密封材料。树脂壳26、基底板14、盖28及硅胶34具有将半导体模块内的构件保护或绝缘的功能。另外，密封材料并不限于硅胶，例如也可以使用环氧系模塑树脂。
在树脂壳26的上部设置有第1电力端子30及第2电力端子32。例如，第1电力端子30为N端子，第2电力端子32为P端子。在树脂壳26的上部例如设置有未图示的AC输出端子及栅极端子。通过这些端子来进行功率半导体模块与外部的电连接。
第1电力端子30使用接合线50与第1导电层17电连接。SBD10使用接合线50与第1导电层17电连接。SBD12使用接合线50与第1导电层17电连接。第1导电层17使用接合线50与第2电力端子32电连接。另外，第1电力端子30可以不使用导电层17和接合线而介由软钎料接合，也可以使用超声波接合等而直接接合。
半导体层100例如为单晶硅或单晶碳化硅。半导体层100例如为n型半导体。
电极衬垫200被设置于半导体层100上。电极衬垫200与半导体层100相接而设置。电极衬垫200例如为SBD的阳极电极。
电极衬垫200具有OPM层201、衬垫层202以及阻挡金属层203。从半导体层100的一侧起依次设置衬垫层202、阻挡金属层203、OPM层201。
OPM层201包含铜(Cu)。OPM层201的材料为包含铜的金属。OPM层201的主要成分元素为铜。所谓主要成分元素是指规定的材料中的成分元素中量最多的成分元素。
OPM层201的材料例如为纯铜或铜合金。OPM层201例如为在铜(Cu)中包含选自由银(Ag)、镍(Ni)、铁(Fe)、锌(Zn)、锡(Sn)、铬(Cr)及钨(W)组成的组中的至少一种金属元素的铜合金。
OPM层201的厚度比衬垫层202的厚度厚。OPM层201的厚度比阻挡金属层203的厚度厚。OPM层201的厚度例如为20μm以上且300μm以下。OPM层201的厚度例如为衬垫层202的厚度的5倍以上。
OPM层201将起因于半导体层100与接合线50之间的线膨胀系数之差的热应力缓和。因此，OPM层201具有使电极衬垫200与接合线50的连接部的可靠性提高的功能。另外，在接合线50的连接时，具有将对半导体层100或衬垫层202施加的机械冲击缓和的功能。
衬垫层202被设置于OPM层201与半导体层100之间。衬垫层202的材料为包含铝(Al)的金属。衬垫层202的主要成分元素为铝。
衬垫层202的材料例如为纯铝或铝合金。衬垫层202的材料例如为在铝中包含硅(Si)或铜(Cu)的铝合金。
衬垫层的厚度例如为1μm以上且10μm以下。
衬垫层202具有将半导体层100与接合线50电连接的功能。
阻挡金属层203被设置于OPM层201与衬垫层202之间。阻挡金属层203例如为包含选自由钛(Ti)、钨(W)及钽(Ta)组成的组中的至少一种金属元素的金属。
阻挡金属层203的材料例如包含选自由钛、钨、钽、氮化钛、氮化钨、氮化钽及钛-钨合金组成的组中的至少一种材料。另外，本说明书中，金属氮化物也作为金属处理。
阻挡金属层203的厚度比衬垫层202的厚度薄。阻挡金属层203的厚度例如为0.01μm以上且0.2μm以下。
阻挡金属层203具有抑制OPM层201的材料与衬垫层202的材料之间的反应、抑制金属间化合物的形成的功能。
接合线50与电极衬垫200连接。接合线50例如为包含选自由铝(Al)、铜(Cu)、银(Ag)及金(Au)组成的组中的至少一种金属元素的金属。接合线50的主要成分元素例如为铝(Al)、铜(Cu)、银(Ag)或金(Au)。
接合线50的材料例如为纯铝或铝合金。另外，接合线50的材料例如为纯铜或铜合金。
接合线50的形状为圆柱形状或带形状。接合线50的宽度例如为100μm以上且600μm以下。接合线50的宽度定义为接合线50的相对于伸长方向垂直的截面中的最大宽度。
在接合线50与电极衬垫200之间，也可以存在未图示的金属间化合物。有时通过接合线50的材料与电极衬垫200的材料反应而形成金属间化合物。
接着，对第1实施方式的半导体装置的制造方法进行说明。第1实施方式的半导体装置的制造方法通过离子镀法在半导体层上形成包含铜的第1金属层，在第1金属层上连接接合线。
图3是第1实施方式的半导体装置的制造方法的一个例子的工序流程图。
首先，准备半导体晶片(半导体基板)。接着，在半导体晶片的半导体层100上形成衬垫层202(S10)。例如，通过利用溅射法在半导体层100的表面沉积铝膜，从而形成衬垫层202。在半导体晶片上形成有多个SBD(半导体芯片)。
接着，评价半导体晶片上的多个SBD的设备特性，进行合格品和次品的判定。
接着，通过将半导体晶片切断，从而单片化成多个SBD(S12)。半导体晶片的切断例如通过刀片切割法来进行。
接着，从单片化后的SBD中仅挑选合格品。在作为合格品的SBD的衬垫层202上形成阻挡金属层203(S14)。例如，通过溅射法在衬垫层202上沉积钛膜。
接着，在SBD的阻挡金属层203上形成OPM层201(S16)。OPM层201通过离子镀法来形成。例如，在阻挡金属层203上，通过离子镀法来沉积铜膜。
接着，将SBD载置于绝缘电路基板16上。SBD例如通过软钎焊而连接于绝缘电路基板16上。之后，在绝缘电路基板16的周围安装树脂壳26。
接着，在电极衬垫200上连接接合线50(S18)。接合线50与OPM层201的表面连接。通过一边施加超声波振动，一边将接合线50以规定的载荷按压于OPM层201的表面，从而进行接合线50的连接。
之后，将树脂壳26内的SBD及接合线50等用密封材料密封，用粘接剂等安装盖28。密封材料例如为硅胶34。
通过以上的制造方法，制造第1实施方式的功率半导体模块。
接着，对第1实施方式的半导体装置及其制造方法的作用及效果进行说明。
为了插入有功率半导体模块的设备的节能化，功率半导体模块的高密度化、小型化及高温动作化在发展。若功率半导体模块的高密度化、小型化及高温动作化发展，则施加于电极衬垫与接合线的连接部的热应力变大，变得容易产生接合线的打开不良等可靠性不良。
施加于电极衬垫与接合线的连接部的热应力起因于半导体层的材料的线膨胀系数与接合线的材料的线膨胀系数间有差异。通常，与半导体层的半导体的线膨胀系数相比接合线的金属的线膨胀系数大。
若线膨胀系数的差大，则例如通过半导体芯片的发热而施加于接合线的连接部的剪切应力变大，接合线中产生龟裂。因此，产生接合线的打开不良。
为了功率半导体模块的高温动作化，有时使用耐热性比硅高的碳化硅作为半导体层的材料。碳化硅的线膨胀系数与硅大致相同。但是，在使用碳化硅的情况下，半导体层的厚度一般变得比硅厚。因此，半导体层的材料与接合线的金属的表观的线膨胀系数的差变大，与硅的情况相比热应力变大。因此，在使用碳化硅的情况下，可以说对于接合线的可靠性的要求进一步变高。
图4是第1实施方式的作用及效果的说明图。图4是比较方式的局部的放大示意截面图。比较方式的半导体装置为功率半导体模块。图4是相当于第1实施方式的图2的图。
比较方式的功率半导体模块在电极衬垫200为衬垫层单层、不具备OPM层及阻挡金属层这点上与第1实施方式不同。
如比较方式的功率半导体模块那样，在接合线50被连接于薄的电极衬垫200上的情况下，接合线50与半导体层100之间的距离近。因此，施加于接合线50的连接部的剪切应力变大，容易产生可靠性不良。
另外，由于电极衬垫200的厚度薄，所以在接合线50的连接时，施加于电极衬垫200或半导体层100的机械冲击变大。因而，有可能电极衬垫200或半导体层100损伤。
在第1实施方式的功率半导体模块中，在接合线50与衬垫层202之间，设置有比衬垫层202厚的OPM层201。因此，接合线50与半导体层100之间的距离与比较方式相比变大。因此，施加于接合线50的连接部的剪切应力变小，功率半导体模块的可靠性提高。
另外，由于电极衬垫200的厚度与比较方式相比变厚，所以在接合线50的连接时，施加于电极衬垫200或半导体层100的机械冲击变小。因而，电极衬垫200或半导体层100损伤的可能性降低。
在第1实施方式的功率半导体模块中，OPM层201包含铜，衬垫层202包含铝。因此，若OPM层201与衬垫层202相接，则有时OPM层201的材料与衬垫层202的材料发生反应，在OPM层201与衬垫层202之间形成铜与铝的金属间化合物。
铜与铝的金属间化合物中，例如有Cu9Al4、Cu3Al2等对于卤素、硫的耐腐蚀性低的化合物，有可能使电极衬垫200的可靠性下降。例如，有可能所形成的金属间化合物因密封材料中包含的卤素而腐蚀，功率半导体模块的可靠性下降。
在第1实施方式的功率半导体模块中，在OPM层201与衬垫层202之间设置有阻挡金属层203。阻挡金属层203会抑制OPM层201的材料与衬垫层202的材料之间的反应，抑制铜与铝的金属间化合物的形成。因此，电极衬垫200的耐腐蚀性提高，功率半导体模块的可靠性提高。
在第1实施方式的制造方法中，在OPM层201的形成中使用离子镀法。离子镀法通过在反应室内生成等离子体而将成为膜的原料的金属粒子离子化并使其带正电。然后，将带正电后的金属粒子吸引到带负电的基板上并使其沉积。例如与溅射法、蒸镀法、镀覆法相比，能够稳定地成膜出密合性高、且厚的膜。
因此，通过在OPM层201的形成中使用离子镀法，功率半导体模块的可靠性提高，并且生产率也提高。
在第1实施方式的制造方法中，在挑选合格品和次品后，仅在合格品半导体芯片上形成OPM层201。因此，功率半导体模块的制造成本降低。另外，抑制半导体晶片的切断工序等中的OPM层201的表面氧化变得容易。
另外，在离子镀法中，单片化后的半导体芯片上的厚膜的成膜容易。因此，在挑选合格品和次品后，仅在合格品半导体芯片上形成OPM层201变得容易。
OPM层201的厚度优选为20μm以上且300μm以下，更优选为30μm以上且200μm以下，进一步优选为40μm以上且100μm以下。若低于上述范围，则有可能施加于接合线50的连接部的剪切应力没有充分地变小。另外，有可能施加于电极衬垫200或半导体层100的机械冲击没有充分地变小。若超过上述范围，则有可能OPM层201的形成所需要的时间增大，制造成本增大。
OPM层201优选为在铜(Cu)中包含选自由银(Ag)、镍(Ni)、铁(Fe)、锌(Zn)、锡(Sn)、铬(Cr)及钨(W)组成的组中的至少一种金属元素的铜合金。与纯铜相比耐热温度及机械强度提高，能够期待高温动作时的可靠性的提高。
从抑制OPM层201的材料与衬垫层202的材料之间的反应的观点出发，阻挡金属层203优选包含选自由钛、钨及钽组成的组中的至少一种金属元素。从上述观点出发，阻挡金属层203的材料优选包含选自由钛、钨、钽、氮化钛、氮化钨、氮化钽及钛-钨合金组成的组中的至少一种材料。
接合线50优选包含铜。接合线50的材料例如优选为纯铜或铜合金。铜例如与铝相比热导率大。因此，接合线50的连接部的温度上升得到抑制。因而，施加于接合线50的连接部的剪切应力变小，功率半导体模块的可靠性提高。
接合线50的宽度优选为100μm以上且600μm以下。若低于上述范围，则有可能通电容量不足而熔断。若超过上述范围，则有可能接合线50的连接变得困难。
以上，根据第1实施方式，可实现接合线50的连接部及电极衬垫200的可靠性不良得到抑制、可靠性提高的功率半导体模块及其制造方法。
(第2实施方式)
第2实施方式的半导体装置具备：具有半导体层和设置于半导体层上且具有包含铜的第1金属层的电极的半导体芯片；和与电极连接且具有包含铜的芯层和覆盖芯层的被覆层的接合线。第2实施方式的半导体装置在接合线具有包含铜的芯层和覆盖芯层的被覆层这点上与第1实施方式不同。以下，对于与第1实施方式重复的内容省略记述。
图5是第2实施方式的局部的放大示意截面图。图5是相当于第1实施方式的图2的图。
OPM层201包含铜(Cu)。OPM层201的材料为包含铜的金属。OPM层201的主要成分元素为铜。
接合线50具有芯层51和覆盖芯层51的被覆层52。被覆层52与电极衬垫200的OPM层201相接。
芯层51包含铜。芯层的主要成分元素为铜。芯层51的材料例如为纯铜或铜合金。
被覆层52例如为包含选自由铝、银、金及钯组成的组中的至少一种金属元素的金属。被覆层52的材料例如为铝或银。被覆层52的材料例如为耐氧化性比芯层51高的材料。
包含铜的接合线50的耐氧化性差。例如，由于在大气气氛中也进行氧化，所以接合线50的管理困难。
第2实施方式的接合线50在包含铜的芯层51的周围具有耐氧化性高的被覆层52。由于包含铜的接合线50的氧化得到抑制，所以接合线50的管理容易。因而，功率半导体模块的生产率提高。
被覆层52的材料优选为银。即使被覆层52中包含的银与OPM层201中包含的铜反应，也不会形成耐腐蚀性差的金属间化合物。因此，功率半导体模块的可靠性提高。
以上，根据第2实施方式，可实现除了第1实施方式的作用及效果以外、而且生产率进一步提高的功率半导体模块。
(第3实施方式)
第3实施方式的半导体装置在第1金属层与芯层相接这点上与第2实施方式不同。以下，对于与第2实施方式重复的内容省略记述。
图6是第3实施方式的局部的放大示意截面图。图6是相当于第1实施方式的图2的图。
OPM层201包含铜(Cu)。OPM层201的材料为包含铜的金属。OPM层201的主要成分元素为铜。OPM层201例如不包含铝。
接合线50具有芯层51和覆盖芯层51的被覆层52。芯层51与电极衬垫200的OPM层201(第1金属层)相接。
芯层51包含铜。芯层的主要成分元素为铜。芯层51的材料例如为纯铜或铜合金。芯层51例如不包含铝。
被覆层52例如为包含选自由铝、银、金及钯组成的组中的至少一种金属元素的金属。被覆层52的材料例如为铝或银。被覆层52的材料例如为耐氧化性比芯层51高的材料。
图7是第3实施方式的半导体装置的制造方法的说明图。
例如，在将接合线50与电极衬垫200连接之前，将接合线50暂时连接于接线机的临时粘接部300的铝面上。然后，将接合线50的底部(图7中所示的虚线部分)通过刀具等切断而除去。
由此，芯层51在接合线50的底部露出。之后，将露出的芯层51连接于电极衬垫200的OPM层201的表面。露出的芯层51与OPM层201的表面接触。
通过包含铜的芯层51与包含铜的OPM层201相接，从而在芯层51与OPM层201之间不会形成耐腐蚀性差的金属间化合物。因此，功率半导体模块的可靠性提高。
另外，通过包含铜的芯层51与包含铜的OPM层201相接，从而接合线50的连接部的材料的线膨胀系数变得均匀。因此，热应力减轻，功率半导体模块的可靠性提高。
以上，根据第3实施方式，可实现除了第2实施方式的作用及效果以外、而且可靠性进一步提高的功率半导体模块。
(第4实施方式)
第4实施方式的半导体装置在电极在第1金属层与接合线之间具有与被覆层相同的材料的第4金属层且被覆层与第4金属层相接这点上与第2实施方式不同。以下，对于与第2实施方式重复的内容省略记述。
图8是第4实施方式的局部的放大示意截面图。图8是相当于第1实施方式的图2的图。
接合线50具有芯层51和覆盖芯层51的被覆层52。被覆层52与电极衬垫200的表面层204相接。
芯层51包含铜。芯层的主要成分元素为铜。芯层51的材料例如为纯铜或铜合金。
被覆层52例如为包含选自由铝、银、金及钯组成的组中的至少一种金属元素的金属。被覆层52的材料例如为铝或银。被覆层52的材料例如为耐氧化性比芯层51高的材料。
电极衬垫200具有OPM层201(第1金属层)、衬垫层202、阻挡金属层203以及表面层204(第4金属层)。从半导体层100的一侧起依次设置有衬垫层202、阻挡金属层203、OPM层201、表面层204。
OPM层201包含铜(Cu)。OPM层201的材料为包含铜的金属。OPM层201的主要成分元素为铜。
表面层204为与被覆层52相同的材料。表面层204例如为包含选自由铝、银、金及钯组成的组中的至少一种金属元素的金属。表面层204的材料例如为铝或银。
表面层204的厚度例如为0.1μm以上且10μm以下。
例如，被覆层52因接合线50的连接时的超声波振动而一部分或全部断裂。因此，若没有表面层204且OPM层201与被覆层52的材料不同，则接合线50的连接部的材料的结构变得不均质。
在第4实施方式中，表面层204和被覆层52为相同的材料。因此，即使被覆层52的一部分或全部断裂，表面层204也残留，接合线50的连接部的材料的结构变得均质。因此，例如，热应力的分布变得均质，功率半导体模块的可靠性提高。
表面层204及被覆层52的材料优选为银。即使表面层204及被覆层52中包含的银与OPM层201中包含的铜发生反应，也不会形成耐腐蚀性差的金属间化合物。因此，功率半导体模块的可靠性提高。
以上，根据第4实施方式，可实现除了第2实施方式的作用及效果以外、而且可靠性进一步提高的功率半导体模块。
(实施例1)
制造了与第1实施方式同样的结构的功率半导体模块。半导体芯片为以碳化硅作为半导体层100的SBD。
电极衬垫200具有OPM层201(第1金属层)、衬垫层202、阻挡金属层203。OPM层201设定为厚度为25μm的纯铜膜，衬垫层202设定为厚度为4μm的纯铝膜，阻挡金属层203设定为厚度为0.1μm的纯钛膜。OPM层201的铜膜通过离子镀法来形成。
接合线50的材料设定为铝。接合线50的宽度(直径)设定为400μm。
对所制造的功率半导体模块进行功率循环试验，测定功率循环寿命(故障寿命)。功率半导体模块的壳温度(Tc)设定为75℃。
图9是表示实施例的测定结果的图。将实施例1的功率循环寿命的测定结果示于图9中。横轴为设备的开通动作时的结温(Tj)与设备的关闭动作时的结温(Tj)的差量(ΔTj)、换言之为设备的开通动作时的结温(Tj)与设备的关闭动作时的壳温度(Tc)的差量。纵轴为故障寿命。
(实施例2)
制造了与第2实施方式同样的结构的功率半导体模块。对于接合线50，使用了具有铜的芯层51和铝的被覆层52的接合线。除了接合线50以外，设定为与实施例1相同的条件。接合线50的宽度(直径)设定为400μm。芯层51的宽度(直径)设定为300μm，被覆层52的厚度设定为50μm。
在与实施例1相同的条件下进行功率循环试验，测定功率循环寿命(故障寿命)。将实施例2的功率循环寿命的测定结果示于图9中。
(比较例1)
除了电极衬垫为厚度为4μm的铝膜的单层以外，在与实施例1相同的条件下制造了功率半导体模块。即，除了在衬垫电极上没有OPM层201及阻挡金属层203以外，设定为与实施例1相同的条件。
在与实施例1相同的条件下进行功率循环试验，测定功率循环寿命(故障寿命)。将比较例1的功率循环寿命的测定结果示于图9中。
(比较例2)
除了电极衬垫为厚度为4μm的铝膜的单层以外，在与实施例2相同的条件下制造了功率半导体模块。即，除了在衬垫电极上没有OPM层201及阻挡金属层203以外，设定为与实施例2相同的条件。
在与实施例1相同的条件下进行功率循环试验，测定功率循环寿命(故障寿命)。将比较例2的功率循环寿命的测定结果示于图9中。
实施例1的故障寿命与比较例1的故障寿命相比，在ΔTj＝100℃时为1.5倍，在ΔTj＝75℃时为1.3倍。确认了：在接合线50中使用了铝的情况下，通过设置OPM层201而可靠性提高。
实施例2的故障寿命与比较例2的故障寿命相比，在ΔTj＝100℃时为4.7倍，在ΔTj＝75℃时为15倍。确认了：在接合线50中使用了具有铜的芯层51和铝的被覆层52的接合线的情况下，通过设置OPM层201而可靠性提高。另外，实施例2在ΔTj＝90℃(图9中的箭头下的数据)时没有发生故障，预想实际的故障寿命进一步变长。
在接合线50中使用了具有铜的芯层51和铝的被覆层52的接合线的比较例2的故障寿命与比较例1的故障寿命相比，在ΔTj＝100℃时为1.5倍，在ΔTj＝75℃时为1.3倍。与此相对，实施例2的故障寿命与比较例1的故障寿命相比，在ΔTj＝100℃时为7.1倍，在ΔTj＝75℃时为19倍，大大地得到改善。
由以上的结果可知，通过将具有铜的芯层51和铝的被覆层52的接合线50与OPM层201组合，可实现大幅的可靠性的提高。
在第1到第4实施方式中，作为半导体芯片以SBD为例进行了说明，但半导体芯片例如也可以为MOSFET(Metal Oxide Field Effect Transistor，金属氧化物场效应晶体管)，也可以为IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)，还可以为除SBD以外的二极管。
在第2到第4实施方式中，以设置与OPM层201不同的材料的衬垫层202和阻挡金属层203的情况为例进行了说明，但例如也可以制成不设置衬垫层202和阻挡金属层203、并且OPM层201与半导体层100相接的结构。
在第1实施方式的制造方法中，以在半导体晶片的切断后形成OPM层201的情况为例进行了说明，但也可以在半导体晶片的切断前形成OPM层201。
对本发明的几个实施方式进行了说明，但这些实施方式是作为例子提出的，并不意图限定发明的范围。这些新型的实施方式可以以其他各种方式实施，在不脱离发明的主旨的范围内，可以进行各种省略、置换、变更。例如，也可以将一实施方式的构成要素置换或变更为其他实施方式的构成要素。这些实施方式和其变形包含于发明的范围、主旨中，并且包含于权利要求书中记载的发明和其均等的范围内。

Claims (20)

1.一种半导体装置，其具备：
半导体芯片，其具有半导体层和设置于所述半导体层上的电极；以及接合线，其与所述电极连接，
所述电极具有包含铜的第1金属层、设置于所述第1金属层与所述半导体层之间且包含铝的第2金属层、以及设置于所述第1金属层与所述第2金属层之间且与所述第1金属层及所述第2金属层不同的材料的第3金属层，
所述第1金属层的厚度比所述第2金属层的厚度及所述第3金属层的厚度厚。
2.根据权利要求1所述的半导体装置，其中，所述第3金属层包含选自由钛、钨及钽组成的组中的至少一种金属元素。
3.根据权利要求1或权利要求2所述的半导体装置，其中，所述第3金属层包含选自由钛、钨、钽、氮化钛、氮化钨、氮化钽及钛-钨合金组成的组中的至少一种材料。
4.根据权利要求1或权利要求2所述的半导体装置，其中，所述第1金属层的厚度为20μm以上且300μm以下。
5.根据权利要求1或权利要求2所述的半导体装置，其中，所述接合线包含铜。
6.根据权利要求1或权利要求2所述的半导体装置，其中，所述接合线具有包含铜的芯层和覆盖所述芯层的被覆层。
7.根据权利要求6所述的半导体装置，其中，所述被覆层包含选自由铝、银、金及钯组成的组中的至少一种金属元素。
8.根据权利要求1或权利要求2所述的半导体装置，其中，所述接合线的宽度为100μm以上且600μm以下。
9.一种半导体装置，其具备：
半导体芯片，其具有半导体层、和设置于所述半导体层上且具有包含铜的第1金属层的电极；以及
接合线，其与所述电极连接且具有包含铜的芯层和覆盖所述芯层的被覆层。
10.根据权利要求9所述的半导体装置，其中，
所述电极具有设置于所述第1金属层与所述半导体层之间且包含铝的第2金属层，所述第1金属层的厚度比所述第2金属层的厚度厚。
11.根据权利要求10所述的半导体装置，其中，
所述电极具有设置于所述第1金属层与所述第2金属层之间、且与所述第1金属层及所述第2金属层不同的材料的第3金属层，
所述第1金属层的厚度比所述第3金属层的厚度厚。
12.根据权利要求9到权利要求11中任一项所述的半导体装置，其中，所述第1金属层的厚度为20μm以上且300μm以下。
13.根据权利要求9到权利要求11中任一项所述的半导体装置，其中，所述被覆层包含选自由铝、银、金及钯组成的组中的至少一种金属元素。
14.根据权利要求9到权利要求11中任一项所述的半导体装置，其中，所述第1金属层与所述芯层相接。
15.根据权利要求9到权利要求11中任一项所述的半导体装置，其中，
所述电极在所述第1金属层与所述接合线之间具有与所述被覆层相同的材料的第4金属层，
所述被覆层与所述第4金属层相接。
16.根据权利要求9到权利要求11中任一项所述的半导体装置，其中，所述接合线的宽度为100μm以上且600μm以下。
17.一种半导体装置的制造方法，
其通过离子镀法在半导体层上形成包含铜的第1金属层，
在所述第1金属层上连接接合线。
18.根据权利要求17所述的半导体装置的制造方法，其中，
在形成所述第1金属层之前，在半导体基板上形成包含铝的第2金属层；
在形成所述第2金属层之后，通过将所述半导体基板切断来形成包含所述半导体层及所述第2金属层的半导体芯片；
在所述第2金属层上形成所述第1金属层。
19.根据权利要求18所述的半导体装置的制造方法，其中，在形成所述第1金属层之前，在所述第2金属层上形成与所述第1金属层及所述第2金属层不同的材料的第3金属层。
20.根据权利要求17到权利要求19中任一项所述的半导体装置的制造方法，其中，
所述接合线具有包含铜的芯层和覆盖所述芯层的被覆层；
在所述第1金属层上连接所述接合线之前，将所述被覆层的一部分除去而使所述芯层露出；
在连接所述接合线时，使所述第1金属层与露出的所述芯层接触。
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