CN109643663B - 金属烧结接合体和芯片接合方法 - Google Patents

金属烧结接合体和芯片接合方法 Download PDF

Info

Publication number
CN109643663B
CN109643663B CN201780051107.0A CN201780051107A CN109643663B CN 109643663 B CN109643663 B CN 109643663B CN 201780051107 A CN201780051107 A CN 201780051107A CN 109643663 B CN109643663 B CN 109643663B
Authority
CN
China
Prior art keywords
region
paste
chip
joint body
metal sintered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201780051107.0A
Other languages
English (en)
Other versions
CN109643663A (zh
Inventor
竹政哲
上岛稔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Senju Metal Industry Co Ltd
Original Assignee
Senju Metal Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Senju Metal Industry Co Ltd filed Critical Senju Metal Industry Co Ltd
Publication of CN109643663A publication Critical patent/CN109643663A/zh
Application granted granted Critical
Publication of CN109643663B publication Critical patent/CN109643663B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F7/00—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression
    • B22F7/06—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression of composite workpieces or articles from parts, e.g. to form tipped tools
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F3/00—Manufacture of workpieces or articles from metallic powder characterised by the manner of compacting or sintering; Apparatus specially adapted therefor ; Presses and furnaces
    • B22F3/12—Both compacting and sintering
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F7/00—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression
    • B22F7/06—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression of composite workpieces or articles from parts, e.g. to form tipped tools
    • B22F7/062—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression of composite workpieces or articles from parts, e.g. to form tipped tools involving the connection or repairing of preformed parts
    • B22F7/064—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression of composite workpieces or articles from parts, e.g. to form tipped tools involving the connection or repairing of preformed parts using an intermediate powder layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/27312—Continuous flow, e.g. using a microsyringe, a pump, a nozzle or extrusion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/2732—Screen printing, i.e. using a stencil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2741—Manufacturing methods by blanket deposition of the material of the layer connector in liquid form
    • H01L2224/27418—Spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29016—Shape in side view
    • H01L2224/29017—Shape in side view being non uniform along the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29016—Shape in side view
    • H01L2224/29018—Shape in side view comprising protrusions or indentations
    • H01L2224/29019—Shape in side view comprising protrusions or indentations at the bonding interface of the layer connector, i.e. on the surface of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29217—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29218—Zinc [Zn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29217—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29224—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29239—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29244—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29247—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29238—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29255—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29263—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29264—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29263—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29266—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29263—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29269—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/29294—Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29317—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29318—Zinc [Zn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29317—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29324—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29364—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29366—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29369—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/8303—Reshaping the layer connector in the bonding apparatus, e.g. flattening the layer connector
    • H01L2224/83047—Reshaping the layer connector in the bonding apparatus, e.g. flattening the layer connector by mechanical means, e.g. severing, pressing, stamping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/83204—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83439—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8384—Sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3512—Cracking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Composite Materials (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Powder Metallurgy (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

提供热循环耐性和散热性优异的金属烧结接合体。对于本发明的金属烧结接合体，将基板与芯片接合，金属烧结接合体与芯片对置的矩形状区域的至少中央部和角部具有低于矩形状区域的平均孔隙率的低孔隙率区域，低孔隙率区域位于以矩形状区域的对角线为中心线的带状区域内。

Description

金属烧结接合体和芯片接合方法
技术领域
本发明涉及芯片接合中使用的金属烧结接合体和芯片接合方法。
背景技术
对于车载等中使用的功率器件，使用有带隙宽于Si的SiC、GaN等半导体。它们通过在高温下的使用而发挥高电力转化效率、低损耗等优异的性质。因此，功率器件的连接部也要求提高耐热性。
一般而言，金属间的接合通过软钎料而进行。对于以往使用的软钎料合金，电导率、导热率低，为低熔点，难以耐受功率器件的驱动温度。因此，作为功率器件代表性的高性能的SiC/GaN的接合中需要新的芯片接合材料。
近年来，使用了电导率、导热率高、为高熔点、且有稳定性的Ag糊剂的芯片接合备受关注。但是，由于Ag的熔点高，因此，想要以块接合时，基板会受到热损害。因此，为了实现接合温度的降低，采用了使用纳米颗粒的低温烧结技术。
然而，如果使用粒径小的纳米颗粒，则烧结温度降低，但是将芯片与基板接合的金属烧结接合体由于会成为多孔质，因此，烧结密度降低，作为其结果，热循环耐性、散热性降低。为了得到高的热循环耐性、散热性，必须提高烧结密度。为了形成具有高的烧结密度的金属烧结接合体，即使使用纳米颗粒，也需要边在250℃以上的加热温度下施加5～10MPa的高的加压力边进行烧结。由于IC、基板在这样的高温和高加压力下发生劣化，因此，正在进行在更低温、低加压力下达成高的烧结密度的研究。
例如，专利文献1中公开了一种导电性糊剂，其包含：混合了具有平均粒径为0.3μm～0.5μm的Ag纳米颗粒与具有平均粒径为2.0～3.2μm的Ag颗粒的混合物Ag颗粒、和低级醇，且不含粘接剂。专利文献1记载的发明中，为了降低电阻而不含有粘接剂，但由于使用混合物颗粒，因此，据说可以使孔隙率降低。利用晶界扩散容易在小颗粒与大颗粒之间产生而形成孔隙率低的组织。
另一方面，进行了如下研究：在不使用混合物颗粒的情况下，使用纳米颗粒，在烧结时不进行加压。专利文献2中公开了如下技术：为了在烧结时抑制在被接合构件与糊剂之间产生的缺口，将糊剂以宽于被接合构件的面积涂布在基板上，按照以被接合构件压入糊剂的量成为糊剂的涂布时的厚度的30％以上的方式，将糊剂在室温下加压，然后在无加压下进行烧结。
现有技术文献
专利文献
专利文献1：日本专利第5207281号公报
专利文献2：日本特开2014-110282号公报
发明内容
发明要解决的问题
然而，专利文献1中，关于烧结时的加压力，完全没有提及。仅凭借使用混合物Ag糊剂，在孔隙率的降低方面存在限度。另外，专利文献1中记载的发明的目的在于，为了降低电阻值而在糊剂中不含有粘接剂，因此，难以说用于提高热循环耐性和散热性的各特性的研究是充分的。
专利文献2中记载的发明如前述，在室温下进行加压后，在无加压下进行烧结，因此，据说可以抑制缺口的发生。然而，专利文献2中，关于加压时的加压方法，仅限定了烧结前的被接合构件的压入量。在烧结前虽然在室温下进行了加压，但是由于之后在无加压下进行烧结，因此无法充分降低孔隙率，无法充分提高热循环耐性和散热性。
另外，在两文献记载的发明中，假定认为如果在IC、基板不发生劣化的程度内边加压边进行烧结，则孔隙率多少会降低。但是，随着功率器件的小型化和工作温度的上升进行，以孔隙率多少会降低的程度难以应对高的热循环耐性和散热性的要求。
因此，本发明的课题在于，提供：热循环耐性和散热性优异的金属烧结接合体和芯片接合方法。
用于解决问题的方案
本发明人等为了实现热循环耐性和散热性的兼顾而进行了深入研究。关于热循环耐性，随着循环数的增加而裂纹的伸展自芯片的角部发生，因此，着眼于提高芯片角部的热循环耐性的方面。另外，关于散热性，通常为了将IC设置于芯片的中央部，该部分成为最高温，因此，着眼于使芯片的中央部效率良好地散热的方面。
而且，以往，为了将芯片与基板接合，例如如专利文献2的图所示那样，已经研究了具有均匀的组织的金属烧结接合体。然而，本发明人等为了兼顾热循环特性和散热性，假定金属烧结接合体的组织不如以往那样是均匀的，敢于关注使金属烧结接合体形成不均匀的组织，进而进行了研究。本发明人等发现：通过降低金属烧结接合体的与芯片中央部对应的区域和金属烧结体的与芯片角部对应的区域的孔隙率，从而可以同时实现热循环耐性和散热性的提高。
这样的金属烧结接合体无法单纯地如以往那样，在烧结前或烧结中仅凭借施加压力而得到。例如专利文献2的图5和图6中示出利用超声波显微镜观察烧结体的照片。假定如果孔隙率中存在波动则应出现在这些照片中，但却未能观察到孔隙率的波动。因此，仅凭借对涂布于基板的糊剂单纯地加压是无法得到期望的孔隙率的分布。
本发明人等进而推进研究，结果着眼于糊剂的加压时的糊剂的行为。通常，糊剂由粉末和溶剂构成，因此认为，通过加压而粉末和溶剂同时流动。其中，根据加压条件而异，溶剂自颗粒发生分离，仅溶剂被挤出至外部。因此，本发明人等详细地调查了粉末和溶剂同时流动的条件。
其结果得到如下见解，如果将糊剂涂布成为与芯片大致相同的面积和大致相同形状的矩形状并进行加压，则糊剂自4边的附近溢出，其周边的孔隙率变高，在角部和中央部的孔隙率相对变低，因此，以矩形状区域的对角线为中心线的带状区域的孔隙率变低。伴随此，以矩形状区域的对角线为中心线的带状区域的孔隙率变低。本发明人等基于这些见解，对加压时的各种条件进而研究，结果可以获得如下见解，在压入量和加压速度为规定条件的情况下，得到如上述那样具有期望的孔隙率分布的金属烧结接合体。
另外，还获得如下见解，如专利文献2中记载的发明那样，将糊剂以宽于芯片的范围涂布，之后将芯片压入糊剂，也不体现上述孔隙率。
如上述体现孔隙率的分布的现象是在糊剂具有一定程度的流动性的状态下体现的。因此，如以往常进行那样，进行在烧结前使有机溶剂挥发的工序的情况下，不体现。另外，获得如下见解：在涂布糊剂后，即使通过在想要降低孔隙率的部分另行涂布糊剂而在金属烧结接合体上形成密度梯度，以与芯片对置的矩形状区域的对角线为中心线的带状区域的、至少矩形状区域的中央部和角部的孔隙率也变低。
根据这些见解而得到的本发明如下所述。
(1)一种金属烧结接合体，其特征在于，其为将基板与芯片接合的金属烧结接合体，
金属烧结接合体与芯片对置的矩形状区域的至少中央部和角部具有低于矩形状区域的平均孔隙率的低孔隙率区域，
低孔隙率区域位于以矩形状区域的对角线为中心线的带状区域内。
(2)根据上述(1)所述的金属烧结接合体，其中，带状区域的宽度为芯片的1边的长度的3～30％。
(3)根据上述(1)或上述(2)所述的金属烧结接合体，其中，低孔隙率区域主要占有中央部。
(4)根据上述(1)或上述(2)所述的金属烧结接合体，其中，低孔隙率区域主要占有角部。
(5)根据上述(1)或上述(2)所述的金属烧结接合体，其中，低孔隙率区域均匀地存在于带状区域。
(6)根据上述(1)～上述(5)中任一项所述的金属烧结接合体，其中，低孔隙率区域相对于矩形状区域的面积的面积率为15％以上。
(7)根据上述(1)～上述(6)中任一项所述的金属烧结接合体，其中，低孔隙率区域相对于带状区域的面积的面积率为60％以上。
(8)根据上述(1)～上述(7)中任一项所述的金属烧结接合体，其中，低孔隙率区域的孔隙率相对于矩形状区域的平均孔隙率为70％以下。
(9)一种芯片接合方法，其特征在于，其为借助上述(1)～上述(8)中任一项所述的金属烧结接合体将芯片接合在基板上的芯片接合方法，
所述芯片接合方法具备如下工序：
涂布工序，在基板的涂布面且与芯片对置的矩形状区域，以糊剂的涂布面积成为芯片的面积的±0.4％的方式将糊剂涂布为矩形状；
载置工序，将芯片载置在涂布后的糊剂上；
加压工序，用芯片以加压速度为1μm/s以上、且使得芯片压入糊剂的压入量相对于糊剂的涂布厚成为10～60％的方式，对涂布后的糊剂进行加压；和，
烧结工序，将加压工序后的糊剂在3MPa以下的加压力和180～350℃的加热温度下进行烧结。
(10)根据上述(9)所述的芯片接合方法，其中，在涂布工序后且载置工序前，具备如下外涂敷涂布工序(overcoat step)：在矩形状区域的中央部和角部进而进行糊剂的外涂敷。
附图说明
图1为使用本发明的金属烧结接合体进行芯片接合的工序的概要工序图，图1的(A)为将芯片用芯片安装机载置于Ag糊剂上的工序，图1的(B)为用芯片对Ag糊剂进行加压的工序，图1的(C)为在芯片上放置砝码边施加接合压力边在热板上将Ag糊剂烧结的工序。
图2为实施例1的金属烧结接合体的平面照片和截面照片，图2的(a)为X射线平面照片(35倍)，图2的(b)为SAT平面照片，图2的(c)为图2的(a)的X-Y截面的SEM照片(30倍)，图2的(d)为图2的(c)中的左侧的虚线所围成的部分中的接合界面放大截面照片(1200倍)，图2的(e)为图2的(c)中的右侧的虚线所围成的部分中的接合界面放大截面照片(1200倍)。
图3为金属烧结接合体的X射线平面照片，图3的(a)为实施例1的X射线平面照片、图3的(b)为实施例5的X射线平面照片、图3的(c)为实施例6的X射线平面照片、图3的(d)为实施例7的X射线平面照片、图3的(e)为实施例8的X射线平面照片、图3的(f)为实施例9的X射线平面照片、图3的(g)为比较例1的X射线平面照片、图3的(h)为比较例2的X射线平面照片、图3的(i)为比较例4的X射线平面照片。
图4为金属烧结接合体的接合界面附近的放大截面图，图4的(a)为实施例1的放大截面SEM照片，图4的(b)为比较例1的放大截面SEM图。
图5为热循环试验后的接合界面的截面SEM照片，图5的(a)为实施例1的截面SEM照片，图5的(b)为比较例1的截面SEM照片。
具体实施方式
以下详述作为本发明的示例的用于实施本发明的方式。
1.金属烧结接合体
(1)基板和芯片
本发明的金属烧结接合体(以下，适宜称为“接合体”)用于将基板与芯片接合。本发明中，“芯片”例如为Si等通常使用的材质。作为“基板”，只要能在其表面涂布后述的糊剂就没有特别限定。例如可以举出：包含氧化铝、氮化铝、氧化锆、氮化锆、氧化钛、氮化钛或它们的混合物的陶瓷基板；包含Cu、Fe、Ni、Cr、Al、Ag、Au、Ti的金属基板；玻璃环氧树脂基板；BT树脂基板；玻璃基板；树脂基板；纸；等。
另外，在这些基板上，为了提高其与糊剂的亲和性，也可以实施镀Ag、镀Cu、镀Ni、镀Au。镀层的膜厚优选50nm～50μm。
(2)金属烧结接合体与芯片对置的矩形状区域
本发明的金属烧结接合体如后述，在与芯片对置的矩形状区域中具有特征。这是由于，芯片的形状通常为矩形状，在金属烧结接合体的与芯片对置的区域中必须体现热循环耐性和散热性。本发明中，对角部进行倒角的情况下，角度也可以稍偏离90°。另外，本发明中，“矩形”在俯视下包含长方形和正方形。
(3)矩形状区域的至少中央部和角部具有低于矩形状区域的平均孔隙率的低孔隙率区域。
对于本发明的金属烧结接合体，从提高热循环耐性和散热性的观点出发，在与芯片对置的矩形状区域中，具有至少中央部和角部的孔隙率低于接合体中的矩形状区域的平均孔隙率的低孔隙率区域。热循环耐性的测定中，主要源自对芯片的角部施加的应力而裂纹在接合体中伸展。因此，通过降低与芯片的角部对置的区域的孔隙率，从而裂纹最容易伸展的部分的接合强度提高，热循环耐性提高。
另外，关于散热性，设置于芯片的功率器件大多的布线在芯片的中央部集中，因此，驱动时中央部成为最高温。而且，芯片的热通过接合体向基板的面方向以放射状传导。因此，接合体中，提高与芯片的中央部对应的接合体中央部的散热性是用于提高散热性的有效的手段。
以往，设计成为使接合体的孔隙率为均匀，而本发明的金属烧结接合体中，敢于在位于芯片的矩形状区域、且矩形状区域的至少中央部和角部设置低孔隙率区域，从而可以实现以往无法达成的高的热循环耐性与散热性的兼顾。
本发明中，“中央部”是指，在金属烧结接合体与芯片对置的矩形状区域中，以对角线交叉的点为中心，距离该中心点的距离为芯片的1边的长度的30％以内的区域。另外，同样地，“角部”是指，在金属烧结接合体与芯片对置的矩形状区域中，距离顶点的距离为芯片的1边的长度的30％以内的区域。需要说明的是，本发明中的低孔隙率区域只要位于后述的带状区域内即可，因此，无需将上述“中央部”和“角部”的整体作为低孔隙率区域，只要各自的至少一部分为低孔隙率区域即可。
本发明中，低孔隙率区域的孔隙率可以如下求出：利用SEM或光学显微镜，拍摄金属烧结接合体的1200倍的截面照片，鉴定金属部分和孔隙部分，以纵横等间隔地各10条地画直线，总计20条，计算各线与孔隙重叠的部分的长度的总计除以各线的长度而得到的比率，从而求出。需要说明的是，低孔隙率区域均可以用SEM或光学显微镜以深的颜色在视觉上进行区别。
另外，本发明中，接合体中的矩形状区域的平均孔隙率可以如以下求出。首先，拍摄接合体的35倍以上的X射线平面照片，以接合体的1边的长度成为200mm的方式进行印刷。在印刷好的图像上画线，形成1边为2mm的正方形的方格。然后，将低孔隙率区域和除此以外的区域(以下，有时适宜称为“高孔隙率区域”)沿方格的网格进行切分。1个网格中包含低孔隙率区域和高孔隙率区域的情况下，将方格的网格进行二等分。
由如此得到的面积算出低孔隙率区域的面积相对于矩形状区域的面积的比率即低孔隙率区域的面积率、和高孔隙率区域的面积相对于矩形状区域的面积的比率即高孔隙率区域的面积率。之后，将低孔隙率区域的面积率与低孔隙率区域的孔隙率相乘，将高孔隙率区域的面积率与高孔隙率区域的孔隙率相乘，算出各自的总计，从而可以求出矩形状区域的平均孔隙率。需要说明的是，对于高孔隙率区域的孔隙率，在高孔隙率区域中，可以利用与低孔隙率区域的孔隙率同样的方法求出。
(4)低孔隙率区域的孔隙率：20％以下
本发明中，低孔隙率区域的孔隙率越低，热循环耐性和散热性越提高，因此，优选孔隙率越低。低孔隙率区域的孔隙率的上限优选20％以下、更优选15％以下、特别优选12％以下。另一方面，现实中难以使低孔隙率区域的孔隙率为0％。低孔隙率区域的孔隙率的下限优选1％以上、更优选3％以上。
另外，出于同样的观点，低孔隙率区域的孔隙率相对于金属烧结接合体中的矩形状区域的平均孔隙率，优选为70％以下、更优选为60％以下、特别优选为55％以下。
(5)低孔隙率区域位于以矩形状区域的对角线为中心线的带状区域内。
金属烧结接合体单纯地仅凭借具有低孔隙率区域，无法发挥本发明的效果。低孔隙率区域如果偏向于一方则热循环耐性无法提高，均匀地分散于矩形状区域的整体而存在也不会提高。为了有效地提高热循环耐性，低孔隙率区域必须位于金属烧结接合体的对称的区域。由此，一对低孔隙率区域变得分别存在于至少2个对称的角，可以体现高的热循环耐性。因此，本发明中，低孔隙率区域的特征在于，位于以接合体的对角线为中心线的带状区域内。
需要说明的是，本发明中，带状区域的宽度如果过宽，则角部的区域变宽，因此，低孔隙率区域的面积窄的情况下，无法将低孔隙率区域配置于对称的位置，有时无法得到期望的热循环耐性。另外，带状区域的宽度如果过宽，则中心部的区域变宽，因此，有时无法将低孔隙率区域配置于散热性提高那样的位置。进而如果带状区域过宽，低孔隙率区域会占有带状区域的全部，则金属烧结接合体整体的强度会变得过高，无法缓和应力，成为芯片破损的原因。因此，带状区域的宽度期望为芯片的1边的长度的3～30％。芯片为长方形的情况下，“1边的长度”是指，短边的长度。
另外，本发明中，从提高热循环耐性和散热性的观点出发，低孔隙率区域相对于矩形状区域的面积的面积率优选10％以上、更优选15％以上、特别优选20％以上。另外，出于同样的观点，低孔隙率区域相对于带状区域的面积的面积率优选60％以上、更优选70％以上、特别优选80％以上。低孔隙率区域的面积率如前述，可以在算出平均孔隙率时求出。
进而，根据功率器件的性能而有时想要优先提高散热性、热循环耐性中的任意者。因此，想要提高散热性的情况下，期望以低孔隙率区域主要占有中央部的方式配置。另一方面，想要提高热循环耐性的情况下，期望以主要占有角部的方式配置。此处，本发明中“主要”是指，为全部低孔隙率区域的60％以上的面积率。无需优先提高任意特性的情况下，低孔隙率区域可以均匀地存在于带状区域。
(6)金属颗粒
本发明的金属烧结接合体可以由金属纳米颗粒构成，可以使用微米颗粒与纳米颗粒的混合物颗粒，另外，也可以使用鳞片状微米颗粒与纳米颗粒的混合物颗粒，均可。从确保糊剂的流动性的观点出发，金属颗粒的粒径期望为接合体的厚度的1/6以下。
另外，作为金属颗粒的构成元素，期望由熔点体现至少在功率器件的驱动温度下不发生熔融的温度的元素构成，例如可以举出Ag、Cu、Pd、Au、Pt、Ti、Ni、Al、Zn等。它们之中，从通用性的观点出发，优选Ag、Cu，优选它们的混合粉末，特别优选Ag。
(7)金属烧结接合体的厚度
为了确保接合强度、以及担保涂布时的均匀性，金属烧结接合体的厚度期望为20～200μm。需要说明的是，还充分考虑芯片与基板倾斜的情况，因此，本发明中的接合体的厚度设为接合体的中心处的厚度。
2.芯片制造方法
本发明的金属烧结接合体例如可以如以下制造。利用图1对制造方法的一例进行说明。图1为使用本发明的金属烧结接合体进行芯片接合的工序的概要工序图，图1的(A)为将芯片用芯片安装机载置于Ag糊剂上的工序，图1的(B)为用芯片对Ag糊剂进行加压的工序，图1的(C)为在芯片上放置砝码边施加接合压力边在热板上将Ag糊剂进行烧结的工序。
(1)准备糊剂的工序
首先，准备金属微米颗粒、或金属纳米颗粒、或金属纳米颗粒与金属微米颗粒的混合物颗粒。然后，制造用于形成本发明的金属烧结接合体的糊剂。该糊剂如下制造：将上述金属颗粒或混合物颗粒与醇进行搅拌并混合，从而制造。
醇优选为低级醇、或具有选自由低级烷氧基、氨基和卤素组成的组中的1个以上取代基的低级醇。前述低级醇例如可以举出：包含具有碳原子1～6个的烷基、和羟基1～3个、优选1～2个的醇。作为前述低级烷基，例如可以举出甲基、乙基、正丙基、异丙基、正丁基、异丁基、仲丁基、叔丁基、正戊基、异戊基、仲戊基、叔戊基、2-甲基丁基、正己基、1-甲基戊基、2-甲基戊基、3-甲基戊基、4-甲基戊基、1-乙基丁基、2-乙基丁基、1,1-二甲基丁基、2,2-二甲基丁基、3,3-二甲基丁基、和1-乙基-1-甲基丙基等直链状或支链状的烷基。作为具有碳原子1～6个的烷基和具有羟基1～3个的低级醇，例如可以举出甲醇、乙醇、乙二醇、正丙醇、异丙醇、三乙二醇、正丁醇、异丁醇、仲丁醇、叔丁醇、正戊醇、异戊醇、仲戊醇、叔戊醇、2-甲基丁醇、正己醇、1-甲基戊醇、2-甲基戊醇、3-甲基戊醇、4-甲基戊醇、1-乙基丁醇、2-乙基丁醇、1,1-二甲基丁醇、2,2-二甲基丁醇、3,3-二甲基丁醇、和1-乙基-1-甲基丙醇等。
具有选自由低级烷氧基、氨基和卤素组成的组中的1个以上取代基的前述低级醇中，关于取代基，如以下所述。作为前述低级烷氧基，可以举出前述低级烷基被-O-取代而成的基团。作为前述低级烷氧基，可以举出甲氧基、乙氧基、正丙氧基、异丙氧基、正丁氧基、异丁氧基、仲丁氧基、叔丁氧基、正戊氧基等。作为前述卤素，可以举出氟、溴、氯和碘。
作为具有选自由低级烷氧基、氨基和卤素组成的组中的1个以上取代基的前述低级醇，例如可以举出甲氧基甲醇、2-甲氧基乙醇、2-乙氧基乙醇、2-氯乙醇、乙醇胺等。
需要说明的是，对于制造本发明的金属烧结接合体，为了如后述那样用芯片对糊剂进行加压并使颗粒流动而优选调整糊剂的粘性。糊剂的粘性只要为0.1～300Pa·s的范围即可，优选100～200Pa·s的范围。为了抑制常温下的粘性的上升，上述醇期望沸点为200℃以上。另外，糊剂中的粉末的含量只要为75～95质量％即可。
(2)将糊剂涂布于基板上的工序
将糊剂涂布于基板上的工序中，在基板的涂布面上将糊剂涂布在与芯片对置的矩形状区域。涂布糊剂的面积期望与芯片的面积为同等程度。糊剂的涂布面积如果比芯片的面积大幅过宽，则从与芯片对应的面溢出的糊剂在对糊剂加压时妨碍糊剂的流动，无法形成带状区域。另一方面，糊剂的涂布面积如果过窄，则即使对糊剂进行加压，糊剂也不会扩展至芯片整面，无法在芯片的角部形成金属烧结接合体。因此，糊剂的涂布面积优选为芯片的面积的±0.4％以下，更优选为芯片的面积的±0.3％以下，进而优选为芯片的面积的±0.1％，特别优选与芯片的面积大致相同。
涂布手段只要能在基板表面上涂布金属糊剂就没有特别限定。例如可以通过印刷法、涂覆法等而进行。作为印刷法，可以举出丝网印刷法、胶版印刷法、喷墨印刷法、柔性印刷法、凹版印刷法、冲压、分配、刮刀印刷、丝印印刷、喷雾、刷涂等，优选丝网印刷法、冲压和分配。
另外，本发明的芯片接合方法中，在经涂布的糊剂中，在前述带状区域中，可以在中央部和角部进行糊剂的外涂敷。由此，糊剂变得具有期望的密度梯度。上述情况下，无需如后述那样用芯片对糊剂特意进行加压，可以如下述(3)工序那样进行加压。如果进行加压，则糊剂流动，从而可以避免急剧的密度梯度，因此，可以防止烧结时的裂纹等。之后的烧结工序如后述。
经涂布的金属糊剂的厚度例如为20～500μm、优选为50～400μm、更优选为80～300μm。
(3)将芯片载置于涂布后的糊剂上的工序
如图1的(A)所示那样，用芯片安装机吸附芯片，并载置于糊剂上。该工序中，在将芯片载置于糊剂上之前，可以利用用于控制芯片安装机的间隙的设备，使芯片与基板的平坦度提高。具体而言，芯片相对于基板的倾斜角度优选1°以下、更优选0.8°以下、特别优选0.5°以下。如果在芯片倾斜了的状态下对糊剂进行加压，则无法如本发明的金属烧结接合体那样在矩形状区域的中央部和角部形成低孔隙率区域。作为理由，推测以下情况。芯片如果倾斜，则糊剂不是各向同性的，而沿单向流动，不产生低孔隙率区域，或即使产生低孔隙率区域，也仅在接合体的单侧产生，无法位于接合体的对称的区域。与此相对，基板与芯片的倾斜角度如果基本不存在，在平坦度极高的状态下用芯片对糊剂进行加压，则可以对糊剂均匀地施加压力，糊剂各向同性地流动，在规定的位置产生低孔隙率区域。
(4)用芯片对糊剂进行加压的加压工序
接着，如图1的(B)所示那样，用芯片对Ag糊剂进行加压。
本发明中，通过在上述条件下对糊剂进行加压，从而可以形成低孔隙率区域。其理由如以下推测。如果对芯片进行加压，则糊剂扩展一定程度，糊剂从芯片的4边部溢出。这样一来，因溢出而导致4边的附近区域中的粉末密度降低，烧结后在4边的附近区域中孔隙率变高。另一方面，对于角部而言，糊剂即使被芯片挤压，糊剂也基本不溢出，因此，未见粉末密度的降低。这样一来，可以在以对角线为中心线的带状区域的孔隙率不增加的情况下，在带状区域形成低孔隙率区域。
本发明中，为了不依赖于糊剂的流动性而金属烧结接合体成为规定的厚度，需要以糊剂的涂布厚的10～60％的范围压入。如果为该范围内，则糊剂各向同性地流动，可以得到期望的密度梯度。压入量如果低于10％，则糊剂不充分流动，无法得到期望的密度梯度。压入量的下限为10％以上、优选20％以上、更优选25％以上。另一方面，压入量如果超过60％，则糊剂的溢出量过多，无法得到期望的金属烧结接合体的厚度。另外，残留于芯片下的糊剂量变少，密度分布降低，无法得到期望的低孔隙率区域。压入量的上限为60％以下、优选50％以下、更优选40％以下。
本发明中，以糊剂与粉末和溶剂一起流动的方式，以1μm/s以上的加压速度将芯片压入糊剂。加压速度如果低于1μm/s，则仅糊剂中的溶剂成分被挤出至外部，粉末不流动，无法得到低孔隙率区域。加压速度的下限为1μm/s以上、优选2μm/s以上。加压速度的上限没有特别限制，只要装置的型号和压入量的控制为可能的范围即可，优选200μm/s以下。
加压时间可以为加压所产生的密度梯度体现的程度的时间，可以为几秒～1分钟左右。
另外，其为烧结前的工序，因此，从确保糊剂的流动性的观点出发，优选在室温下进行。想提高糊剂的流动性的情况下，也可以加温至不挥发的程度，例如可以加温至50℃左右。
(5)边施加接合压力边在180～350℃的温度范围内将糊剂进行烧结的工序
如图1的(C)所示那样，在芯片上放置砝码，边施加接合压力边在热板上将Ag糊剂进行烧结。放置于芯片的砝码的质量以接合压力成为3MPa以下的方式适宜选择。接合压力如果超过3MPa，则有IC、基板破损的担心。另外，在芯片下烧结的接合体的板厚变薄，密度分布降低，无法得到期望的低孔隙率区域。加热温度加热至180～350℃的温度域，加热时间优选5～300分钟。
需要说明的是，在烧结时即使芯片与基板稍倾斜，在糊剂中产生的密度梯度也不会消失，因此，放置砝码的位置没有特别限定，期望以芯片与基板的倾斜角度维持前述的范围内的方式，使放置砝码的位置为芯片的中央部。也可以使用弹簧、机筒等施加接合压力代替在芯片上放置砝码。
加热后，进行空气冷却，芯片接合结束。
实施例
·实施例1
(糊剂的制作)
本实施例中，使用厚度为260nm且平均粒径为8.0μm的Ag微小鳞片颗粒50g、和平均粒径为0.3μm的亚微米颗粒的混合物颗粒50g，得到Ag颗粒。需要说明的是，平均粒径通过激光方法(大塚电子株式会社制、动态光散射光度计DLS-8000)而求出。用KeyenceCorporation制的KEYENCEHM-500混合物混合机将该颗粒和乙二醇混合，制作粘性为150Pa·s的混合物Ag糊剂。该糊剂的Ag颗粒为糊剂的90质量％。
(糊剂的涂布、芯片的载置、用芯片对糊剂进行的加压)
用金属掩模，将该糊剂以4mm×4mm×0.1mm的尺寸涂布于表面上实施了镀Ni-Ag(膜厚：40μm)的20mm×20mm×1mm的铜基板。之后，用芯片安装机，将4mm×4mm×0.4mm的Si芯片载置在涂布于Cu基板的糊剂上。然后，以0.2MPa的载荷压力，在室温下，用Si芯片加压10秒。加压后的糊剂的厚度为0.07mm(涂布时的70％)。另外，加压速度设为下述表1所示的速度。此时，使用用于控制芯片安装机的间隙的设备，以基板与芯片的倾斜角度成为1°的方式进行调整。
(糊剂的加热)
在芯片上放置砝码，边施加0.2MPa的载荷压力边在热板上以180℃加热5分钟，以10℃/分钟的升温速度升温至250℃，保持30分钟。之后，冷却至室温，使芯片接合结束。
(烧结体的观察)
使用日立制作所制的FS300III，通过SAT(高速超声波扫描显微镜，high speedScanning Acoustic Tomograph)观察糊剂与基板或芯片的接合状态。该图像是将超声波探针的扫描间距设为0.01mm而得到的。另外，使用株式会社东研社制的TUX-3200进行X射线观察，由拍摄到的X射线照片，对于密度分布的有无，以目视进行观察。
使用日本电子株式会社制的JSM-6610LV，通过SEM观察接合体的截面微细结构。
(密度的状态、孔隙率、面积率)
对于密度的状态，从接合体的X射线平面照片以目视进行观察。带状区域中能确认到深的颜色的情况记作“〇”、无法确认到深的颜色的情况记作“×”。
低孔隙率区域的孔隙率如下：拍摄金属烧结接合体的1200倍的截面SEM照片，鉴定金属部分和孔隙部分，以纵横等间隔地各10条地画直线，总计20条，算出各线与孔隙重叠的部分的长度的总计除以各线的长度而得到的比率。
接合体整体的平均孔隙率如下：拍摄接合体的35倍的X射线平面照片，以接合体的1边的长度成为200mm的方式进行印刷。在印刷好的图像上画直线，形成1边为2mm的正方形的方格。X射线平面照片中，颜色深的部分为低孔隙率区域，颜色浅的部分为高孔隙率区域。然后，将低孔隙率区域和高孔隙率区域沿着方格的网格切分。1个网格中包含低孔隙率区域和高孔隙率区域的情况下，将方格纸的网格二等分。
由如此得到的面积，算出低孔隙率区域的面积相对于矩形状区域的面积的比率即低孔隙率区域的面积率、和高孔隙率区域的面积相对于矩形状区域的面积的比率即高孔隙率区域的面积率。之后，将低孔隙率区域的面积率与如前述求出的低孔隙率区域的孔隙率相乘，将高孔隙率区域的面积率与如前述求出的高孔隙率区域的孔隙率相乘，算出各自的总计，从而求出。需要说明的是，低孔隙率区域如下：以金属烧结接合体的对角线为中心线，以位于宽为芯片的1边的长度的20％的带状区域内的区域为对象。
(TCT裂纹伸展率)
热循环耐性如下：在将-40℃：20分钟、200℃：40分钟设为1个循环的条件下，500个循环试验后，观察芯片的对角线截面，测定对角线上的裂纹伸展长度，算出将对角线整体设为100％时的裂纹伸展长度的占有率，作为裂纹伸展率。
·实施例2、5～10、比较例1～4
这些实施例如下：在实施例1中分别变更为表1中记载的条件，进行芯片接合。
·实施例3和4
实施例1中，将糊剂涂布于基板后，在中央部(中心)和角部(4角)再次涂布相同的糊剂各0.5mg后，与实施例1同样地进行芯片接合。需要说明的是，实施例3中，在角部另行涂布糊剂，实施例4中，在中央部另行涂布糊剂。
·比较例5
实施例1中，使用金属掩模，以5mm×5mm×0.1mm的尺寸进行涂布，用芯片安装机，将4mm×4mm×0.4mm的Si芯片载置在涂布于Cu基板的糊剂上，除此之外，与实施例1同样地进行芯片接合。
需要说明的是，表1中，“-”表示如下情况：未见密度梯度而成为均匀的孔隙率，因此未进行测定。
[表1]
Figure GDA0002202429180000171
由表1表明，实施例的接合体具有规定的密度梯度，至少在接合体的中央部和角部存在低孔隙率区域，体现该孔隙率低于平均孔隙率的值。其结果，体现优异的热循环耐性。另外，这样的低孔隙率区域存在，因此，散热性也优异。实施例3中，全部低孔隙率区域的60％以上存在于角部。实施例4中，全部低孔隙率区域的60％以上存在于中央部。
另一方面，比较例1和2中，芯片搭载速度密度慢，糊剂未各向同性地流动，因此，完全观察不到密度梯度，孔隙率在接合体的任意位置均为同等程度，烧结密度不依赖于位置、为均匀。因此，不依赖于位置，比较例1和2的孔隙率表示金属烧结接合体整体的平均孔隙率。
对于比较例3，加热时的加压力过高，因此，不体现密度梯度，无法形成低孔隙率区域。
对于比较例4，由于未用芯片压入糊剂，因此，糊剂不流动，不体现密度梯度，无法形成低孔隙率区域。
对于比较例5，糊剂的涂布面积宽，从加压前在芯片的周围存在糊剂，因此，位于芯片下的糊剂没有从芯片溢出，因此，不体现密度梯度，无法形成低孔隙率区域。
以下用照片进而详述。
图2为实施例1的接合体的平面照片和截面照片，图2的(a)为X射线平面照片(35倍)，图2的(b)为SAT平面照片，图2的(c)为图2的(a)的X-Y截面的SEM照片(30倍)，图2的(d)为图2的(c)中的左侧的虚线所围成的部分中的接合界面放大截面照片(1200倍)，图2的(e)为图2的(c)中的右侧的虚线所围成的部分中的接合界面放大截面照片(1200倍)。
由图2的(a)和图2的(b)明确可知，实施例1中，在以对角线为中心线的带状区域中存在低孔隙率区域。实施例1中，低孔隙率区域相对于金属烧结接合体的面积的面积率为30％，低孔隙率区域相对于带状区域的面积的面积率为85％。由图2的(c)明确可知，在接合界面未产生孔隙。由图2的(e)明确可知，在图2的(a)的X-Y截面中，在图2的(e)所示的低孔隙率区域中，孔隙少，体现低的孔隙率，因此，具有高的烧结密度。另外可知，在图2的(d)所示的区域中，孔隙多，孔隙率高于低孔隙率区域。
接着，示出调查了芯片搭载速度和芯片压入量的结果。图3为金属烧结接合体的X射线平面照片，图3的(a)为实施例1的X射线平面照片、图3的(b)为实施例5的X射线平面照片、图3的(c)为实施例6的X射线平面照片、图3的(d)为实施例7的X射线平面照片、图3的(e)为实施例8的X射线平面照片、图3的(f)为实施例9的X射线平面照片、图3的(g)为比较例1的X射线平面照片、图3的(h)为比较例2的X射线平面照片、图3的(i)为比较例4的X射线平面照片。
由图3的(a)～图3的(f)表明，实施例中，以对角线为中心线的带状区域变深，该深的颜色所示的区域为低孔隙率区域。另一方面，由图3的(g)～图3的(i)表明，比较例1和比较例2中，芯片搭载速度慢，因此，糊剂不充分流动，未见低孔隙率区域。而且，对于比较例4，未将芯片压入至糊剂，因此，糊剂不流动，未见低孔隙率区域。
图3中，确认深的颜色的部分为低孔隙率区域，因此，根据截面观察确认了孔隙的分布。图4为金属烧结接合体的接合界面附近的放大截面图，图4的(a)为实施例1的放大截面SEM照片，图4的(b)为比较例1的放大截面SEM图。需要说明的是，图4中，与图2的(a)同样地，以通过中心部的方式切成2份，对其断裂面进行观察。由图4的(a)表明，实施例1的金属烧结接合体的中心部中，不怎么观察到孔隙，除中心部以外的区域中，观察到大量的孔隙。另一方面，由图4的(b)明确可知，比较例1的金属烧结接合体中，孔隙均匀地分散于整体。
图5为热循环试验后中的接合界面的截面SEM照片，图5的(a)为实施例1的截面SEM照片，图5的(b)为比较例1的截面SEM照片。如图5的(a)所示那样，实施例1中，在热循环试验后也完全未见裂纹。另一方面，如图5的(b)所示那样，可知，比较例1中，在热循环试验后产生了裂纹。因此可知，比较例1的裂纹伸展率较大。

Claims (10)

1.一种金属烧结接合体，其特征在于，其为将基板与芯片接合的金属烧结接合体，
所述金属烧结接合体与所述芯片对置的矩形状区域的至少中央部和角部具有低于所述矩形状区域的平均孔隙率的低孔隙率区域，
所述低孔隙率区域位于以所述矩形状区域的对角线为中心线的带状区域内。
2.根据权利要求1所述的金属烧结接合体，其中，所述带状区域的宽度为所述芯片的1边的长度的3～30％。
3.根据权利要求1或2所述的金属烧结接合体，其中，所述低孔隙率区域主要占有所述中央部。
4.根据权利要求1或2所述的金属烧结接合体，其中，所述低孔隙率区域主要占有所述角部。
5.根据权利要求1或2所述的金属烧结接合体，其中，所述低孔隙率区域均匀地存在于所述带状区域。
6.根据权利要求1或2所述的金属烧结接合体，其中，所述低孔隙率区域相对于所述矩形状区域的面积的面积率为15％以上。
7.根据权利要求1或2所述的金属烧结接合体，其中，所述低孔隙率区域相对于所述带状区域的面积的面积率为60％以上。
8.根据权利要求1或2所述的金属烧结接合体，其中，所述低孔隙率区域的孔隙率相对于所述矩形状区域的平均孔隙率为70％以下。
9.一种芯片接合方法，其特征在于，其为借助在基板上涂布糊剂并烧结而得到的权利要求1～8中任一项所述的金属烧结接合体，将芯片接合在所述基板上的芯片接合方法，
所述芯片接合方法具备如下工序：
涂布工序，在所述基板的涂布面且与所述芯片对置的矩形状区域，以所述糊剂的涂布面积成为所述芯片的面积的±0.4％的方式将所述糊剂涂布为矩形状；
载置工序，将所述芯片载置在涂布后的所述糊剂上；
加压工序，用所述芯片以加压速度为1μm/s以上、且使得所述芯片压入所述糊剂的压入量相对于所述糊剂的涂布厚成为10～60％的方式，对涂布后的所述糊剂进行加压；和，
烧结工序，将所述加压工序后的所述糊剂在3MPa以下的加压力和180～350℃的加热温度下进行烧结。
10.根据权利要求9所述的芯片接合方法，其中，在所述涂布工序后且所述载置工序前，具备如下外涂敷涂布工序：在所述矩形状区域的中央部和角部进而进行糊剂的外涂敷。
CN201780051107.0A 2016-08-22 2017-08-17 金属烧结接合体和芯片接合方法 Active CN109643663B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2016-162247 2016-08-22
JP2016162247 2016-08-22
PCT/JP2017/029532 WO2018037992A1 (ja) 2016-08-22 2017-08-17 金属焼結接合体、およびダイ接合方法

Publications (2)

Publication Number Publication Date
CN109643663A CN109643663A (zh) 2019-04-16
CN109643663B true CN109643663B (zh) 2020-03-17

Family

ID=61245659

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780051107.0A Active CN109643663B (zh) 2016-08-22 2017-08-17 金属烧结接合体和芯片接合方法

Country Status (10)

Country Link
US (1) US11024598B2 (zh)
EP (1) EP3489991A4 (zh)
JP (1) JP6376299B2 (zh)
KR (1) KR101971416B1 (zh)
CN (1) CN109643663B (zh)
AU (1) AU2017317329B2 (zh)
MY (1) MY181313A (zh)
PH (1) PH12019500356A1 (zh)
TW (1) TWI689016B (zh)
WO (1) WO2018037992A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11910520B2 (en) * 2018-02-02 2024-02-20 Kuprion Inc. Thermal management in circuit board assemblies
JP6712620B2 (ja) * 2018-07-26 2020-06-24 Ｊｘ金属株式会社 半導体デバイス
JP7123688B2 (ja) * 2018-08-06 2022-08-23 新光電気工業株式会社 半導体装置及びその製造方法
CN110071050B (zh) * 2019-04-24 2021-09-24 深圳第三代半导体研究院 一种芯片互连结构及其制备方法
JP6934492B2 (ja) * 2019-07-29 2021-09-15 日本碍子株式会社 燃料電池セル
JP6986053B2 (ja) * 2019-07-29 2021-12-22 日本碍子株式会社 燃料電池セル
JP7527298B2 (ja) 2019-08-31 2024-08-02 株式会社ダイセル 低温焼結性接合用ペースト及び接合構造体
JP2021097072A (ja) * 2019-12-13 2021-06-24 昭和電工マテリアルズ株式会社 半導体装置の製造方法
US11887921B2 (en) 2020-08-28 2024-01-30 Stmicroelectronics S.R.L. Method of producing semiconductor devices and corresponding semiconductor device
DE112022000346T5 (de) 2021-08-12 2023-09-07 Fuji Electric Co., Ltd. Halbleitervorrichtung und Verfahren zum Herstellen derselben

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS527281B2 (zh) 1973-02-19 1977-03-01
JPS527281A (en) 1975-07-07 1977-01-20 Seiko Instr & Electronics Ltd Digital electronic clock for divers
US6798074B2 (en) * 2002-03-04 2004-09-28 Motorola, Inc. Method of attaching a die to a substrate
JP2008031134A (ja) * 2006-07-07 2008-02-14 Hitachi Chem Co Ltd フェノール誘導体及びその製造方法
JP5012239B2 (ja) 2007-06-13 2012-08-29 株式会社デンソー 接合方法及び接合体
JP5584909B2 (ja) * 2008-11-28 2014-09-10 株式会社弘輝 接続構造体
DE102009000192A1 (de) 2009-01-14 2010-07-15 Robert Bosch Gmbh Sinterwerkstoff, Sinterverbindung sowie Verfahren zum Herstellen eines Sinterverbindung
JPWO2010110069A1 (ja) 2009-03-23 2012-09-27 日立化成工業株式会社 ダイボンディング用樹脂ペースト、それを用いた半導体装置の製造方法、及び半導体装置
WO2012004876A1 (ja) * 2010-07-08 2012-01-12 三菱電機株式会社 接合体およびそれを備えた半導体装置、ならびに、接合方法およびそれを用いた製造方法
JP2014029897A (ja) * 2012-07-31 2014-02-13 Hitachi Ltd 導電性接合体およびそれを用いた半導体装置
JP5664625B2 (ja) 2012-10-09 2015-02-04 三菱マテリアル株式会社 半導体装置、セラミックス回路基板及び半導体装置の製造方法
JP2014110282A (ja) 2012-11-30 2014-06-12 Toyota Motor Corp 金属微粒子含有ペーストを用いる接合方法
WO2014155619A1 (ja) * 2013-03-28 2014-10-02 株式会社安川電機 半導体装置、電力変換装置および半導体装置の製造方法
EP3135470A4 (en) 2014-04-22 2018-04-18 NTN Corporation Sintered mechanical component, device for forming powder compact, and method for forming powder compact
WO2015163478A1 (ja) 2014-04-24 2015-10-29 住友化学株式会社 ジアリール－アゾール化合物
JP2015216160A (ja) * 2014-05-08 2015-12-03 三菱電機株式会社 電力用半導体装置および電力用半導体装置の製造方法
US20170294397A1 (en) * 2016-04-08 2017-10-12 Hamilton Sundstrand Corporation Die and substrate assembly with graded density bonding layer

Also Published As

Publication number Publication date
MY181313A (en) 2020-12-21
US11024598B2 (en) 2021-06-01
AU2017317329A1 (en) 2019-03-14
AU2017317329B2 (en) 2019-05-02
US20190393188A1 (en) 2019-12-26
CN109643663A (zh) 2019-04-16
KR101971416B1 (ko) 2019-04-22
EP3489991A4 (en) 2020-10-21
WO2018037992A1 (ja) 2018-03-01
EP3489991A1 (en) 2019-05-29
KR20190022893A (ko) 2019-03-06
PH12019500356A1 (en) 2019-05-15
TWI689016B (zh) 2020-03-21
JP6376299B2 (ja) 2018-08-22
TW201812931A (zh) 2018-04-01
JPWO2018037992A1 (ja) 2018-08-23

Similar Documents

Publication Publication Date Title
CN109643663B (zh) 金属烧结接合体和芯片接合方法
KR102687424B1 (ko) 무가압 접합용 구리 페이스트, 접합체 및 반도체 장치
KR102379883B1 (ko) 접합용 구리 페이스트, 접합체의 제조 방법 및 반도체 장치의 제조 방법
EP3348338B1 (en) Copper paste for joining, method for producing joined body, and method for producing semiconductor device
JP5718536B2 (ja) 接続構造体、及び半導体装置
EP3348337B1 (en) Copper paste for joining, method for manufacturing joined body, and method for manufacturing semiconductor device
JP4345066B2 (ja) セラミックス回路基板及びこれを用いたパワー半導体モジュール
JP3714557B2 (ja) セラミックス基板用ろう材及びこれを用いたセラミックス回路基板、パワー半導体モジュール
JP2021063300A (ja) 接合体及び半導体装置
JP5636720B2 (ja) 半導体装置の製造方法および接合治具
JP2009170930A (ja) セラミックス回路基板及びこれを用いたパワー半導体モジュール
JP2018152176A (ja) 接合用銅ペースト及び半導体装置
JP4345054B2 (ja) セラミックス基板用ろう材及びこれを用いたセラミックス回路基板、パワー半導体モジュール
JP2018152403A (ja) ダイボンドシート及び半導体装置
JP4632116B2 (ja) セラミックス回路基板
JP6170045B2 (ja) 接合基板及びその製造方法ならびに接合基板を用いた半導体モジュール及びその製造方法
JP6606514B2 (ja) 金属粒子及び導電性材料の粒子を用いた導電性接合材料並びに導電性接合構造
Jarosz et al. Low temperature joining technique (LTJT) as an alternative to lead-free soldering for die-attach applications
JP2022062906A (ja) 実装基板
JP2021190621A (ja) 金属粒子フィルム、金属粒子フィルムの製造方法、及び、貫通電極を有する基体の製造方法
JP2016054252A (ja) ダイボンド用多孔質層付き半導体素子及びそれを用いた半導体装置の製造方法、半導体装置
JP2021097064A (ja) 金属ペースト、導電体、並びに、貫通電極を有する基体及びその製造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant