CN109514744A - The processing method of chip - Google Patents

The processing method of chip Download PDF

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Publication number
CN109514744A
CN109514744A CN201811066921.2A CN201811066921A CN109514744A CN 109514744 A CN109514744 A CN 109514744A CN 201811066921 A CN201811066921 A CN 201811066921A CN 109514744 A CN109514744 A CN 109514744A
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CN
China
Prior art keywords
chip
sealing material
device wafer
preset lines
alignment
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Granted
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CN201811066921.2A
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Chinese (zh)
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CN109514744B (en
Inventor
铃木克彦
伴祐人
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Disco Corp
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Disco Corp
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Publication of CN109514744B publication Critical patent/CN109514744B/en
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/03—Observing, e.g. monitoring, the workpiece
    • B23K26/032—Observing, e.g. monitoring, the workpiece using optical means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/08—Devices involving relative movement between laser beam and workpiece
    • B23K26/083—Devices involving movement of the workpiece in at least one axial direction
    • B23K26/0853—Devices involving movement of the workpiece in at least in two axial directions, e.g. in a plane
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/50—Working by transmitting the laser beam through or within the workpiece
    • B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
    • B28D5/0011—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing with preliminary treatment, e.g. weakening by scoring
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • B28D5/0064—Devices for the automatic drive or the program control of the machines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/16—Composite materials, e.g. fibre reinforced
    • B23K2103/166—Multilayered materials
    • B23K2103/172—Multilayered materials wherein at least one of the layers is non-metallic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/50—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B23K2103/56—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26 semiconducting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13082—Two-layer arrangements
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The processing method of chip is provided.The chip is the device wafer that device is respectively formed in the chip area divided on front by a plurality of segmentation preset lines intersected to form, its front is sealed by sealing material, this method has following process: alignment process, shoot to the face side of device wafer through sealing material by visible light shooting component and detects alignment mark and detect the segmentation preset lines that should be laser machined accordingly；Layer formation process is modified, the focal point of the laser beam of the wavelength for device wafer and sealing material with permeability is located in the inside of device wafer or sealing material and forms modification layer along the irradiation of segmentation preset lines；And segmentation process, it is each device chip divided starting point and be divided into front to be sealed by sealing material the chip to modify layer to device wafer and sealing material imparting external force, alignment process is implemented to the sideling irradiation light of region captured by visible light shooting component by oblique light component on one side on one side.

Description

The processing method of chip
Technical field
The present invention relates to the processing methods of WL-CSP chip.
Background technique
WL-CSP (Wafer-level Chip Size Package: crystal wafer chip dimension encapsulation) chip refers in crystalline substance It is formed in the state of piece and resin seal is carried out to face side after rerouting layer or electrode (metal column) and utilizes cutting tool etc. It is divided into the technology of each encapsulation, is the size of semiconductor device chip to the size that chip carries out encapsulation obtained by singualtion, because This is also widely used from the viewpoint of miniaturization and lightweight.
In the manufacturing process of WL-CSP chip, weight cloth is formed in the device surface side for being formed with the device wafer of multiple devices Line layer then forms the metal column connecting with the electrode in device across rewiring layer, utilizes resin by metal column and device later Part sealing.
Then, after carrying out thinning to sealing material and exposing metal column in sealing material front, in metal column End face formed be referred to as electrode bumps external terminal.Later, using cutting apparatus etc. WL-CSP chip is cut and It is divided into each CSP.
In order to protect semiconductor devices from impact or moisture etc., it is critically important for being sealed using sealing material.It is logical Often, as sealing material, using sealing material obtained by the filler that is made of SiC has been mixed into epoxy resin, to make close Coefficient of thermal expansion of the coefficient of thermal expansion of closure material close to semiconductor device chip, it is therefore prevented that the heating generated by the difference of coefficient of thermal expansion When encapsulation it is damaged.
WL-CSP chip is divided into each CSP usually using cutting apparatus.In this case, due to WL-CSP chip The device that be used to detect segmentation preset lines is covered by resin, so the target pattern of device can not be detected from face side.
For this purpose, the electrode bumps on the resin for being formed in WL-CSP chip are inferred into segmentation preset lines as target, or Person on the upper surface of resin target of print register etc. and be split the alignment of preset lines and cutting tool.
However, since electrode bumps or the target being printed on resin are accurately formed unlike device, so making To there is a problem of that precision is lower to mutatis mutandis target.Therefore, inferring that segmentation is pre- according to the target of electrode bumps or printing In the case where alignment, it is possible to be cut device portions with deviateing with segmentation preset lines.
Thus, for example being proposed brilliant with the device exposed in chip periphery in Japanese Unexamined Patent Publication 2013-74021 bulletin The method being aligned on the basis of the pattern of piece.
Patent document 1: Japanese Unexamined Patent Publication 2013-074021 bulletin
Patent document 2: Japanese Unexamined Patent Publication 2016-015438 bulletin
However, it is poor in the usual device precision in the periphery of chip, it is real on the basis of by the pattern exposed in the periphery of chip When applying alignment, it is possible to chip is split with the position that separates of segmentation preset lines, and because chip it is different there is also The pattern of device wafer is not the case where periphery is exposed.
Summary of the invention
The present invention is completed in view of such point, is coated on front wafer surface it is intended that providing and can penetrate Sealing material comprising carbon black implements the processing method of the chip of alignment process.
According to the present invention, the processing method of chip is provided, which is pre- by a plurality of segmentation intersected to form on front The device wafer of device is respectively formed in the chip area that alignment divides, the front of the device wafer is sealed by sealing material, Multiple convex blocks are respectively formed in the chip area of the sealing material, which is characterized in that the processing method of the chip has Following process: alignment process penetrates the sealing material to the device from the face side of the chip by visible light shooting component The face side of chip is shot and detects alignment mark, and the segmentation that should be laser machined is detected according to the alignment mark Preset lines；Layer formation process is modified, after implementing the alignment process, will be had for the device wafer and the sealing material The focal point of the laser beam of the wavelength of permeability is located in the device wafer or the inside of the sealing material, from the front of the chip Lateral edge the segmentation preset lines irradiate laser beam, form modification layer in the inside of the device wafer and the sealing material；And point Process is cut, after implementing the modification layer formation process, external force is assigned to the device wafer and the sealing material and is changed with this Matter layer is each device chip divided starting point and be divided into front to be sealed by the sealing material chip, passes through oblique light on one side Component implements the alignment process to the sideling irradiation light of region captured by the visible light shooting component on one side.
The processing method of chip according to the present invention utilizes oblique light component sideling irradiation light, on one side by visible on one side Photo-beat takes the photograph component and detects the alignment mark for being formed in device wafer through sealing material, can be implemented according to alignment mark pair Standard, therefore can simply implement alignment process, without as in the past by the sealing material of the positive outer peripheral portion of chip Removal.
Therefore, the focal point of the laser beam of the wavelength for device wafer and sealing material with permeability is located in device The inside of part chip or sealing material and from the face side of chip irradiate laser beam, in the inside shape of device wafer and sealing material It can be to divide starting point to divide the wafer into each device core that front is sealed by sealing material with the modification layer at modification layer Piece.
Detailed description of the invention
(A) of Fig. 1 is the exploded perspective view of WL-CSP chip, and (B) of Fig. 1 is the perspective view of WL-CSP chip.
Fig. 2 is the enlarged cross-sectional view of WL-CSP chip.
Fig. 3 is to show the solid that WL-CSP chip is pasted onto the situation that peripheral part is installed in the dicing tape of ring-shaped frame Figure.
Fig. 4 is the cross-sectional view for showing alignment process.
(A) of Fig. 5 is the cross-sectional view for showing modification layer formation process, and (B) of Fig. 5 is that focal point is located in device wafer Inside state WL-CSP chip enlarged partial sectional view, Fig. 5 (C) is the inside that focal point is located in sealing material State WL-CSP chip enlarged partial sectional view.
Fig. 6 is the perspective view of segmenting device.
(A) and (B) of Fig. 7 is the cross-sectional view for showing segmentation process.
Fig. 8 is the enlarged partial sectional view of the WL-CSP chip after implementing segmentation process.
Label declaration
11: device wafer；13: segmentation preset lines；15: device；16: laser head (condenser)；21: metal column；23: sealing Material；25: convex block；26: visible light shooting component (visible light shooting unit)；27:WL-CSP chip；28: oblique light component； 29,29a, 29b: modification layer；31: device chip；50: segmenting device.
Specific embodiment
Hereinafter, referring to attached drawing, detailed description of embodiments of the present invention.(A) referring to Fig.1, shows WL-CSP The exploded perspective view of chip 27.(B) of Fig. 1 is the perspective view of WL-CSP chip 27.
As shown in (A) of Fig. 1, on the positive 11a of device wafer 11, make a reservation in a plurality of segmentation by being formed as clathrate The devices such as LSI 15 are formed in each region that line (spacing track) 13 marks off.
The back side 11b of device wafer (hereinafter, sometimes referred to simply as chip) 11 is ground in advance and is thinned to defined Thickness (100 μm~200 μm or so), then, as shown in Fig. 2, form be electrically connected with the electrode 17 in device 15 it is multiple After metal column 21, by sealing material 23 in the way of embedded metal column 21 by the positive 11a side seal of chip 11.
As sealing material 23, composition includes epoxy resin or epoxy resin+phenolic resin 10.3%, two by quality % Cilicon oxide filler 8.53%, carbon black 0.1~0.2%, other compositions 4.2~4.3%.As other compositions, for example, including metal Hydroxide, antimony trioxide, silica etc..
When the sealing material 23 using this composition come the positive 11a of coating wafer 11 to by the positive 11a of chip 11 When sealing, the minimal amount of carbon black included in the sealing material 23 of sealing material 23 due to, is in black, therefore is generally difficult to penetrate Sealing material 23 sees the positive 11a of chip 11.
Here, carbon black is mixed into sealing material 23 primarily to the electrostatic breakdown of device 15 is prevented, at present in market Upper sale not yet is free of the sealing material of carbon black.
As other embodiments, can also be formd on the positive 11a to device wafer 11 after rerouting layer, Reroute the metal column 21 for being formed on layer and being electrically connected with the electrode 17 in device 15.
Then, using the flush cut device (surface with the Tool in Cutting tool being made of single-crystal diamond Plane: planisher) or referred to as abrasive machine grinding attachment to sealing material 23 carry out thinning.It is carried out to sealing material 23 After thinning, such as expose the end face of metal column 21 by plasma etching.
Then, the metal coupling of leypewter etc. is formed on the end face of the metal column 21 of exposing using well known method 25, to complete WL-CSP chip 27.In the WL-CSP chip 27 of present embodiment, sealing material 23 with a thickness of 100 μm Left and right.
When being processed using laser processing device to WL-CSP chip 27, as shown in figure 3, it is preferred that by WL-CSP chip 27, which are pasted onto peripheral part, is glued on the dicing tape T as adhesive tape of ring-shaped frame F.WL-CSP chip 27 becomes as a result, The state supported by dicing tape T by ring-shaped frame F.
It but, can also be using without using ring-type when being processed using laser processing device to WL-CSP chip 27 Frame F and on the back side of WL-CSP chip 27 paste adhesive tape mode.
In the processing method of chip of the invention, firstly, implementing following alignment process: just from WL-CSP chip 27 Surface side shoots the positive 11a of device wafer 11 in a manner of through sealing material 23 visible light shooting component, examines Survey is formed in the alignment marks such as positive at least two target pattern of device wafer 11, is answered according to these alignment marks to detect The segmentation preset lines 13 laser machined.
The alignment process is described in detail referring to Fig. 4.Before implementing alignment process, by the back side 11b of chip 11 Side is pasted onto peripheral part and is installed on the dicing tape T of ring-shaped frame F.
In alignment process, as shown in figure 4, across dicing tape T using the chuck table 10 of laser processing device to WL- CSP chip 27 carries out attracting holding, exposes the sealing material 23 for sealing the positive 11a of device wafer 11 upwards.Then, Ring-shaped frame F is clamped using fixture 12 and is fixed.
In alignment process, using capturing elements such as the CCD of visible light shooting unit 26 to the front of WL-CSP chip 27 It is shot.However, comprising the ingredients such as silica filler, carbon black in sealing material 23, and sealing material 23 just There are bumps on face, therefore even if by the vertical irradiation of visible light shooting unit 26 through sealing material 23 to device wafer 11 positive 11a is shot, and shooting image can also thicken, and is difficult to detect the alignment marks such as target pattern.
Therefore, in the alignment process of present embodiment, other than the vertical irradiation of visible light shooting unit 26, also from Oblique light component 28, to alleviate the fuzzy of shooting image, is capable of detecting when alignment mark to shooting area sideling irradiation light.
The light irradiated from oblique light component 28 is preferably white light, and the positive incidence angle relative to WL-CSP chip 27 is excellent It selects in the range of 30 °~60 °.It is preferred that visible light shooting unit 26 have can be to the exposure device that time for exposure etc. is adjusted (exposure)。
Then, make chuck table 10 carry out θ rotation so as to make to connect straight line obtained by these alignment marks and process into It is parallel to direction, then make chuck table 10 shown in (A) of Fig. 5 according to alignment mark and segmentation preset lines 13 center it Between distance with moved on the vertical direction processing direction of feed X1, to detect that the segmentation that should be laser machined is predetermined Line 13.
After implementing alignment process, implement modification layer formation process, as shown in (A) of Fig. 5, laser processing device Laser head (condenser) 16 will be for device wafer 11 and sealing along segmentation preset lines 13 from the face side of WL-CSP chip 27 Material 23 have permeability wavelength (such as 1064nm) laser beam LB focal point be located in device wafer 11 inside or Then the inside of sealing material 23 carries out processing feeding on the direction arrow X1 or the direction arrow X2 to chuck table 10, from And modification layer 29 (29a, 29b) is formed in the inside of device wafer and the inside of sealing material 23.
In modification layer formation process, firstly, the focal point of laser beam LB is located in device crystalline substance as shown in (B) of Fig. 5 The inside of piece 11 and processing feeding is carried out to chuck table 10 on the direction arrow X1, thus in the inside shape of device wafer 11 At focal point 29a.
Then, as shown in (C) of Fig. 5, the focal point of laser beam LB is located in the inside of sealing material 23 and in arrow Processing feeding is carried out to chuck table 10 on the direction X2, to form modification layer 29b in the inside of sealing material 23.
It toward road and is returning when along the segmentation preset lines 13 upwardly extended in the 1st side and successively implements the modification floor shape on road After process, it is rotated by 90 ° chuck table 10, it is predetermined along the segmentation upwardly extended in 2nd side vertical with the 1st direction It the road Xian13Wang and returns and successively implements the modification floor formation process on road.
After implementing modification layer formation process, implement segmentation process, using segmenting device shown in fig. 6 50 to WL- CSP chip 27 assigns external force, and WL-CSP chip 27 is divided into each device chip 31.
Segmenting device 50 shown in Fig. 7 includes frame retention member 52, keeps to ring-shaped frame F；And with expansion Component 54 is opened up, dicing tape T is extended, dicing tape T is installed on ring-shaped frame F, and ring-shaped frame F is maintained at frame guarantor It holds on component 52.
Frame retention member 52 by cricoid frame retention feature 56 and the periphery for being disposed in frame retention feature 56 work It is constituted for multiple fixtures 58 of fixing component.The upper surface of frame retention feature 56 forms the mounting surface of mounting ring-shaped frame F 56a loads ring-shaped frame F on mounting surface 56a.
Then, the ring-shaped frame F being positioned on mounting surface 56a is fixed on frame retention member 56 by fixture 58.In this way The frame retention member 52 of composition can be moved in the up-down direction by band extension component 54 bearing.
There is the extension drum 60 for the inside for being disposed in cricoid frame retention feature 56 with extension component 54.Extend drum 60 It is closed by lid 62 upper end.The extension drum 60 has in smaller than the internal diameter of ring-shaped frame F and bigger than the outer diameter of WL-CSP chip 27 Diameter, wherein the WL-CSP chip 27 is pasted on dicing tape T, and dicing tape T is installed on ring-shaped frame F.
Extension drum 60 has the support lug 64 being formed as one in its lower end.Band extension component 54 also has drive member 66, which move cricoid frame retention feature 56 in the up-down direction.The drive member 66 is by being disposed in branch The multiple cylinders 68 held on flange 64 are constituted, and the lower surface of piston rod 70 and frame retention feature 56 links.
Make cricoid frame retention feature 56 in base position and extension bits by the drive member 66 that multiple cylinders 68 are constituted Moved along the vertical direction between setting, wherein the base position be cricoid frame retention feature 56 mounting surface 56a with as expansion The front for opening up the lid 62 of the upper end of drum 60 is the position of roughly same height, which is than extending the upper end of drum 60 on the lower The position of the defined amount of side.
Referring to Fig. 7 WL-CSP chip 27 implemented to the segmenting device constituted with upper type 50 is used segmentation process into Row explanation.As shown in (A) of Fig. 7, the ring-shaped frame F that WL-CSP chip 27 is carry by dicing tape T is positioned in frame and is protected It holds on the mounting surface 56a of component 56, and is fixed on frame retention feature 56 by fixture 58.At this point, frame retention feature 56 Being positioned in its mounting surface 56a and extending the upper end of drum 60 is the base position of roughly same height.
Then, cylinder 68 is driven and frame retention feature 56 is made to drop to expanding location shown in (B) of Fig. 7. As a result, decline the ring-shaped frame F being fixed on the mounting surface 56a of frame retention feature 56, therefore is installed on ring-shaped frame F's Dicing tape T is abutted with the upper edge of extension drum 60 and is mainly extended in the radial direction.
As a result, to the radial effect drawing force of WL-CSP chip 27 for being pasted on dicing tape T.When in this way When to 27 radial effect drawing force of WL-CSP chip, WL-CSP chip 27 is formed in device crystalline substance along segmentation preset lines 13 Modification layer 29a in piece 11 and the modification layer 29b being formed in sealing material 23 are for segmentation starting point and along segmentation preset lines 13 It is cut off as shown in the enlarged cross-sectional view of Fig. 8, is divided into each device chip that front is sealed by sealing material 23 31。

Claims (1)

1. a kind of processing method of chip, which is the chip divided on front by a plurality of segmentation preset lines intersected to form The device wafer of device is respectively formed in region, the front of the device wafer is sealed by sealing material, in the sealing material Multiple convex blocks are respectively formed in the chip area, which is characterized in that
The processing method of the chip has following process:
Alignment process, from the face side of the chip by visible light shooting component through the sealing material to the device wafer just Surface side is shot and detects alignment mark, and the segmentation preset lines that should be laser machined are detected according to the alignment mark；
Layer formation process is modified, after implementing the alignment process, will be had for the device wafer and the sealing material saturating The focal point of the laser beam of the wavelength for the property crossed is located in the device wafer or the inside of the sealing material, from the face side of the chip Laser beam is irradiated along the segmentation preset lines, forms modification layer in the inside of the device wafer and the sealing material；And
Segmentation process, after implementing the modification layer formation process, to the device wafer and sealing material imparting external force It is each device chip divided starting point and be divided into front to be sealed by the sealing material chip with the modification layer,
The alignment is implemented to the sideling irradiation light of region captured by the visible light shooting component by oblique light component on one side on one side Process.
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