CN109514744B - Method for processing wafer - Google Patents

Method for processing wafer Download PDF

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Publication number
CN109514744B
CN109514744B CN201811066921.2A CN201811066921A CN109514744B CN 109514744 B CN109514744 B CN 109514744B CN 201811066921 A CN201811066921 A CN 201811066921A CN 109514744 B CN109514744 B CN 109514744B
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wafer
sealing material
front surface
device wafer
modified layer
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CN109514744A (en
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铃木克彦
伴祐人
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Disco Corp
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Disco Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/03—Observing, e.g. monitoring, the workpiece
    • B23K26/032—Observing, e.g. monitoring, the workpiece using optical means
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/08—Devices involving relative movement between laser beam and workpiece
    • B23K26/083—Devices involving movement of the workpiece in at least one axial direction
    • B23K26/0853—Devices involving movement of the workpiece in at least in two axial directions, e.g. in a plane
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/50—Working by transmitting the laser beam through or within the workpiece
    • B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
    • B28D5/0011—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing with preliminary treatment, e.g. weakening by scoring
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • B28D5/0064—Devices for the automatic drive or the program control of the machines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/16—Composite materials, e.g. fibre reinforced
    • B23K2103/166—Multilayered materials
    • B23K2103/172—Multilayered materials wherein at least one of the layers is non-metallic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/50—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B23K2103/56—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26 semiconducting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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    • H01—ELECTRIC ELEMENTS
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    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
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Abstract

A method for processing a wafer is provided. The wafer is a device wafer having devices formed on the front surface thereof in chip regions defined by a plurality of planned dividing lines formed to intersect each other, and the front surface thereof is sealed with a sealing material, the method including the steps of: an alignment step of detecting an alignment mark by photographing the front surface side of the device wafer with visible light through the sealing material by the visible light photographing member and detecting a line to be divided on which laser processing is to be performed based on the alignment mark; a modified layer forming step of forming a modified layer by positioning a converging point of a laser beam having a wavelength that is transparent to the device wafer and the sealing material inside the device wafer or the sealing material and irradiating the laser beam along the planned dividing lines; and a dividing step of applying an external force to the device wafer and the sealing material to divide the wafer into device chips each having a front surface sealed with the sealing material with the modified layer as a dividing starting point, and performing the aligning step while obliquely irradiating light to a region imaged by the visible light imaging means by the oblique light means.

Description

Method for processing wafer
Technical Field
The invention relates to a processing method of WL-CSP wafers.
Background
WL-CSP (Wafer-level Chip Size Package) chips are a technology in which a redistribution layer or electrodes (metal posts) are formed in a Chip state, and then the front surface side is sealed with resin and divided into individual packages by a cutting tool or the like, and the Size of the Package obtained by singulating the Chip is the Size of a semiconductor device Chip, and therefore, the WL-CSP (Wafer-level Chip Size Package) is also widely used from the viewpoint of downsizing and weight saving.
In a process for manufacturing a WL-CSP wafer, a rewiring layer is formed on the device surface side of a device wafer on which a plurality of devices are formed, metal posts connected to electrodes in the devices are formed through the rewiring layer, and then the metal posts and the devices are sealed with a resin.
Next, after the sealing material is thinned and the metal posts are exposed on the front surface of the sealing material, external terminals called electrode bumps are formed on the end surfaces of the metal posts. Thereafter, the WL-CSP wafer is cut by a cutting apparatus or the like to be divided into individual CSPs.
In order to protect the semiconductor device from impact, moisture, or the like, it is important to perform sealing with a sealing material. Generally, a sealing material obtained by mixing a filler made of SiC into an epoxy resin is used as the sealing material, so that the thermal expansion coefficient of the sealing material is made close to the thermal expansion coefficient of the semiconductor device chip, and package breakage during heating due to a difference in the thermal expansion coefficient is prevented.
The WL-CSP wafer is generally divided into individual CSPs using a dicing apparatus. In this case, since the devices of the WL-CSP wafer for detecting the lines to be divided are covered with the resin, the target patterns of the devices cannot be detected from the front side.
Therefore, the alignment between the lines to be divided and the cutting tool is performed by estimating the lines to be divided with the electrode bumps formed on the resin of the WL-CSP wafer as targets, or by printing an alignment target on the upper surface of the resin.
However, since the electrode bump or the target printed on the resin is not formed with such high accuracy as a device, there is a problem that the accuracy is low as the target for alignment. Therefore, when the lines to be divided are estimated from the electrode bumps or the target of printing, there is a possibility that the device portions may be cut off at a distance from the lines to be divided.
Therefore, for example, japanese patent application laid-open No. 2013-74021 proposes a method of performing alignment with reference to a pattern of a device wafer exposed on the outer periphery of the wafer.
Patent document 1: japanese patent laid-open publication No. 2013-074021
Patent document 2: japanese patent laid-open publication No. 2016-015438
However, the device accuracy is generally low in the outer periphery of the wafer, and when alignment is performed with reference to the pattern exposed on the outer periphery of the wafer, the wafer may be divided at a position separated from the planned dividing line, and the pattern of the device wafer may not be exposed on the outer periphery depending on the wafer.
Disclosure of Invention
The present invention has been made in view of the above circumstances, and an object thereof is to provide a method for processing a wafer, which can perform an alignment step through a sealing material containing carbon black covering the front surface of the wafer.
According to the present invention, there is provided a method of processing a wafer, the wafer being a device wafer having devices formed on a front surface thereof in respective chip regions defined by a plurality of planned dividing lines formed to intersect each other, the front surface of the device wafer being sealed with a sealing material, the sealing material having a plurality of bumps formed in the respective chip regions, the method comprising the steps of: an alignment step of detecting an alignment mark by imaging the front surface side of the device wafer through the sealing material from the front surface side of the wafer by a visible light imaging member, and detecting the planned dividing line to be laser-processed from the alignment mark; a modified layer forming step of positioning a converging point of a laser beam having a wavelength that is transparent to the device wafer and the sealing material inside the device wafer or the sealing material after the alignment step is performed, and irradiating the laser beam from the front surface side of the wafer along the planned dividing lines to form a modified layer inside the device wafer and the sealing material; and a dividing step of, after the modified layer forming step is performed, applying an external force to the device wafer and the sealing material to divide the wafer into device chips each having a front surface sealed with the sealing material with the modified layer as a division starting point, and performing the aligning step while irradiating a region imaged by the visible-light imaging member with light obliquely by an oblique light member.
According to the wafer processing method of the present invention, since the alignment mark formed on the device wafer can be detected by the visible-light imaging element through the sealing material while irradiating light obliquely by the oblique light element, and alignment can be performed based on the alignment mark, the alignment process can be performed easily without removing the sealing material at the outer peripheral portion of the front surface of the wafer as in the conventional method.
Therefore, the laser beam is irradiated from the front side of the wafer by positioning the converging point of the laser beam having a wavelength that is transparent to the device wafer and the sealing material inside the device wafer or the sealing material, and the modified layer is formed inside the device wafer and the sealing material, so that the wafer can be divided into the device chips each having the front side sealed with the sealing material with the modified layer as a division starting point.
Drawings
FIG. 1A is an exploded perspective view of a WL-CSP wafer, and FIG. 1B is a perspective view of the WL-CSP wafer.
FIG. 2 is an enlarged cross-sectional view of a WL-CSP wafer.
Fig. 3 is a perspective view showing a state where a WL-CSP wafer is bonded to a dicing tape whose outer peripheral portion is mounted on an annular frame.
Fig. 4 is a sectional view showing an alignment process.
Fig. 5 (a) is a cross-sectional view showing a modified layer forming step, fig. 5 (B) is a partial enlarged cross-sectional view of the WL-CSP wafer in a state where the light-collecting points are positioned inside the device wafer, and fig. 5(C) is a partial enlarged cross-sectional view of the WL-CSP wafer in a state where the light-collecting points are positioned inside the sealing material.
Fig. 6 is a perspective view of the partitioning device.
Fig. 7 (a) and (B) are cross-sectional views showing the dividing step.
FIG. 8 is a partial enlarged cross-sectional view of a WL-CSP wafer after the dicing process.
Description of the reference symbols
11: a device wafer; 13: dividing the predetermined line; 15: a device; 16: a laser head (condenser); 21: a metal post; 23: a sealing material; 25: a bump; 26: a visible light photographing member (visible light photographing unit); 27: WL-CSP chip; 28: a tilted light member; 29. 29a, 29 b: a modified layer; 31: a device chip; 50: and a dividing device.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to fig. 1 (a), an exploded perspective view of a WL-CSP wafer 27 is shown. FIG. 1 (B) is a perspective view of the WL-CSP wafer 27.
As shown in fig. 1a, on the front surface 11a of the device wafer 11, devices 15 such as LSIs are formed in each region partitioned by a plurality of planned dividing lines (streets) 13 formed in a lattice shape.
The back surface 11b of the device wafer (hereinafter, sometimes simply referred to as a wafer) 11 is ground in advance to be thinned to a predetermined thickness (about 100 μm to 200 μm), and then, as shown in fig. 2, a plurality of metal posts 21 electrically connected to the electrodes 17 in the device 15 are formed, and then the front surface 11a side of the wafer 11 is sealed with a sealing material 23 so that the metal posts 21 are embedded.
The sealing material 23 comprises, in mass%, 10.3% of an epoxy resin or an epoxy resin plus a phenol resin, 8.53% of a silica filler, 0.1 to 0.2% of carbon black, and 4.2 to 4.3% of other components. Examples of the other components include metal hydroxide, antimony trioxide, and silica.
When the front surface 11a of the wafer 11 is sealed by covering the front surface 11a of the wafer 11 with the sealing material 23 of such a composition, the sealing material 23 is black due to a very small amount of carbon black contained in the sealing material 23, and thus it is generally difficult to see the front surface 11a of the wafer 11 through the sealing material 23.
Here, the reason why carbon black is mixed into the sealing material 23 is mainly to prevent electrostatic breakdown of the device 15, and no sealing material containing no carbon black is currently marketed.
In another embodiment, after a redistribution layer is formed on the front surface 11a of the device wafer 11, the metal posts 21 electrically connected to the electrodes 17 in the devices 15 may be formed on the redistribution layer.
Next, the seal material 23 is thinned using a surface plane (flattener) having a cutter cutting tool made of single crystal diamond or a grinding machine called a grinder. After the sealing material 23 is thinned, the end face of the metal pillar 21 is exposed by, for example, plasma etching.
Next, metal bumps 25 of tin-lead alloy or the like are formed on the end faces of the exposed metal posts 21 by a known method, thereby completing the WL-CSP wafer 27. In the WL-CSP wafer 27 of the present embodiment, the thickness of the sealing material 23 is about 100 μm.
When the WL-CSP wafer 27 is processed by the laser processing apparatus, as shown in fig. 3, the WL-CSP wafer 27 is preferably bonded to a dicing tape T as a pressure-sensitive adhesive tape whose outer peripheral portion is bonded to the ring-shaped frame F. Thus, the WL-CSP wafer 27 is supported by the ring frame F via the dicing tape T.
However, when the WL-CSP wafer 27 is processed by the laser processing apparatus, a method of attaching an adhesive tape to the back surface of the WL-CSP wafer 27 without using the ring frame F may be employed.
In the wafer processing method of the present invention, first, the following alignment process is performed: the front surface 11a of the device wafer 11 is imaged by a visible light imaging member from the front surface side of the WL-CSP wafer 27 so as to pass through the sealing material 23, at least two alignment marks such as a target pattern formed on the front surface of the device wafer 11 are detected, and the lines to be divided 13 to be laser-processed are detected from these alignment marks.
This alignment process will be described in detail with reference to fig. 4. Before the alignment step is performed, the back surface 11b side of the wafer 11 is bonded to the dicing tape T having the outer peripheral portion mounted on the ring frame F.
In the alignment step, as shown in fig. 4, the WL-CSP wafer 27 is sucked and held by the chuck table 10 of the laser processing apparatus via the dicing tape T, and the sealing material 23 sealing the front surface 11a of the device wafer 11 is exposed upward. Then, the ring frame F is clamped and fixed by the clamp 12.
In the alignment step, the front surface of the WL-CSP wafer 27 is photographed by an image pickup device such as a CCD of the visible light photographing unit 26. However, since the sealing material 23 contains components such as silica filler and carbon black and the front surface of the sealing material 23 has irregularities, even when the front surface 11a of the device wafer 11 is photographed through the sealing material 23 by vertical irradiation of the visible light photographing unit 26, the photographed image becomes blurred and it is difficult to detect an alignment mark such as a target pattern.
Therefore, in the alignment step of the present embodiment, light is irradiated obliquely from the oblique light member 28 to the imaging region in addition to the vertical irradiation of the visible light imaging unit 26, thereby reducing blur of the captured image and enabling detection of the alignment mark.
The light irradiated from the inclined light member 28 is preferably white light, and the incident angle with respect to the front surface of the WL-CSP wafer 27 is preferably in the range of 30 ° to 60 °. The visible light photographing unit 26 preferably has an exposure device (exposure) capable of adjusting an exposure time and the like.
Next, the chuck table 10 is rotated by θ so that a straight line connecting the alignment marks becomes parallel to the machining feed direction, and then the chuck table 10 shown in fig. 5 (a) is moved in a direction perpendicular to the machining feed direction X1 in accordance with the distance between the alignment mark and the center of the line to divide 13, thereby detecting the line to divide 13 to be laser-machined.
After the alignment step is performed, a modified layer forming step is performed, in which, as shown in fig. 5 a, a laser head (condenser) 16 of the laser processing apparatus positions a condensing point of a laser beam LB having a wavelength (for example, 1064nm) that is transparent to the device wafer 11 and the sealing material 23 inside the device wafer 11 or inside the sealing material 23 along the planned dividing lines 13 from the front surface side of the WL-CSP wafer 27, and then performs processing feed in the direction of arrow X1 or the direction of arrow X2 with respect to the chuck table 10, thereby forming modified layers 29(29a, 29b) inside the device wafer and inside the sealing material 23.
In the modified layer forming step, first, as shown in fig. 5 (B), the converging point of the laser beam LB is positioned inside the device wafer 11, and the chuck table 10 is fed in the direction of arrow X1, thereby forming a converging point 29a inside the device wafer 11.
Next, as shown in fig. 5(C), the converging point of the laser beam LB is positioned inside the sealing material 23 and the chuck table 10 is fed in the direction of the arrow X2, thereby forming the modified layer 29b inside the sealing material 23.
After the modified layer forming step is sequentially performed on the forward path and the backward path along the line to divide 13 extending in the 1 st direction, the chuck table 10 is rotated by 90 °, and the modified layer forming step is sequentially performed on the forward path and the backward path along the line to divide 13 extending in the 2 nd direction perpendicular to the 1 st direction.
After the modified layer forming step, a dividing step is performed to apply an external force to the WL-CSP wafer 27 by using a dividing apparatus 50 shown in fig. 6, thereby dividing the WL-CSP wafer 27 into the respective device chips 31.
The dividing apparatus 50 shown in fig. 7 includes: a frame holding member 52 that holds the ring frame F; and a tape expanding member 54 that expands the dicing tape T mounted on the ring-shaped frame F held on the frame holding member 52.
The frame holding member 52 is composed of an annular frame holding member 56 and a plurality of clamps 58 as fixing members disposed on the outer periphery of the frame holding member 56. The upper surface of the frame holding member 56 forms a mounting surface 56a on which the ring frame F is mounted, and the ring frame F is mounted on the mounting surface 56 a.
Then, the ring frame F placed on the placement surface 56a is fixed to the frame holding member 56 by the jig 58. The frame holding member 52 configured in this way is supported by the belt expanding member 54 so as to be movable in the vertical direction.
The tape expanding member 54 has an expanding drum 60 disposed inside the annular frame holding member 56. The upper end of the expansion drum 60 is closed by a cover 62. The expanding drum 60 has an inner diameter smaller than the inner diameter of the ring frame F and larger than the outer diameter of the WL-CSP wafer 27, wherein the WL-CSP wafer 27 is attached to the dicing tape T attached to the ring frame F.
The expansion drum 60 has an integrally formed support flange 64 at its lower end. The belt expanding member 54 further has a driving member 66, and the driving member 66 moves the annular frame holding member 56 in the up-down direction. The driving means 66 is constituted by a plurality of air cylinders 68 disposed on the support flange 64, and a piston rod 70 thereof is coupled to the lower surface of the frame holding member 56.
The driving means 66, which is composed of a plurality of air cylinders 68, vertically moves the annular frame holding member 56 between a reference position, in which the placement surface 56a of the annular frame holding member 56 and the front surface of the cover 62, which is the upper end of the expanding drum 60, are at substantially the same height, and an expanded position, which is a position lower than the upper end of the expanding drum 60 by a predetermined amount.
The dividing process of the WL-CSP wafer 27 performed by using the dividing apparatus 50 configured as described above will be described with reference to fig. 7. As shown in fig. 7 (a), the ring-shaped frame F supporting the WL-CSP wafer 27 via the dicing tape T is placed on the placement surface 56a of the frame holding member 56, and is fixed to the frame holding member 56 by the jig 58. At this time, the frame holding member 56 is positioned at a reference position where the placement surface 56a thereof is substantially at the same height as the upper end of the expansion drum 60.
Next, the air cylinder 68 is driven to lower the frame holding member 56 to the expanded position shown in fig. 7 (B). Thus, the ring frame F fixed to the mounting surface 56a of the frame holding member 56 is lowered, and the dicing tape T attached to the ring frame F abuts against the upper end edge of the expanding drum 60 and expands mainly in the radial direction.
As a result, a tensile force is radially applied to the WL-CSP wafer 27 bonded to the dicing tape T. When a tensile force acts radially on the WL-CSP wafer 27 in this way, the WL-CSP wafer 27 is cut along the lines to divide 13 with the modified layers 29a and 29b formed on the device wafer 11 and the seal material 23 as starting points along the lines to divide 13, as shown in the enlarged cross-sectional view of fig. 8, and is divided into the device chips 31 each of which has its front surface sealed with the seal material 23.

Claims (1)

1. A method of processing a wafer, the wafer being a device wafer having devices formed on a front surface thereof in respective chip regions defined by a plurality of division lines formed to intersect with each other, the front surface of the device wafer being sealed with a sealing material, the sealing material having a plurality of bumps formed in the chip regions, respectively,
the wafer processing method comprises the following steps:
an alignment step of detecting an alignment mark by imaging the front surface side of the device wafer through the sealing material from the front surface side of the wafer by a visible light imaging member, and detecting the planned dividing line to be laser-processed from the alignment mark;
a modified layer forming step of positioning a converging point of a laser beam having a wavelength that is transparent to the device wafer and the sealing material inside the device wafer or the sealing material after the alignment step is performed, and irradiating the laser beam from the front surface side of the wafer along the planned dividing lines to form a modified layer inside the device wafer and the sealing material; and
a dividing step of applying an external force to the device wafer and the sealing material after the modified layer forming step is performed to divide the wafer into device chips each having a front surface sealed with the sealing material with the modified layer as a dividing starting point,
the alignment step is performed while the front surface of the device wafer is imaged through the sealing material by the visible light imaging means by irradiating the device wafer from the front surface side thereof perpendicularly without removing the sealing material, and the region of the front surface of the device wafer imaged by the visible light imaging means is irradiated obliquely from the front surface side thereof with light by the oblique light means, so as to reduce blurring of the image captured by the visible light imaging means.
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