CN109473349B - Wafer processing method - Google Patents

Wafer processing method Download PDF

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Publication number
CN109473349B
CN109473349B CN201811035733.3A CN201811035733A CN109473349B CN 109473349 B CN109473349 B CN 109473349B CN 201811035733 A CN201811035733 A CN 201811035733A CN 109473349 B CN109473349 B CN 109473349B
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China
Prior art keywords
wafer
sealing material
cutting groove
front surface
alignment
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CN201811035733.3A
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CN109473349A (en
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铃木克彦
伴祐人
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Disco Corp
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Disco Corp
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
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    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/08—Devices involving relative movement between laser beam and workpiece
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    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
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    • B23K26/364—Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
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  • Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
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  • Electromagnetism (AREA)
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  • Inorganic Chemistry (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

A method for processing a wafer is provided. The method comprises the following steps: a cutting groove forming step of forming a cutting groove having a depth corresponding to the finished thickness of the device chip along the line to be divided from the front surface side of the wafer; a sealing step of sealing the front surface of the wafer with a sealing material; a grinding step of grinding the wafer from the back side of the wafer to a finished thickness to expose the sealing material in the cutting groove; an alignment step of detecting an alignment mark by imaging the front side of the wafer from the front side of the wafer through the sealing material by an infrared imaging means, and detecting a division scheduled line to be subjected to laser processing based on the alignment mark; a modified layer forming step of forming a modified layer by irradiating a laser beam with a laser beam having a wavelength that is transparent to the sealing material while locating a converging point of the laser beam inside the sealing material in the cutting groove; and a dividing step of applying an external force to the sealing material in the cutting groove to divide the wafer into device chips each having a front surface and 4 side surfaces surrounded by the sealing material with the modified layer as a dividing start point.

Description

Wafer processing method
Technical Field
The present application relates to a method of processing a wafer to form a 5S molded package.
Background
As a structure for realizing miniaturization and high-density mounting of various devices such as LSI and NAND-type flash memory, for example, a Chip Scale Package (CSP) in which a device chip is packaged in accordance with a chip size has been used in practical use, and is widely used in mobile phones, smart phones, and the like. In addition, in recent years, among the CSPs, a CSP in which not only the front surface of the chip but also the entire side surface is sealed with a sealing material, that is, a so-called 5S molded package has been developed and put into practical use.
The conventional 5S molded package is manufactured by the following steps.
(1) External connection terminals called devices (circuits) and bumps are formed on the front surface of a semiconductor wafer (hereinafter, sometimes referred to as a wafer in general).
(2) The wafer is cut along a line to be divided from the front side of the wafer to form a cut groove having a depth corresponding to the finished thickness of the device chip.
(3) The front side of the wafer was sealed with a sealing material containing carbon black.
(4) The backside of the wafer is ground to the finished thickness of the device chip to expose the sealing material in the kerf.
(5) Since the front surface of the wafer is sealed with a sealing material containing carbon black, the sealing material in the outer peripheral portion of the front surface of the wafer is removed to expose an alignment mark such as a target pattern, and alignment of the dividing lines to be cut is detected based on the alignment mark.
(6) According to the alignment, the wafer is cut along a dividing predetermined line from the front side of the wafer, thereby dividing into 5S molded packages whose front and entire sides are sealed with a sealing material.
As described above, since the front surface of the wafer is sealed with the sealing material containing carbon black, devices and the like formed on the front surface of the wafer are completely invisible to the naked eye. In order to solve this problem and to enable alignment, the present inventors developed the following technique as described in (5) above: an outer peripheral portion of the sealing material on the front surface of the wafer is removed to expose an alignment mark such as a target pattern, and a line to be cut is detected from the alignment mark to perform alignment (see japanese patent application laid-open nos. 2013-074021 and 2016-015438).
Patent document 1: japanese patent laid-open No. 2013-074021
Patent document 2: japanese patent laid-open publication 2016-015438
However, in the alignment method described in the above-mentioned publication, a step of removing the sealing material in the outer peripheral portion of the wafer by attaching a cutting tool having a wide width for edge trimming to the spindle instead of the cutting tool for cutting is required, and the replacement of the cutting tool and the removal of the sealing material in the outer peripheral portion by edge trimming take time and labor, which results in a problem of poor productivity.
Disclosure of Invention
The present application has been made in view of the above-described points, and an object of the present application is to provide a wafer processing method capable of performing an alignment process through a sealing material containing carbon black coated on a front surface of a wafer.
According to the present application, there is provided a method for processing a wafer having devices each having a plurality of bumps formed in each region of a front surface divided by a plurality of dividing lines formed by intersecting, the method comprising: a cutting groove forming step of forming a cutting groove having a depth corresponding to a finished thickness of the device chip by a cutting tool along the dividing line from the front surface side of the wafer; a sealing step of sealing the front surface of the wafer including the cutting groove with a sealing material after the cutting groove forming step is performed; a grinding step of grinding the wafer from the back surface side of the wafer to a finished thickness of the device chip to expose the sealing material in the cutting groove after the sealing step is performed; an alignment step of detecting an alignment mark by imaging the front side of the wafer from the front side of the wafer through the sealing material by an infrared imaging means after the grinding step, and detecting the dividing line to be subjected to laser processing based on the alignment mark; a modified layer forming step of positioning a converging point of a laser beam having a wavelength that is transparent to the sealing material in the interior of the sealing material in the cutting groove after the alignment step is performed, and irradiating the laser beam along the predetermined dividing line from the front surface side of the wafer to form a modified layer in the interior of the sealing material; and a dividing step of dividing the wafer into a front surface and device chips each having 4 sides surrounded by the sealing material with the modified layer as a dividing start point by applying an external force to the sealing material in the cutting groove after the modified layer forming step is performed, wherein the front surface of the wafer is sealed by the sealing material having a permeability allowing infrared rays received by the infrared imaging member to pass therethrough.
The infrared imaging means preferably used in the alignment process includes InGaAs imaging elements.
According to the wafer processing method of the present application, the front surface of the wafer is sealed with the sealing material transmitting the infrared rays received by the infrared imaging means, and the alignment mark formed on the wafer is detected by the infrared imaging means transmitting the sealing material, and the alignment is performed based on the alignment mark, so that the alignment step can be easily performed without removing the sealing material at the outer peripheral portion of the front surface of the wafer as in the conventional technique.
Therefore, the laser beam is irradiated from the front side of the wafer by positioning the converging point of the laser beam having a wavelength that is transparent to the sealing material inside the dicing groove, and a modified layer is formed inside the sealing material in the dicing groove, whereby the wafer can be divided into device chips each having the front side and 4 side surfaces surrounded by the sealing material with the modified layer as the dividing start point.
Drawings
Fig. 1 is a perspective view of a semiconductor wafer.
Fig. 2 is a perspective view showing a cutting groove forming process.
Fig. 3 is a perspective view showing a sealing process.
Fig. 4 is a partially cut-away side view showing a grinding process.
Fig. 5 is a cross-sectional view showing an alignment process.
Fig. 6 (a) is a cross-sectional view showing a modified layer forming process, and fig. 6 (B) is an enlarged cross-sectional view showing a modified layer forming process.
Fig. 7 is a perspective view of the dividing apparatus.
Fig. 8 (a) and (B) are cross-sectional views showing the dividing process.
Fig. 9 is an enlarged partial cross-sectional view showing the wafer after the dicing process is performed.
Description of the reference numerals
10: a cutting unit; 11: a semiconductor wafer; 13: dividing a predetermined line; 14: a cutting tool; 15: a device; 16: an alignment unit; 17: electrode bumps; 18. 18A: a photographing unit; 20: a sealing material; 23: cutting a groove; 25: a modified layer; 26: a grinding unit; 27: a device chip; 34: grinding the grinding wheel; 38: grinding tool; 46: laser head (condenser); 50: a dividing device.
Detailed Description
Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings. Referring to fig. 1, there is shown a front side perspective view of a semiconductor wafer (hereinafter, sometimes simply referred to as a wafer) 11 suitable for processing by the processing method of the present application.
A plurality of lines (streets) 13 for dividing are formed in a lattice shape on the front surface 11a of the semiconductor wafer 11. Devices 15 such as ICs and LSIs are formed in the respective regions partitioned by the vertical lines 13.
A plurality of electrode bumps (hereinafter, sometimes simply referred to as bumps) 17 are provided on the front surface of each device 15, and the wafer 11 has on the front surface thereof: a device region 19 formed with a plurality of devices 15 each having a plurality of bumps 17; and a peripheral remaining region 21 surrounding the device region 19.
In the wafer processing method according to the embodiment of the present application, first, as step 1, a cutting groove forming step is performed, in which a cutting tool is used to form a cutting groove having a depth corresponding to the finished thickness of the device chip from the front side of the wafer 11 along the line to divide 13. The cutting groove forming process will be described with reference to fig. 2.
The cutting unit 10 has: a cutting tool 14 detachably attached to the front end portion of the spindle 12; and an alignment unit 16 having a photographing member (photographing unit) 18. The imaging unit 18 includes an infrared imaging element for imaging an infrared image, in addition to a microscope and a camera for imaging with visible light. In this embodiment mode, an InGaAs imaging element is used as an infrared imaging element.
Before the cutting groove forming process, first, the following alignment is performed: the imaging unit 18 images the front surface of the wafer 11 with visible light, detects an alignment mark such as a target pattern formed on each device 15, and detects the dividing line 13 to be cut based on the alignment mark.
After alignment, a cutting groove forming step is performed, in which a cutting tool 14 rotating at a high speed in the direction of an arrow R1 is cut from the front surface 11a side of the wafer 11 along a line to be divided 13 at a depth corresponding to the finished thickness of the device chip, and a chuck table, not shown, holding the wafer 11 by suction is subjected to machining feed in the direction of an arrow X1, thereby forming a cutting groove 23 along the line to be divided 13.
The cutting groove forming process is sequentially performed along the dividing lines 13 extending in the 1 st direction while indexing the cutting unit 10 in a direction perpendicular to the machining feed direction X1 at intervals of the dividing lines 13.
Next, after rotating the chuck table, not shown, by 90 °, the same cutting groove forming process is sequentially performed along the line 13 for dividing, which extends in the 2 nd direction perpendicular to the 1 st direction.
After the cutting groove forming step, a sealing step is performed, and as shown in fig. 3, a sealing material 20 is applied to the front surface 11a of the wafer 11, and the front surface 11a of the wafer 11 including the cutting groove 23 is sealed with the sealing material. Since the sealing material 20 has fluidity, the sealing material 20 is filled into the cutting groove 23 when the sealing process is performed.
The sealing material 20 comprises, by mass%, 10.3% of an epoxy resin or an epoxy resin+phenolic resin, 85.3% of a silica filler, 0.1 to 0.2% of carbon black, and 4.2 to 4.3% of other components. As the other component, for example, metal hydroxide, antimony trioxide, silica, and the like are included.
When the front surface 11a of the wafer 11 is covered with the sealing material 20 having such a composition to seal the front surface 11a of the wafer 11, the sealing material 20 is black due to the very small amount of carbon black contained in the sealing material 20, and thus it is generally difficult to see the front surface 11a of the wafer 11 through the sealing material 20.
Here, the carbon black is mixed into the sealing material 20 mainly for preventing electrostatic destruction of the device 15, and no sealing material containing no carbon black has been sold in the market.
The method of applying the sealing material 20 is not particularly limited, but it is preferable to apply the sealing material 20 up to the height of the bump 17, and then etch the sealing material 20 by etching to make the bump 17 come out.
After the sealing step, a grinding step is performed to grind the wafer 11 from the back surface 11b side of the wafer 11 to the finished thickness of the device chip, thereby exposing the sealing material 20 in the cutting groove 23.
This grinding process will be described with reference to fig. 4. A front protective tape 22 is attached to the front surface 11a of the wafer 11, and the wafer 11 is sucked and held by a chuck table 24 of a grinding device through the front protective tape 22.
The grinding unit 26 includes: a spindle 30 rotatably accommodated in the spindle housing 28 and rotationally driven by a motor not shown; a grinding wheel mount 32 fixed to the front end of the spindle 30; and a grinding wheel 34 detachably attached to the wheel mount 32. The grinding wheel 34 is composed of an annular wheel base 36 and a plurality of grinding tools 38 bonded to the outer periphery of the lower end of the wheel base 36.
In the grinding step, the chuck table 24 is rotated, for example, at 300rpm in the direction indicated by the arrow a, the grinding wheel 34 is rotated, for example, at 6000rpm in the direction indicated by the arrow b, and a grinding means feeding mechanism, not shown, is driven to bring the grinding tool 38 of the grinding wheel 34 into contact with the back surface 11b of the wafer 11.
Then, the rear surface 11b of the wafer 11 is ground while the grinding wheel 34 is ground and fed downward by a predetermined amount at a predetermined grinding feed rate. While measuring the thickness of the wafer 11 by a contact or non-contact thickness gauge, the wafer 11 is ground to a predetermined thickness, for example, 100 μm, and the sealing material 20 embedded in the cutting groove 23 is exposed.
After the grinding process, the following alignment process is performed: the front surface 11a of the wafer 11 is imaged by an infrared imaging means from the front surface 11a side of the wafer 11 so as to pass through the sealing material 20, at least two alignment marks such as target patterns formed on the front surface of the wafer 11 are detected, and the dividing lines 13 to be subjected to laser processing are detected from these alignment marks.
This alignment process will be described in detail with reference to fig. 5. Before the alignment step is performed, the back surface 11b side of the wafer 11 is stuck to the dicing tape T whose outer peripheral portion is attached to the ring frame F.
In the alignment step, as shown in fig. 5, the wafer 11 is sucked and held by a chuck table 40 of a laser processing apparatus via a dicing tape T, and a sealing material 20 for sealing the front surface 11a of the wafer 11 is exposed upward. Then, the ring frame F is clamped and fixed by the clamp 42.
In the alignment step, the front surface 11a of the wafer 11 is imaged by an infrared imaging element of the imaging element 18A of the laser processing apparatus similar to the imaging unit 18 of the cutting apparatus shown in fig. 2. The sealing material 20 is made of a sealing material that transmits infrared rays received by the infrared imaging element of the imaging unit 18, and therefore, it is possible to detect alignment marks such as at least two target patterns formed on the front surface 11a of the wafer 11 by the infrared imaging element.
As the infrared imaging element, an InGaAs imaging element having high sensitivity is preferably used. The photographing unit 18A preferably has an exposure device (exposure) capable of adjusting exposure time or the like.
Next, the chuck table 40 is rotated by θ so that a straight line connecting the alignment marks is parallel to the machining feed direction, and then the chuck table 40 is moved in a direction perpendicular to the machining feed direction X1 (see fig. 6 a) by a distance between the alignment mark and the center of the line to be divided 13, so that the line to be divided 13 to be subjected to laser machining is detected.
After the alignment step, a modified layer forming step is performed, in which, as shown in fig. 6a, a converging point of a laser beam LB having a wavelength (for example, 1064 nm) that is transparent to the sealing material 20 is positioned inside the sealing material 20 in the cutting groove 23, and the modified layer 25 shown in fig. 6B is formed inside the sealing material 20 in the cutting groove 23 by irradiating the laser processing device from the front surface 11a side of the wafer 11 along the dividing line 13 from the laser head (condenser) 46 of the laser processing device, and processing and feeding the chuck table 40 in the direction of the arrow X1.
After the modified layer forming process is sequentially performed along the line 13 extending in the 1 st direction, the chuck table 40 is rotated by 90 °, and the modified layer forming process is sequentially performed along the line 13 extending in the 2 nd direction perpendicular to the 1 st direction.
After the modified layer forming step, a dicing step is performed, and the wafer 11 is divided into the device chips 27 by applying an external force to the wafer 11 using the dicing apparatus 50 shown in fig. 7. The dividing apparatus 50 shown in fig. 7 includes: a frame holding member 52 that holds the ring frame F; and a tape expanding member 54 that expands the dicing tape T mounted on the ring frame F held on the T frame holding member 52.
The frame holding member 52 is composed of an annular frame holding member 56 and a plurality of jigs 58 as fixing members arranged on the outer periphery of the frame holding member 56. A mounting surface 56a for mounting the ring frame F is formed on the upper surface of the frame holding member 56, and the ring frame F is mounted on the mounting surface 56 a.
Then, the ring frame F placed on the placement surface 56a is fixed to the frame holding member 56 by the jig 58. The frame holding member 52 configured as described above is supported by the belt expanding member 54 so as to be movable in the up-down direction.
The belt expansion member 54 has an expansion drum 60 disposed inside the annular frame holding member 56. The upper end of the expansion drum 60 is closed by a cover 62. The expansion drum 60 has an inner diameter smaller than that of the ring frame F and larger than that of the wafer 11, wherein the wafer 11 is attached to a dicing tape T mounted on the ring frame F.
The expansion drum 60 has a support flange 64 formed integrally at its lower end. The belt expanding member 54 further has a driving member 66, and the driving member 66 moves the annular frame holding part 56 in the up-down direction. The driving member 66 is constituted by a plurality of cylinders 68 disposed on the support flange 64, and a piston rod 70 thereof is coupled to the lower surface of the frame holding member 56.
The driving means 66 constituted by the plurality of air cylinders 68 moves the annular frame holding member 56 in the up-down direction between a reference position, which is a position where the mounting surface 56a of the annular frame holding member 56 is substantially at the same height as the front surface of the cover 62, which is the upper end of the expansion drum 60, and an expanded position, which is a position below the upper end of the expansion drum 60 by a predetermined amount.
The wafer 11 dividing process performed by using the dividing apparatus 50 configured as described above will be described with reference to fig. 8. As shown in fig. 8 (a), the ring-shaped frame F supporting the wafer 11 with the dicing tape T is placed on the placement surface 56a of the frame holding member 56, and is fixed to the frame holding member 56 by the jig 58. At this time, the frame holding member 56 is positioned at a reference position where the mounting surface 56a and the upper end of the expansion drum 60 are at substantially the same height.
Next, the cylinder 68 is driven to lower the frame holding member 56 to the expanded position shown in fig. 8 (B). As a result, the ring frame F fixed to the mounting surface 56a of the frame holding member 56 is lowered, and therefore the dicing tape T attached to the ring frame F is brought into contact with the upper end edge of the expansion drum 60 and expands mainly in the radial direction.
As a result, a tensile force is radially applied to the wafer 11 attached to the dicing tape T. When a tensile force is radially applied to the wafer 11 in this manner, the wafer is divided along the dividing line 13 with the modified layer 25 formed in the sealing material 20 as a dividing start point, and the wafer is divided along the modified layer 25 as shown in the enlarged view of fig. 9 into device chips 27 each surrounded by the sealing material 20 on the front surface and 4 side surfaces.

Claims (2)

1. A method for processing a wafer having a plurality of bumps formed in each region of a front surface divided by a plurality of dividing lines formed by crossing each other,
the wafer processing method is characterized by comprising the following steps:
a 1 st alignment step of detecting an alignment mark by photographing the front side of the wafer with visible light by a microscope or a camera provided in a photographing unit, and detecting the predetermined dividing line to be cut from the alignment mark;
a cutting groove forming step of forming a cutting groove having a depth corresponding to a finished thickness of the device chip by a cutting tool along the line to divide from the front surface side of the wafer after the 1 st alignment step is performed;
a sealing step of sealing the front surface of the wafer including the cutting groove with a sealing material after the cutting groove forming step is performed;
a grinding step of grinding the wafer from the back surface side of the wafer to a finished thickness of the device chip to expose the sealing material in the cutting groove after the sealing step is performed;
a 2 nd alignment step of detecting an alignment mark by imaging the front side of the wafer from the front side of the wafer through the sealing material by an infrared imaging element provided in the imaging unit after the grinding step, and detecting the dividing line to be subjected to laser processing based on the alignment mark;
a modified layer forming step of positioning a converging point of a laser beam having a wavelength that is transparent to the sealing material in the interior of the sealing material in the cutting groove after the 2 nd alignment step is performed, and irradiating the laser beam along the predetermined dividing line from the front surface side of the wafer to form a modified layer in the interior of the sealing material; and
a dividing step of applying an external force to the sealing material in the cutting groove after the modified layer forming step is performed to divide the wafer into device chips each having a front surface and 4 side surfaces surrounded by the sealing material with the modified layer as a dividing start point,
in the sealing step, the front surface of the wafer is sealed with the sealing material having a permeability allowing the infrared rays received by the infrared imaging element to pass therethrough.
2. The method for processing a wafer according to claim 1, wherein,
the infrared imaging element is an InGaAs imaging element.
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