JP6066854B2 - Wafer processing method - Google Patents

Description

  The present invention relates to a method for processing a WL-CSP wafer.

  WL-CSP (Wafer-level Chip Size Package) wafer is a technology that forms a rewiring layer and electrodes (metal posts) in the wafer state, then encapsulates the surface side with resin and divides it into packages with a cutting blade or the like Since the size of the package obtained by dividing the wafer into pieces becomes the size of the semiconductor device chip, it is widely adopted from the viewpoint of miniaturization and weight reduction.

  In the manufacturing process of a WL-CSP wafer, after forming a rewiring layer on the device surface side of a device wafer on which a plurality of devices are formed, and further forming a metal post connected to an electrode in the device via the rewiring layer The metal post and the device are sealed with resin.

  Next, after the sealing material is thinned and the metal posts are exposed on the surface of the sealing material, external terminals called electrode bumps are formed on the end faces of the metal posts. Then, it cuts with a cutting device etc. and divides | segments into each CSP.

  In order to protect the semiconductor device from impact, moisture and the like, it is important to seal with a sealing material. Normally, by using a sealing material in which a filler made of SiC is mixed in an epoxy resin as the sealing material, the thermal expansion coefficient of the sealing material is brought close to the thermal expansion coefficient of the semiconductor device chip, and the difference in thermal expansion coefficient Prevents damage to the package during heating.

  WL-CSP wafers are generally divided into individual CSPs using a cutting machine. In this case, the WL-CSP wafer cannot detect the target pattern of the device from the front side because the device used for detecting the division line is covered with resin.

  Therefore, alignment of the planned dividing line and the cutting blade is performed by, for example, indexing the planned dividing line by using the electrode bump formed on the resin of the WL-CSP wafer as a target, or printing the alignment target on the upper surface of the resin. I was doing.

  However, since the target printed on the electrode bumps or the resin is not formed with high accuracy like the device, there is a problem that the accuracy is low as an alignment target. Therefore, when the division line is determined based on the electrode bumps or the printed target, there is a risk that the device part is cut off from the division line.

  Thus, for example, Japanese Patent Application Laid-Open No. 2013-740221 proposes an alignment method based on a device wafer pattern exposed on the outer periphery of the wafer.

JP2013-74021A

  However, in general, the device accuracy is poor at the outer periphery of the wafer, and if alignment is performed based on the pattern exposed at the outer periphery of the wafer, there is a risk that the wafer will be divided at a position outside the planned division line, and depending on the wafer Some device wafer patterns are not exposed at the outer periphery.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a wafer processing method capable of reducing the risk of damaging a device when divided into chips regardless of the wafer. It is to be.

  According to the present invention, the surface of a device wafer on which a device is formed is sealed with a sealing material in a chip region defined by a plurality of division lines formed on the surface, and the chip region on the sealing material A plurality of bumps are formed on each of the plurality of bumps, and the dividing line is a wafer processing method for processing a wafer having a predetermined width, and the dividing material is formed on the sealing material on the dividing lines based on the bumps. Forming a groove having a width wider than a line and having a depth that does not reach the surface of the device wafer, and leaving a remaining portion of a predetermined thickness in the sealing material; and A division-scheduled line detection step of imaging the surface of the device wafer through the uncut portion and detecting the division-scheduled line with an imaging means sensitive to a wavelength having transparency, and the division-scheduled line There is provided a wafer processing method comprising: a dividing step of processing the wafer along the scheduled division line detected in the exiting step and dividing the wafer into individual chips. .

  Preferably, in the dividing step, the bottoms of the grooves are diced along the scheduled dividing lines and divided into individual chips. Alternatively, after a division starting point is formed along the planned division line, an external force is applied to the wafer to divide into individual chips along the planned division line. Preferably, the uncut portion is set to a thickness of 100 μm or less.

  According to the present invention, the device surface is imaged by passing through the sealing material and the planned dividing line is detected. Therefore, even a wafer with poor bump accuracy formed on the sealing material may damage the device during the division. Is reduced. Since the pattern of the device wafer is detected in a state in which the thickness of the sealing material is thinned, the pattern can be detected more clearly and the line to be divided can be detected with high accuracy.

FIG. 1A is an exploded perspective view of a WL-CSP wafer, and FIG. 1B is a perspective view of the WL-CSP wafer. It is an expanded sectional view of a WL-CSP wafer. It is a perspective view which shows a mode that a WL-CSP wafer is stuck on the dicing tape with which the outer peripheral part was mounted | worn with the annular frame. It is a perspective view of a cutting device. It is sectional drawing explaining a groove | channel formation step. It is sectional drawing explaining the division | segmentation planned line detection step. It is sectional drawing explaining the division | segmentation step by dicing. It is sectional drawing explaining the modified layer formation step as a division | segmentation starting point. It is sectional drawing of the state which provided the external force to the wafer and was divided | segmented into the chip | tip using the modified layer as a division | segmentation starting point.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1A, an exploded perspective view of the WL-CSP wafer 27 is shown. FIG. 1B is a perspective view of the WL-CSP wafer 27.

  As shown in FIG. 1A, devices 15 such as LSIs are formed on the surface 11a of the device wafer 11 in each region defined by a plurality of division lines (streets) 13 formed in a lattice pattern. Has been.

  As shown in FIG. 2, the device wafer 11 (hereinafter may be simply referred to as “wafer”) 11 has a back surface 11b previously ground and thinned to a predetermined thickness (about 200 to 300 μm). After forming a plurality of metal posts 21 electrically connected to the inner electrode 17, the surface 11 a side of the wafer 11 is sealed with a sealing material so that the metal posts 21 are embedded.

  As the sealing material 23, it is preferable to use a resin such as an epoxy resin mixed with a filler made of SiC in order to make the thermal expansion coefficient of the sealing material 23 close to the thermal expansion coefficient of the device wafer 11.

  As another embodiment, after the rewiring layer is formed on the surface 11a of the device wafer 11, the metal post 21 electrically connected to the electrode 17 in the device 15 is formed on the rewiring layer. good.

  Next, the resin sealing material 23 is thinned using a plane cutting device (surface planar) having a cutting tool made of single crystal diamond or a grinding device called a grinder. After thinning the resin sealing material 23, the end face of the metal post 21 is exposed by, for example, plasma etching.

  Next, a metal bump 25 such as solder is formed on the exposed end face of the metal post 21 by a well-known method, and the WL-CSP wafer 27 is completed. In the WL-CSP wafer 27 of this embodiment, the thickness of the resin sealing material 23 is about 100 μm.

  When the WL-CSP wafer 27 is cut with a cutting device, the WL-CSP wafer 27 is preferably attached to a dicing tape T as an adhesive tape having an outer peripheral portion attached to an annular frame F as shown in FIG. To wear. As a result, the WL-CSP wafer 27 is supported by the annular frame F via the dicing tape T.

  However, when cutting the WL-CSP wafer 27 with a cutting device, an adhesive tape may be attached to the back surface of the WL-CSP wafer 27 without using the annular frame F.

  Referring to FIG. 4, a perspective view of a cutting device 2 suitable for cutting the WL-CSP wafer 27 is shown. Reference numeral 4 denotes a base of the cutting apparatus 2. On the base 4, a chuck table 6 is disposed so as to be rotatable and reciprocally movable in the X-axis direction by a cutting feed mechanism (not shown). A plurality of clamps 8 for clamping the annular frame F are attached to the chuck table 6. Reference numeral 10 denotes a bellows for protecting the cutting feed mechanism.

  A gate-shaped column 12 is erected on the base 4. A pair of guide rails 14 extending in the Y-axis direction are fixed to the column 12. A Y-axis moving block 16 is mounted on the column 12 so as to be movable in the Y-axis direction along the guide rail 14 by an index feed mechanism 20 including a ball screw 18 and a pulse motor (not shown).

  A pair of guide rails 22 extending in the Z-axis direction are fixed to the Y-axis moving block 16. A Z-axis moving block 24 is mounted on the Y-axis moving block 16 so as to be movable in the Z-axis direction by being guided by the guide rail 22 by a Z-axis moving mechanism 30 including a ball screw 26 and a pulse motor 28. .

  A cutting unit 32 and an alignment unit 36 are attached to the Z-axis moving block 24. A spindle (not shown) is rotatably accommodated in the spindle housing of the cutting unit 32, and a cutting blade 34 is attached to the tip of the spindle.

  The alignment unit 36 includes a first imaging unit 38 that includes a macro microscope and a standard camera that captures visible light, and a second imaging unit 40 that includes a micro microscope, a standard camera, and an infrared camera.

  Next, a method for processing the WL-CSP wafer 27 using the cutting device 2 will be described. First, the WL-CSP wafer 27 supported by the annular frame F via the dicing tape T is placed on the holding surface of the chuck table 6 and sucked and held by the chuck table 6, and the annular frame F is clamped by the clamp 8. And fix.

  Next, the first imaging unit 38 and the second imaging unit 40 are used to image the surface of the WL-CSP wafer 27, and alignment for detecting a cutting area between the metal bumps 25 based on the metal bumps 25 is performed.

  Based on this alignment, a groove 29 having a width wider than the width t1 of the planned dividing line 13 in the resin sealing material 23 on the planned dividing line 13 and not reaching the surface 11a of the device wafer 11 is cut by the cutting blade. A groove forming step is performed in which the uncut portion 31 having a predetermined thickness t2 remains in the resin sealing material 23.

  The width of the groove 29 is appropriately set according to the distance between the bumps and the width of the division planned line 13. It is preferable to form the groove 29 as wide as possible because the imageable area is widened. However, in order to prevent the bump 25 from being cut by the blade 34 when the groove 29 is formed, the bump 25 and the groove 29 For example, it is preferable to provide a margin width of, for example, 100 μm or more.

  The width t <b> 1 of the planned division line 13 is about 80 μm, and the thickness t <b> 2 of the uncut portion 31 is appropriately set according to the type of the resin sealing material 23. The thickness t2 of the uncut portion is set to 70 μm or less, preferably 50 μm or less.

  After performing the groove forming step, as shown in FIG. 6, the image capturing means having sensitivity to the wavelength having transparency to the resin sealing material 23 is transmitted through the uncut portion 31 by the infrared camera of the second imaging unit 40. An image of the surface 11a of the device wafer 11 is imaged, and a planned division line detection step for detecting the planned division line 13 is performed.

  In this embodiment, an infrared camera is used as the imaging unit. However, the imaging unit is not limited to the infrared camera, and has a wavelength that is transparent to the sealing material according to the type of the resin sealing material. Other imaging means with sensitivity can also be used.

  Then, as shown in FIG. 7, along the planned division line 13 detected in the planned division line detection step, the bottom of the groove 29 is diced to divide the WL-CSP wafer 27 into individual chips. carry out.

  The cutting blade used for this dicing uses a cutting blade having a narrow width as compared with the cutting blade 34 used in the groove forming step to form the cutting groove 33 reaching the dicing tape T, and the WL-CSP wafer 27 is formed. Divide into individual chips. In this division step, the WL-CSP wafer 27 may be fully cut by ablation processing using a laser beam instead of dicing.

  Next, another embodiment of the dividing step will be described with reference to FIGS. In this embodiment, a division starting point is first formed on the device wafer 11, and then an external force is applied to the WL-CSP wafer 27 to divide the WL-CSP wafer 27 into individual chips.

  With reference to FIG. 8, one embodiment of the division starting point forming step will be described. In this embodiment, as shown in FIG. 8, the groove 29A formed in the groove forming step is formed deeply, and the uncut portion 31A is formed to be thin enough to be divided when an external force is applied to the wafer, for example, about 10 μm. deep.

  Then, a laser beam 43 having a wavelength (for example, 1064 nm) having transparency to the device wafer 11 is irradiated from the laser beam irradiation head 42 to form a modified layer 35 as a division starting point inside the device wafer 11. When this modified layer is formed, the condensing point of the laser beam 43 is set inside the wafer 11, and the device wafer 11 is irradiated with the laser beam 43 through the uncut portion 31A.

  The modified layer 35 is formed inside the device wafer 11 along the division line 13 that extends in the first direction while indexing and feeding the chuck table of the laser processing apparatus that sucks and holds the WL-CSP wafer 27.

  After forming the modified layer 35 along all the planned dividing lines 13 extending in the first direction, the chuck table is rotated by 90 °, and all the dividing extending in the second direction orthogonal to the first direction is performed. A similar modified layer 35 is formed along the planned line 13.

  The formation of the division starting point is not limited to the formation of the modified layer 35 by laser beam irradiation, but a groove formed by ablation processing by laser beam irradiation or a groove formed by a cutting blade is used as the division starting point. You may do it.

  After the division starting point is formed, as shown in FIG. 9, the dicing tape T is expanded in the direction of arrow A to apply an external force to the WL-CSP wafer 27, and the WL-CSP wafer 27 is individually separated from the modified layer 35 as the division starting point. Divide into chips. Reference numeral 37 denotes a dividing groove.

  In the embodiment described above, the target pattern of the device 15 is detected in a state where the groove 29 is formed by leaving the uncut portion 31 having the predetermined thickness t2 in the groove forming step and the thickness of the resin sealing material 23 is reduced. Thus, the target pattern can be detected more clearly, and the division line 13 can be detected with high accuracy. Therefore, even with a WL-CSP wafer 27 with poor bump accuracy, the WL-CSP wafer 27 can be divided into individual chips without damaging the device 15.

11 Device wafer 13 Planned division line 15 Device 21 Metal post 23 Sealing resin 25 Bump 27 WL-CSP wafer 29 Groove 31 Uncut portion 33 Cutting groove 35 Modified layer 40 Second imaging unit 42 Laser beam irradiation head

Claims (4)

The surface of a device wafer on which devices are formed in chip regions defined by a plurality of division lines formed on the surface is sealed with a sealing material, and a plurality of bumps are formed on the chip regions on the sealing material. Is formed, and the dividing line is a wafer processing method for processing a wafer having a predetermined width,
Based on the bump, a groove having a width wider than a width of the division line is formed in the sealing material on the division line, and a depth not reaching the surface of the device wafer is formed on the sealing material. A groove forming step for leaving the uncut portion of a predetermined thickness;
A planned division line detection step of imaging the surface of the device wafer through the uncut portion with an imaging means having sensitivity to a wavelength having transparency to the sealing material, and detecting the planned division line;
A dividing step of processing the wafer along the planned dividing line detected in the planned dividing line detecting step, and dividing the wafer into individual chips;
A wafer processing method characterized by comprising:   The wafer processing method according to claim 1, wherein in the dividing step, the bottom of the groove is diced along the planned dividing line and divided into individual chips.   2. The wafer processing method according to claim 1, wherein, in the dividing step, after a division starting point is formed along the scheduled division line, an external force is applied to the wafer to divide into individual chips along the planned division line.   The wafer processing method according to claim 1, wherein the uncut portion is set to a thickness of 100 μm or less.

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