CN109427755A - 半导体装置组合件和其制造方法 - Google Patents

半导体装置组合件和其制造方法 Download PDF

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CN109427755A
CN109427755A CN201811006229.0A CN201811006229A CN109427755A CN 109427755 A CN109427755 A CN 109427755A CN 201811006229 A CN201811006229 A CN 201811006229A CN 109427755 A CN109427755 A CN 109427755A
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semiconductor device
substrate
solder mask
mask support
discrete solder
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CN109427755B (zh
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B·P·沃兹
B·L·麦克莱恩
J·E·明尼克
马朝辉
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Micron Technology Inc
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Abstract

本发明涉及一种半导体装置组合件和其制造方法。一种半导体装置组合件，其包含定位在衬底上方的半导体装置，其中多个电互连件形成在所述半导体装置与所述衬底之间。所述衬底的表面包含朝向所述半导体装置延伸的多个离散焊料掩模支座。热压结合过程用于使焊料熔融以形成所述电互连件，这降低所述半导体装置以接触所述多个离散焊料掩模支座且由所述多个离散焊料掩模支座支撑。所述焊料掩模支座准许在所述结合过程期间施加比使用传统焊料掩模更大的压力。所述焊料掩模支座可具有各种多边形或非多边形形状且可按图案定位以保护所述半导体装置和/或所述衬底的敏感区域。所述焊料掩模支座可以是保护所述半导体装置和/或衬底的区域的细长形状。

Description

半导体装置组合件和其制造方法
技术领域
本文中所描述的实施例涉及具有裸片支撑结构的半导体装置组合件和提供此类半导体装置组合件的方法。本公开涉及用以将例如裸片等半导体装置支撑在衬底上的离散焊料掩模支座。
背景技术
半导体装置组合件，包含但不限于存储器芯片、微处理器芯片和成像器芯片，通常包含安装在衬底上的半导体裸片，所述半导体装置组合件可包入塑料防护盖或金属散热器中。半导体装置组合件可包含各种功能性特征，例如存储器单元、处理器电路和成像器装置，且可包含电连接到半导体装置组合件的功能性特征的结合垫。半导体装置组合件可包含堆叠在封装件内的相邻裸片之间的个别互连件上且通过所述个别互连件彼此电连接的半导体裸片。个别互连件可包括例如焊料等导电材料，以及半导体装置组合件的相邻裸片的相对表面上的一对接触件。各种方法和/或技术可被采用来支撑和电互连半导体装置组合件中的相邻裸片和/或衬底。
与非导电膜(NCF)的热压结合，另外被称为晶片级底部填充(WLUF)，是一种可用于将裸片连接到衬底以形成半导体装置组合件的技术。底部填充材料，其可以是一张层压膜，被沉积到包括多个裸片的晶片上。晶片可被切割以形成接着结合到衬底的个别裸片。WLUF的一个潜在缺点是由于衬底的表面形态(例如，铜迹线、焊料掩模)所致的空隙存在。举例来说，表面形态可抑制空隙溢出到裸片区域外部。图5展示半导体装置封装件200，其包含结合到封装材料290内的衬底240的半导体装置210。半导体装置封装件200包含定位在半导体装置210与衬底240之间的焊料掩模245和NCF 270。半导体装置封装件200包含NCF 270内的邻近于半导体装置210与衬底240之间的互连件280的空隙246。空隙246可能已由于互连件280的表面形态而形成。互连件280可包括经由垫260连接到电迹线250的柱230。举例来说，互连件280的表面形态可抑制空隙溢出到半导体装置210的区域外部。
在半导体装置210与衬底240之间具有具体结合线可能是所要的。在结合过程期间，在结合过程期间施加的力可能需要发生变化以图获得指定结合线。举例来说，当NCF材料处于高粘度状态时，可能需要施加更大的力以获得所要结合线，但是随着NCF在TCB过程期间受热，NCF的粘度可减小，从而使得需要更小的力以获得所要结合线。在TCB过程期间的粘度改变、继而致使施加力的变化可使得难以在过程的持续时间内获得所要结合线。
在TCB过程期间施加的更大的力可有助于消除WLUF空隙，但更大的施加力可能会使焊料跨半导体装置的迹线和/或互连件无意地桥接，如所属领域的技术人员将了解。替代地，可减小焊料厚度以帮助消除桥接，但减小的焊料厚度可能会导致亚稳定金属间化合(IMC)问题，如所属领域的技术人员将认识到。
使用焊剂和毛细管底部填充物(“Flux/CUF”)作为一种材料的TCB是可用于将裸片附接到衬底以形成半导体装置组合件的另一种技术。可将焊剂喷流到衬底上且接着可使用TCB过程将半导体装置附接到衬底。然后，可紧靠半导体结合线分配毛细管底部填充物(CUF)，从而使得毛细管效应将CUF拉动到结合线中，直到所述结合线充满为止。衬底的表面形态(例如，铜迹线、焊料掩模、支腿垫)可致使跨衬底的所要表面的不完全毛细流动。
可能存在额外缺陷和缺点。
发明内容
在一个方面中，本发明提供一种半导体装置组合件，其包括：衬底，其具有至少一个离散焊料掩模支座；半导体装置，其安置在所述衬底上方，所述半导体装置具有从所述半导体装置朝向所述衬底延伸的至少一个柱，且所述至少一个离散焊料掩模支座从所述衬底朝向所述半导体装置延伸；且其中焊料将所述至少一个柱连接到所述衬底上的迹线，且其中所述至少一个离散焊料掩模支座支撑安置在所述衬底上方的所述半导体装置。
在另一方面中，本发明提供一种半导体装置组合件，其包括：衬底，其具有多个离散焊料掩模支座；半导体装置，其邻近于所述衬底定位；和多个电互连件，其介于所述衬底与所述半导体装置之间；其中所述多个离散焊料掩模支座从所述衬底延伸且接触所述半导体装置的底表面。
在另一方面中，本发明提供一种制造半导体装置组合件的方法，其包括：在衬底上设置至少一个离散焊料掩模支座；使半导体装置邻近于所述衬底定位；在所述半导体装置与所述衬底之间形成至少一个互连件；和将所述半导体装置支撑在所述衬底上的所述至少一个离散焊料掩模支座上。
在另一方面中，本发明提供一种制造半导体装置组合件的方法，其包括：使半导体装置邻近于所述衬底定位，所述衬底具有从顶表面朝向所述半导体装置延伸的多个离散焊料掩模支座，所述半导体装置具有朝向所述衬底延伸的多个柱，每个柱包含所述柱的末端上的焊料凸块；降低所述半导体装置，直到每个焊料凸块接触所述衬底上的垫为止，其中所述半导体装置的底表面与所述衬底的所述顶表面相距第一距离；对所述半导体装置和衬底组合件应用热压结合过程，其中所述焊料凸块熔融以与所述垫形成互连件；和使所述半导体装置朝向所述衬底移动，直到所述多个离散焊料掩模支座将所述半导体装置支撑在所述衬底的所述顶表面上为止，其中所述半导体装置的所述底表面与所述衬底的所述顶表面相距第二距离，所述第二距离小于所述第一距离。
附图说明
图1是包含定位在具有多个离散焊料掩模支座的衬底上方的半导体装置的半导体装置组合件的实施例的示意图。
图2是图1的半导体装置组合件的示意图，其中半导体装置远离衬底相距第一距离定位。
图3是图1的半导体装置组合件的示意图，其中半导体装置远离衬底相距第二距离定位。
图4A到4E是具有多个离散焊料掩模支座的预定图案的衬底的各种实施例的示意图。
图5是在焊料掩模中具有空隙的现有技术半导体装置组合件的示意图。
图6是用于具有焊料掩模的半导体装置组合件的现有技术衬底的示意图。
图7是描绘一种制造半导体装置组合件的方法的一个实施例的流程图。
图8是描绘一种制造半导体装置组合件的方法的一个实施例的流程图。
虽然本公开易有各种修改和替代形式，但具体实施例已经在图中借助于实例展示且将在本文中详细描述。然而，应理解，本公开并不意欲限于所公开的特定形式。相反，意图是涵盖属于如由所附权利要求书界定的本公开的范围内的所有修改、等效物和替代物。
具体实施方式
在本公开中，论述了众多具体细节以提供对本公开的实施例的透彻且启发性描述。所属领域的技术人员将认识到，可在并无具体细节中的一或多个的情况下实践本公开。通常与半导体装置相关联的众所周知的结构和/或操作可能不会展示和/或可能不会详细描述以避免混淆本公开的其它方面。一般来说，应理解，除了本文中所公开的那些具体实施例之外的各种其它装置、系统和方法可能在本公开的范围内。
术语“半导体装置组合件”可是指一或多个半导体装置、半导体装置封装件和/或衬底的组合件，所述衬底可包含插入件、支撑件和/或其它合适的衬底。半导体装置组合件可制造为但不限于离散封装件形式、条带或矩阵形式和/或晶片面板形式。术语“半导体装置”大体上是指包含半导体材料的固态装置。半导体装置可包含例如来自晶片或衬底的半导体衬底、晶片、面板或单个裸片。半导体装置在本文中可是指一种半导体裸片，但半导体装置不限于半导体裸片。
术语“半导体装置封装件”可是指一或多个半导体装置并入到共同封装件中的布置。半导体封装件可包含部分地或完全地包封至少一个半导体装置的外壳或壳体。半导体封装件还可包含携载一或多个半导体装置的衬底。衬底可附接到或以其它方式并入在外壳或壳体内。
如本文中所使用，术语“竖直”、“侧向”、“上部”和“下部”可是指图式中所展示的特征在半导体装置和/或半导体装置组合件中的相对方向或位置。举例来说，“上部”或“最上部”可是指比另一特征更接近页面的顶部定位的特征。然而，这些术语应被广泛地解释为包含具有其它定向的半导体装置和/或半导体装置组合件，例如颠倒或倾斜定向，其中顶部/底部、上方/下方、高于/低于、向上/向下和左边/右边可取决于定向而互换。
本公开的各种实施例涉及半导体装置、半导体装置组合件、半导体封装件和制造和/或操作半导体装置的方法。在本公开的一个实施例中，半导体装置定位在具有多个离散焊料掩模支座的衬底上方，所述多个离散焊料掩模支座将半导体支撑在衬底上。多个离散焊料掩模支座允许在半导体装置被结合到衬底时施加比在传统WLUF和/或Flux/CUF过程中能够施加的力更大的力，同时最小化如本文中所论述的桥接。离散焊料掩模支座可策略性地按一图案定位以更好地保护如本文中所论述的半导体装置和/或衬底的各种敏感部分。个别离散焊料掩模支座的形状可帮助保护半导体装置和/或衬底的各种敏感部分和/或可往往会引导在结合过程期间熔融的焊料的流动。
图1展示包含半导体装置110和衬底140的半导体装置组合件100的示意图。图1展示在将半导体装置110连接到衬底140之前半导体装置110邻近于衬底140定位。半导体装置110包含从半导体装置110朝向衬底140延伸的柱120。柱120包含镀层125和将用于在半导体装置110与衬底140之间形成电互连件180(如图3中所展示)的焊料凸块130。举例来说，焊料凸块130可被加热以结合到衬底140的顶表面141上的垫160。垫160可连接到衬底140的电迹线150，如具有本公开的权益的所属领域的技术人员将了解。衬底140的顶表面141包含多个离散焊料掩模支座170。离散焊料掩模支座170在半导体装置110结合到衬底140时可策略性地按预定图案定位在衬底的顶表面141上以支撑所述半导体装置110，从而形成如本文中所描述的半导体装置组合件100。
多个离散焊料掩模支座170可定位在衬底140的电迹线150的顶部。在焊料掩模支座170下方的电迹线150可被电隔离且仅仅用于焊料掩模支座170。替代地，电迹线150可电连接到衬底140上的其它迹线150。替代地，焊料掩模支座170可直接定位到衬底140的顶表面141以提供所要结合线。焊料掩模支座170可包括各种横截面形状。举例来说，焊料掩模支座170的水平横截面形状可以是正方形、长方形、三角形、六边形、八边形或各种其它形状。焊料掩模支座170的水平横截面形状可具有其它形状，例如但不限于圆形、椭圆形或其它各种形状，如具有本公开的权益的所属领域的技术人员将了解。焊料掩模支座170具有高度h，所述焊料掩模支座170用于在半导体装置110结合到衬底140时支撑所述半导体装置110。对于30微米总高度的焊料掩模支座170，其可在具有15微米高度的电迹线150的顶部具有大致15微米的高度，所述高度是焊料掩模的典型厚度。焊料掩模支座170的高度h可比在衬底上使用的焊料掩模的典型厚度小得多或大得多。举例来说，焊料掩模支座170的高度，或换句话说其厚度，可取决于应用而在5微米与100微米之间变化。
图2是展示半导体装置110的定位在衬底140的垫160上的焊料凸块130的示意图，其中半导体装置110与衬底140的顶表面141相距第一距离D1。接着可使用TCB过程来将半导体装置110结合到衬底140。在TCB过程期间施加力和热以将半导体装置110结合到衬底140，如所属领域的技术人员将了解。
在TCB过程期间，半导体装置110的焊料凸块130发生变形(即，熔融)且结合到衬底140的垫160以在半导体装置110与衬底140之间形成互连件180，如图3中所展示。半导体装置110与衬底140的顶部之间的距离D2小于在TCB过程之前的距离D1。多个离散焊料掩模支座170在TCB过程期间被向下按压到衬底140时支撑半导体装置110。焊料掩模支座170的厚度h可允许在TCB过程期间向裸片110施加更大的力。增大在结合过程期间施加的力可有助于消除WLUF空隙。如上文所论述，虽然增大在结合过程期间施加的力有助于减小空隙，但其也会致使焊料被从半导体装置与衬底之间挤出，从而潜在地导致不想要的桥接。与传统焊料掩模245(图6中所展示)相反，多个离散焊料掩模支座170的使用减小了甚至当在结合过程施加更大的力期间时不想要的桥接的可能性。
如上文所论述，在半导体装置和衬底的TCB过程期间施加的力可能需要变化以获得所要结合线，原因是NCF在TCB过程期间由于对NCF材料的加热而变得粘性较小。在过程期间的力的变化可能会不利地影响在半导体装置与衬底之间实现所要结合线的一致性。使用多个离散焊料掩模支座170来将半导体装置110支撑在衬底140上提供了可允许在TCB过程期间使用足够大的力的支座，换句话说硬止动部。换句话说，多个离散焊料掩模支座170可允许在整个TCB过程期间施加更大的力，甚至当NCF材料的粘度由于在TCB过程期间的加热而变得粘性较小时也同样如此。一致的力的施加结合多个离散焊料掩模支座170可允许半导体装置110与衬底140之间的更一致的目标结合线。
离散焊料掩模支座170对半导体装置110提供支撑且还与先前半导体装置组合件的典型衬底240上的焊料掩模245相比在衬底140的表面上形成更少表面形态，原因是焊料掩模245大体上覆盖衬底240的表面的大部分，如图6中所展示。通常，焊料掩模245覆盖衬底240的超过75％的表面。先前衬底240通常包含衬底掩模245，所述衬底掩模245覆盖除多个支腿垫260和被暴露而具有活动迹线250的中间通道以外的整个衬底240，如图6中所展示。多个离散焊料掩模支座170的使用实现对半导体装置110的更好支撑，这可在半导体110与衬底140之间提供更一致的结合线。如上文所论述，多个离散焊料掩模支座170可通过允许在结合过程期间施加大体上一致的力而在半导体110与衬底140之间提供更一致的目标结合线。
图4A是具有以一预定图案定位在衬底140A的表面上的多个离散焊料掩模支座170A的衬底140A的实施例的示意图。衬底140A包含多个支腿垫160，所述多个支腿垫160可以是任选的。衬底140A包含沿着衬底140A的中间的多个暴露的活动迹线150，所述多个暴露的活动迹线150对应于图6中所展示的衬底240的暴露的活动迹线250。暴露的活动迹线150、250可具有与垫160、260相同的金属结构，如所属领域的技术人员将了解。换句话说，暴露的活动迹线150、250可以是由垫覆盖的迹线。同样地，边远垫160、260可以是定位在远离衬底中间的暴露部分定位的电迹线上的垫。衬底140A包含通常由焊料掩模245(图6中所展示)覆盖的额外迹线150，但为了清楚起见并未在衬底140A上展示所述焊料掩模245。同样地，通常由常规焊料掩模覆盖的迹线150为了清楚起见并未在图4B到4E中展示。
多个离散焊料掩模支座170A可方便地和/或策略性地围绕衬底140A安置以在半导体装置110(图1到3中所展示)结合到衬底140A时对所述半导体装置110提供适当支撑。焊料掩模支座170A的形状、位置和/或厚度可取决于如具有本公开的权益的所属领域的技术人员所了解的应用而变化。举例来说但不限于，焊料掩模支座170A可具有如图4A中所展示的正方形横截面形状，焊料掩模支座170B可具有如图4B中所展示的圆形横截面形状，或焊料掩模支座170C可具有如图4C中所展示的六边形横截面形状。离散焊料掩模支座还可包括各种其它形状。另外，离散焊料掩模支座可包含衬底140的多于一个形状，如具有本公开的权益的所属领域的技术人员将了解。
焊料掩模支座170的位置、数目、图案和/或形状可取决于如具有本公开的权益的所属领域的技术人员所了解的应用而方便地和/或策略性地变化。举例来说，图4D中所展示的细长焊料掩模支座170D和图4E中所展示的细长焊料掩模支座170E可用于保护半导体装置和/或衬底的潜在敏感的区域在结合过程期间免于NCF的流动。细长焊料掩模支座可取决于如具有本公开的权益的所属领域的技术人员将了解的应用而具有各种形状。在一个实例中，细长焊料掩模支座的形状可大体上为椭圆，具有主轴171D、171E，如图4D和4E中所展示。细长焊料掩模支座的主轴171D、171E可用于在结合过程期间在NCF移动通过结合线时引导所述NCF的流动。
举例来说，细长焊料掩模支座170D的主轴171D可被布置成相对于衬底140D的边缘倾斜。细长焊料掩模支座170D的主轴171D可相对于衬底140D的边缘以大体上45度倾斜，从而保护半导体装置的拐角敏感区域和/或引导任何熔融焊料的流动。同样地，细长焊料掩模支座170E的主轴171E可定位成与衬底140E的边缘大体上对准以保护半导体装置和/或衬底的敏感区域和/或在结合过程期间引导NCF的流动，如图4E中所展示。图4D和4E中所展示的大体上椭圆形形状仅出于说明性目的。各种其它图案、细长形状、定向和/或配置可用于保护半导体的特别敏感区域和/或引导NCF的潜在流动，如具有本公开的权益的所属领域的技术人员将了解。
与在将半导体装置110结合到衬底140期间使用的传统焊料掩模相比，如图4A到4E中所说明离散焊料掩模支座可覆盖衬底140的小得多的表面。举例来说，传统焊料掩模可覆盖衬底240的超过75％的表面(如图6中所展示)。本公开的离散焊料掩模支座可包含各种形状、图案和/或配置且可覆盖衬底140的50％或更小的表面。在一些实施例中，离散焊料掩模支座可取决于如具有本公开的权益的所属领域的技术人员将了解的应用而覆盖小于25％的衬底140。
图7是制造半导体装置组合件300的方法的一个实施例的流程图，包含在步骤310处在衬底上设置至少一个离散焊料掩模支座。在步骤320处，方法300包含使半导体装置邻近于衬底定位。方法300包含在步骤330处在半导体装置与衬底之间形成至少一个互连件。在步骤340处将半导体装置支撑在至少一个离散焊料掩模支座上。形成互连件可包含将至少一个柱连接到衬底上的至少一个迹线。可通过使用力控制的TCB过程将柱连接到迹线。在TCB过程期间，半导体装置和衬底可一起移动，从而使得半导体装置接触衬底上的至少一个离散焊料掩模支座。衬底可包含在TCB过程期间支撑半导体装置的多个离散焊料掩模支座。至少一个支腿垫可设置在衬底上且互连件可形成在半导体装置与至少一个支腿垫之间。
图8是制造半导体装置组合件400的方法的一个实施例的流程图，包含在步骤410处使半导体装置邻近于衬底定位。衬底包含从顶表面朝向半导体装置延伸的多个离散焊料掩模支座。半导体装置包含朝向衬底延伸的多个柱，其中焊料凸块安置在每个柱的末端上。方法400包含在步骤420处降低半导体装置，直到焊料凸块接触衬底上的垫为止。半导体装置的底表面将与衬底的顶表面相距第一距离。在步骤430处，方法400包含对半导体装置和衬底组合件应用TCB过程。TCB过程使焊料凸块熔融以与垫形成互连件。方法400包含使半导体装置朝向衬底移动，直到多个离散焊料掩模支座支撑半导体装置为止，此时半导体装置的底表面将与衬底的顶表面相距第二距离。第二距离小于第一距离。方法400可包含假设多个离散焊料掩模支座是细长形状或多边形形状。焊料掩模支座可安置在衬底的顶表面上的迹线上。
尽管已经关于某些实施例描述了本公开，但所属领域的技术人员清楚的其它实施例，包含并不提供本文中所阐述的所有特征和优点的实施例，同样在本公开的范围内。本公开可涵盖本文中未明确地展示或描述的其它实施例。因此，本公开的范围仅参考所附权利要求书及其等效物界定。

Claims (20)

1.一种半导体装置组合件，其包括：
衬底，其具有至少一个离散焊料掩模支座；
半导体装置，其安置在所述衬底上方，所述半导体装置具有从所述半导体装置朝向所述衬底延伸的至少一个柱，且所述至少一个离散焊料掩模支座从所述衬底朝向所述半导体装置延伸；和
其中焊料将所述至少一个柱连接到所述衬底上的迹线，且其中所述至少一个离散焊料掩模支座支撑安置在所述衬底上方的所述半导体装置。
2.根据权利要求1所述的半导体装置组合件，其中所述至少一个离散焊料掩模支座具有大致15微米的厚度，所述所述至少一个离散焊料掩模支座定位在具有大致15微米的厚度的电迹线上。
3.根据权利要求1所述的半导体装置组合件，其中所述至少一个离散焊料掩模支座具有细长形状。
4.根据权利要求3所述的半导体装置组合件，其中所述细长形状的主轴与所述衬底的边缘大体上平行。
5.根据权利要求3所述的半导体装置组合件，其中所述细长形状的主轴相对于所述衬底的边缘大体上处于45度。
6.一种半导体装置组合件，其包括：
衬底，其具有多个离散焊料掩模支座；
半导体装置，其邻近于所述衬底定位；和
多个电互连件，其介于所述衬底与所述半导体装置之间；
其中所述多个离散焊料掩模支座从所述衬底延伸且接触所述半导体装置的底表面。
7.根据权利要求6所述的半导体装置组合件，其中所述多个离散焊料掩模支座按预定图案布置在所述衬底上。
8.根据权利要求6所述的半导体装置组合件，其中所述多个焊料掩模支座覆盖所述衬底的小于50％的表面。
9.根据权利要求6所述的半导体装置组合件，其中所述离散焊料掩模支座中的每一个具有介于5微米与100微米之间的厚度。
10.根据权利要求6所述的半导体装置组合件，其中所述离散焊料掩模支座的水平横截面形状是多边形形状。
11.根据权利要求6所述的半导体装置组合件，其中所述离散焊料掩模支座的水平横截面形状是圆形或椭圆形形状。
12.一种制造半导体装置组合件的方法，其包括：
在衬底上设置至少一个离散焊料掩模支座；
使半导体装置邻近于所述衬底定位；
在所述半导体装置与所述衬底之间形成至少一个互连件；和
将所述半导体装置支撑在所述衬底上的所述至少一个离散焊料掩模支座上。
13.根据权利要求12所述的方法，其中形成所述至少一个互连件进一步包括将至少一个柱连接到所述衬底上的至少一个迹线。
14.根据权利要求13所述的方法，其中将所述至少一个柱连接到至少一个迹线进一步包括使用力控制的热压结合进行焊料连接。
15.根据权利要求14所述的方法，其中在所述力控制的热压结合期间，所述半导体装置和所述衬底一起移动，从而使得所述半导体装置接触所述衬底上的所述至少一个离散焊料掩模支座。
16.根据权利要求12所述的方法，其进一步包括在所述衬底上设置至少一个支腿垫。
17.根据权利要求16所述的方法，其中所述至少一个互连件在所述半导体装置与所述至少一个支腿垫之间形成。
18.一种制造半导体装置组合件的方法，其包括：
使半导体装置邻近于所述衬底定位，所述衬底具有从顶表面朝向所述半导体装置延伸的多个离散焊料掩模支座，所述半导体装置具有朝向所述衬底延伸的多个柱，每个柱包含所述柱的末端上的焊料凸块；
降低所述半导体装置，直到每个焊料凸块接触所述衬底上的垫为止，其中所述半导体装置的底表面与所述衬底的所述顶表面相距第一距离；
对所述半导体装置和衬底组合件应用热压结合过程，其中所述焊料凸块熔融以与所述垫形成互连件；和
使所述半导体装置朝向所述衬底移动，直到所述多个离散焊料掩模支座将所述半导体装置支撑在所述衬底的所述顶表面上为止，其中所述半导体装置的所述底表面与所述衬底的所述顶表面相距第二距离，所述第二距离小于所述第一距离。
19.根据权利要求18所述的方法，其进一步包括以所述多个离散焊料掩模支座是细长形状为前提。
20.根据权利要求18所述的方法，其进一步包括以所述多个离散焊料掩模支座是多边形形状且安置在所述衬底的所述顶表面上的迹线上为前提。
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