CN109346524B - 一种具有阶梯浓度多晶硅侧墙结构的超结vdmos器件 - Google Patents
一种具有阶梯浓度多晶硅侧墙结构的超结vdmos器件 Download PDFInfo
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Abstract
本发明公开了一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,首先在传统器件基础上增加了具有隔离和耐压作用的氧化硅薄墙及解决电荷非平衡问题的阶梯浓度的多晶硅侧墙结构。其次在新型超结VDMOS器件基础上引入了P型柱,在器件关态时,与漂移区中的N型漂移区形成一系列反向PN结结构,承担一部分耐压,从而将器件的电场引入器件内部,优化整个有源顶层硅内的电场分布和提升器件的击穿电压。另一方面,漂移区中形成的超结结构辅助耗尽漂移区,从而提升漂移区的掺杂浓度,达到降低器件开态时导通电阻的目的。综上,本发明的结构能在提高器件击穿电压的同时降低器件的导通电阻,缓解了功率器件击穿电压与导通电阻之间的矛盾。
Description
技术领域
本发明属于半导体功率器件技术领域,具体涉及一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件。
背景技术
功率MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor即金属-氧化物-半导体场效应管)器件被广泛应用于功率集成领域,其击穿电压与导通电阻之间的矛盾是人们长期关注的焦点问题之一,并由此提出了一系列缓解该矛盾的方案,其中超结结构(Super junction)被认为是能够有效缓解该矛盾的结构之一。典型的常规超结VDMOS器件如图1所示,1为N型衬底,2为P柱区,3为N型漂移区,有源顶层硅包括7为P+源区、8为N+源区、9为P-base区、10为栅氧区,电极包括源电极11,栅电极12,漏电极13。该结构相较于非超结结构利用电荷补偿理论,将一系列交替排列的P柱区和N型漂移区替代单一掺杂(P型或N型)的漂移区。在器件处于关态时,超结结构器件内部既存在纵向电场,也存在P柱区和N型漂移区形成的横向电场。若保证在击穿前,P柱区和N型漂移区完全耗尽,则可以将超结结构的临界电场固定在一个恒定值。因此器件的耐压仅取决于漂移区的厚度,这就可以大幅度增加漂移区的掺杂浓度,从而在保持相同击穿电压情形下大幅度降低器件的导通电阻。相关内容可见参考文献:Chen X.Semiconductor power devices with alternatingconductivity type high-voltage breakdown regions:US,US5216275[P].1993。在此基础上,Poly Flanked VDMOS器件被提出,见图2,1为N型衬底,3为N型漂移区,4为氧化隔离层,有源顶层硅包括7为P+源区、8为N+源区、9为P-base区、10为栅氧区,14多晶硅侧墙,电极包括源电极11,栅电极12,漏电极13。该结构采用了在P区与N区之间的界面处生长一层薄薄的氧化层结构,起到了隔离作用,克服了不同杂质掺杂相互扩散的问题,增加了器件的稳定性。同时,N型外延层及P型多晶硅的宽度将会降低,从而提高器件外延层的掺杂浓度,降低器件的导通电阻。但是,这种结构仍然存在电荷不平衡的问题。相关内容可见参考文献:GanK P,Liang Y C,Samudra G S,et al.Poly flanked VDMOS(PFVDMOS):a superiortechnology for superjunction devices[J].2001,4:2156-2159vol.4.。为进一步缓解导通电阻和击穿电压之间的矛盾,解决电荷平衡的问题。Yung C.Liang等人提出了边氧沟道结构(Oxide-Bypassed OBVDMOS),如图3所示,1为N+型衬底,3为N型漂移区,10为栅氧区,有源顶层硅包括7为P+源区、8为N+源区、9为P-base区、14为多晶硅侧墙,15为金属氧化层(MTO),电极包括源电极11,栅电极12,漏电极13。该结构的特点在于:厚厚的氧化层墙替代了传统超结VDMOS中的P柱区,氧化层在器件关态时可以承担耐压;同时,增加的金属氧化层引起的电场效应加速了N型漂移区的横向耗尽,为防止器件提前击穿,需增加漂移区的掺杂浓度,从而大大降低了器件的导通电阻。相关内容见:Liang Y C,Gan K P,Samudra GS.Oxide-bypassed VDMOS(OBVDMOS):an alternative to superjunction high voltageMOS power devices[J].Electron Device Letters IEEE,2001,22(8):407-409.。
综上所述,对具有低导通电阻的超结VDMOS器件的研究仍然是世界范围内的研究热点。
发明内容
有鉴于此,本发明的目的在于提供一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件。
为实现上述发明目的,本发明提供如下技术方案:
1、一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,包括N+型衬底1、P柱区2、N型漂移区3,二氧化硅隔离墙4、阶梯浓度多晶硅侧墙柱、有源顶层硅、源电极11、栅电极12以及漏电极13,所述有源顶层硅包括P+源区7、N+源区8、P-base区9以及栅氧区10;所述N+型衬底上依次排列P柱区2、N型漂移区3、二氧化硅隔离柱4、阶梯浓度多晶硅侧墙柱5和6;所述漏电极位13于N+型衬底1下方,所述阶梯浓度多晶硅侧墙柱根据浓度不同进行垂直分区,所述阶梯浓度多晶硅侧墙结构根据需要设置大于等于2的阶梯数。
优选的,所述P柱区2与N型漂移区3并列与P-base区9接触。
优选的,所述P+源区7与N+源区8并列后位于P-base区9内,所述P+源区7与N+源区8并列后上方与源电极11接触。
优选的,所述栅氧区10位于P-base区9上方,所述栅电极12位于栅氧区9内。
优选的,所述阶梯浓度多晶硅侧墙柱与二氧化硅隔离墙4并列后与源电极11接触。
优选的,所述N型漂移区3、P-base区9和二氧化硅隔离墙4并列后与栅氧区10接触。
优选的,所述栅氧区10位于源电极11下方。
优选的,所述阶梯浓度多晶硅侧墙柱的材料为P型掺杂多晶硅。
优选的,所述阶梯浓度多晶硅侧墙柱按照掺杂的浓度不同分为阶梯浓度多晶硅侧墙柱二6和阶梯浓度多晶硅侧墙柱一5,所述阶梯浓度多晶硅侧墙柱一5位于阶梯浓度多晶硅侧墙柱二6的正下方。
优选的,所述有源顶层硅的材料为Si、SiC和GaN类半导体材料中的一种或多种。
本发明的有益效果在于:
1、本发明的超结VDMOS器件在常规超结VDMOS器件基础上,增加了氧化硅薄墙及阶梯浓度的多晶硅侧墙结构。氧化硅薄墙起到隔离和增加耐压的作用,阶梯浓度的多晶硅侧墙结构能够有效的解决电荷非平衡问题。
2、相较于一些新型超结VDMOS器件结构,在上述多晶硅及氧化硅结构基础上,本发明提出的结构在漂移区中引入了P型柱形成漂移区中超结结构。在器件处于关态时,漂移区中的N型漂移区与P型柱形成一系列反向PN结结构,反向的PN结会承担一部分耐压,从而将器件的电场引入器件内部,优化了整个有源顶层硅内的电场分布,提升了器件的击穿电压。另一方面,漂移区中形成的超结结构辅助耗尽漂移区,从而提升漂移区的掺杂浓度,达到降低器件开态时导通电阻的目的。
附图说明
为了使本发明的目的、技术方案和有益效果更加清楚,本发明提供如下附图:
图1为典型的常规超结VDMOS器件图;
图2为Poly Flanked VDMOS器件图;
图3为边氧沟道结构VDMOS器件图;
图4为本发明的一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件图;
图5为具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件与Poly Flanked VDMOS器件在关态情况下器件内部中间位置(y=15μm)横截面的电场分布对比图;
图6为具有阶梯浓度多晶硅侧墙结构的超结VDMOS与典型的常规超结VDMOS器件在开态时的I-V曲线对比图;
图7为具有阶梯浓度多晶硅侧墙的超结VDMOS器件关态击穿时等势线分布图;
图8为具有阶梯浓度多晶硅侧墙的超结VDMOS器件开态时电流密度线分布图;
其中1为N+型衬底,2为P柱区,3为N型漂移区,4为二氧化硅隔离墙,5为阶梯浓度多晶硅侧墙柱一,6为阶梯浓度多晶硅侧墙柱二,7为P+源区,8为N+源区,9为P-base区,10为栅氧区,11为源电极、12为栅电极,13为漏电极,14为多晶硅侧墙,15为金属氧化层(MTO)。
具体实施方式
下面将对本发明的优选实施例进行详细的描述。实施例中未注明具体条件的实验方法,通常按照常规条件或按照制造厂商所建议的条件。
实施例1
本发明提出的一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件结构图,包括N+型衬底1、P柱区2、N型漂移区3,二氧化硅隔离墙4、阶梯浓度多晶硅侧墙柱、有源顶层硅、源电极11、栅电极12以及漏电极13,所述有源顶层硅包括P+源区7、N+源区8、P-base区9以及栅氧区10;所述N+型衬底上依次排列P柱区2、N型漂移区3、二氧化硅隔离柱4、阶梯浓度多晶硅侧墙柱5;所述漏电极位于N+型衬底下方13;阶梯浓度多晶硅侧墙柱的材料为P型掺杂,根据浓度不同进行垂直分区,如图4所示分为阶梯浓度多晶硅侧墙柱二6和阶梯浓度多晶硅侧墙柱一5,阶梯浓度多晶硅侧墙柱一5位于阶梯浓度多晶硅侧墙柱二6的正下方;P柱区2与N型漂移区3并列与P-base区9接触;P+源区7与N+源区8并列后位于P-base区9内,P+源区7与N+源区8并列后上方与源电极11接触;栅氧区10位于P-base区9上方,栅电极12位于栅氧区9内;阶梯浓度多晶硅侧墙柱与二氧化硅隔离墙4并列后与源电极11接触;N型漂移区3、P-base区9和二氧化硅隔离墙4并列后与栅氧区10接触;栅氧区10位于源电极11下方;有源顶层硅的材料为Si、SiC和GaN类半导体材料中的一种或多种。
本发明一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件的工作原理,以图4提出的一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件结构为例,对所提出的新器件结构的工作机理进行详细说明:在器件关态耐压时,漂移区中的N型柱与P型柱形成一系列反向PN结结构,反向的PN结会承担一部分耐压,从而将器件的电场引入器件内部,从而优化了整个器件的表面电场分布,提升了器件的击穿电压;其次,在器件处于开态时,漂移区中的P柱区以及P型多晶硅侧墙对N型漂移区起到辅助耗尽的作用,从而对应的最优漂移区掺杂浓度更高;多晶硅侧墙结构使P柱区的宽度等效增加,破坏了超结结构中电荷平衡的条件(即P型区与N型漂移区宽度相等、掺杂浓度相同),而阶梯浓度的多晶硅侧墙结构通过精确调节掺杂多晶硅的浓度差异,从而使P型区与N型区的电荷达到平衡,从而可以进一步提高漂移区的掺杂浓度,大大降低器件的导通电阻。
图5是本发明提出的具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件与图2所示的Poly Flanked VDMOS在关态情况下器件内部中间位置(y=15μm)横截面的电场分布的对比图,由该图可以看出本发明具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件将部分电场引入器件内部,从而增加了器件的击穿电压。
图6为本发明提出的具有阶梯浓度多晶硅侧墙结构的超结VDMOS与传统结构VDMOS器件开态时的I-V曲线对比图,从图中可以看出,本发明所提出的具有阶梯浓度多晶硅侧墙结构的超结VDMOS具有极低的导通电阻。相较典型的常规超结VDMOS器件,在击穿电压增加35%的同时,导通电阻降低了92%;而相较于Poly Flanked VDMOS器件,在保证相同击穿电压的情况下,导通电阻降低了54%。
结合图7显示的具有阶梯浓度多晶硅侧墙的超结VDMOS器件关态击穿时等势线分布图以及图8显示的具有阶梯浓度多晶硅侧墙的超结VDMOS器件开态时电流密度线分布图可以看出本发明的超结VDMOS器件能在提高器件击穿电压的同时降低器件的导通电阻,缓解了功率器件击穿电压与导通电阻之间的矛盾。
以上所述仅为本发明的优选实施例,并不用于限制本发明,显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (10)
1.一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,包括N+型衬底(1)、P柱区(2)、N型漂移区(3),二氧化硅隔离墙(4)、阶梯浓度多晶硅侧墙柱、有源顶层硅、源电极(11)、栅电极(12)以及漏电极(13),所述有源顶层硅包括P+源区(7)、N+源区(8)、P-base区(9)以及栅氧区(10);所述N+型衬底上依次排列P柱区(2)、N型漂移区(3)、二氧化硅隔离柱(4)、阶梯浓度多晶硅侧墙柱一(5)、阶梯浓度多晶硅侧墙柱二(6);所述漏电极(13)位于N+型衬底(1)下方,所述阶梯浓度多晶硅侧墙柱根据浓度不同进行垂直分区,所述阶梯浓度多晶硅侧墙结构根据需要设置大于等于2的阶梯数。
2.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述P柱区(2)与N型漂移区(3)并列与P-base区(9)接触。
3.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述P+源区(7)与N+源区(8)并列后位于P-base区(9)内,所述P+源区(7)与N+源区(8)并列后上方与源电极(11)接触。
4.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述栅氧区(10)位于P-base区(9)上方,所述栅电极(12)位于栅氧区(9)内。
5.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述阶梯浓度多晶硅侧墙柱与二氧化硅隔离墙(4)并列后与源电极(11)接触。
6.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述N型漂移区(3)、P-base区(9)和二氧化硅隔离墙(4)并列后与栅氧区(10)接触。
7.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述栅氧区(10)位于源电极(11)下方。
8.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述阶梯浓度多晶硅侧墙柱一(5)和阶梯浓度多晶硅侧墙柱二(6)的材料为P型掺杂多晶硅。
9.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述阶梯浓度多晶硅侧墙柱按照掺杂的浓度不同分为阶梯浓度多晶硅侧墙柱二(6)和阶梯浓度多晶硅侧墙柱一(5),所述阶梯浓度多晶硅侧墙柱一(5)位于阶梯浓度多晶硅侧墙柱二(6)的正下方。
10.根据权利要求1所述一种具有阶梯浓度多晶硅侧墙结构的超结VDMOS器件,其特征在于,所述有源顶层硅的材料为Si、SiC和GaN类半导体材料中的一种或多种。
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