CN109192826A - A kind of LED epitaxial slice and preparation method thereof - Google Patents
A kind of LED epitaxial slice and preparation method thereof Download PDFInfo
- Publication number
- CN109192826A CN109192826A CN201810746206.7A CN201810746206A CN109192826A CN 109192826 A CN109192826 A CN 109192826A CN 201810746206 A CN201810746206 A CN 201810746206A CN 109192826 A CN109192826 A CN 109192826A
- Authority
- CN
- China
- Prior art keywords
- sublayer
- layer
- led epitaxial
- type semiconductor
- stress release
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 70
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 70
- 239000004411 aluminium Substances 0.000 claims abstract description 70
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 65
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 64
- 239000004065 semiconductor Substances 0.000 claims abstract description 53
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims abstract description 36
- 239000000463 material Substances 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 239000011787 zinc oxide Substances 0.000 claims abstract description 18
- 229910052738 indium Inorganic materials 0.000 claims description 13
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 13
- 229910052594 sapphire Inorganic materials 0.000 abstract description 27
- 239000010980 sapphire Substances 0.000 abstract description 27
- 230000007547 defect Effects 0.000 abstract description 24
- 230000000694 effects Effects 0.000 abstract description 16
- 230000006798 recombination Effects 0.000 abstract description 8
- 238000005215 recombination Methods 0.000 abstract description 8
- 230000005855 radiation Effects 0.000 abstract description 7
- 230000003760 hair shine Effects 0.000 abstract description 3
- 230000004888 barrier function Effects 0.000 description 16
- 239000013078 crystal Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 239000002019 doping agent Substances 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000006872 improvement Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 3
- 238000000137 annealing Methods 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 235000013399 edible fruits Nutrition 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 241001062009 Indigofera Species 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- HQWPLXHWEZZGKY-UHFFFAOYSA-N diethylzinc Chemical compound CC[Zn]CC HQWPLXHWEZZGKY-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000010437 gem Substances 0.000 description 1
- 229910001751 gemstone Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of LED epitaxial slices and preparation method thereof, belong to technical field of semiconductors.The LED epitaxial slice includes substrate, buffer layer, n type semiconductor layer, stress release layer, active layer and p type semiconductor layer, and the buffer layer, the n type semiconductor layer, the stress release layer, the active layer and the p type semiconductor layer stack gradually over the substrate；The stress release layer includes multiple first sublayers and multiple second sublayers, the multiple first sublayer and the multiple alternately laminated setting of second sublayer；The material of first sublayer is the zinc oxide mixed with aluminium element, and the material of second sublayer is the gallium nitride mixed with phosphide element.The present invention can achieve good stress release effect, and lattice mismatch generates between sapphire and gallium nitride stress and defect is effectively avoided to extend to active layer, and the radiation recombination for being conducive to electrons and holes in active layer shines, and improve the luminous efficiency of light emitting diode.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of LED epitaxial slice and preparation method thereof.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is electroluminescent using the PN junction of semiconductor
A kind of light emitting semiconductor device made of principle of luminosity.Epitaxial wafer is the primary finished product in light emitting diode preparation process.
Existing epitaxial wafer includes substrate, buffer layer, n type semiconductor layer, active layer and p type semiconductor layer, buffer layer, N
Type semiconductor layer, active layer and p type semiconductor layer stack gradually on substrate.P type semiconductor layer carries out compound hair for providing
The hole of light, n type semiconductor layer are used to provide the electronics for carrying out recombination luminescence, and active layer is used to carry out the radiation of electrons and holes
Recombination luminescence, substrate are used to provide growing surface for epitaxial material；The material of substrate generally selects sapphire, n type semiconductor layer
Deng material generally select gallium nitride, sapphire and gallium nitride are dissimilar materials, there is biggish lattice mismatch between the two, are delayed
Layer is rushed for alleviating the lattice mismatch between substrate and n type semiconductor layer.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The stress and defect that lattice mismatch generates between sapphire and gallium nitride can extend with epitaxial growth, sapphire
The stress and defect that lattice mismatch generates between gallium nitride extend to active layer, and the crystal quality that will cause active layer is poor,
The radiation recombination for influencing electrons and holes in active layer shines, and reduces the luminous efficiency of light emitting diode.
In order to avoid the stress of lattice mismatch generation and defect extend to active layer between sapphire and gallium nitride, it will usually
Stress release layer is set between n type semiconductor layer and active layer.Stress release layer includes alternately stacked multiple InGaNs
Layer and multiple gallium nitride layers, have the defects that inside gallium indium nitride layer certain, can discharge lattice between sapphire and gallium nitride
The stress that mismatch generates, and gallium nitride layer and gallium indium nitride layer is alternately laminated, it may be implemented and n type semiconductor layer and active layer
Crystal match.But the stress release effect of stress release layer need to be improved.
Summary of the invention
The embodiment of the invention provides a kind of LED epitaxial slices and preparation method thereof, are able to solve prior art indigo plant
Between jewel and gallium nitride lattice mismatch generate stress and defective effect active layer in electrons and holes radiation recombination shine,
The problem for causing the luminous efficiency of LED lower.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of LED epitaxial slice, the LED epitaxial slice packets
Include substrate, buffer layer, n type semiconductor layer, stress release layer, active layer and p type semiconductor layer, the buffer layer, the N-type half
Conductor layer, the stress release layer, the active layer and the p type semiconductor layer stack gradually over the substrate；It is described to answer
Power releasing layer includes multiple first sublayers and multiple second sublayers, and the multiple first sublayer and the multiple second sublayer replace
It is stacked；The material of first sublayer is the zinc oxide mixed with aluminium element, and the material of second sublayer is mixed with indium member
The gallium nitride of element.
Optionally, in the multiple second sublayer indium component molar content along the LED epitaxial slice stacking
Direction successively increases.
Preferably, in the multiple first sublayer aluminium component molar content along the LED epitaxial slice stacking
Direction successively reduces.
Optionally, the molar content of aluminium component is less than or equal to 5% in first sublayer.
Optionally, the molar content of indium component is less than or equal to 3% in second sublayer.
Optionally, first sublayer with a thickness of 5nm~30nm.
Optionally, second sublayer with a thickness of 5nm~30nm.
Optionally, the stress release layer with a thickness of 0.2 μm~1 μm.
On the other hand, the embodiment of the invention provides a kind of preparation method of LED epitaxial slice, the preparation sides
Method includes:
One substrate is provided；
Successively grown buffer layer, n type semiconductor layer, stress release layer, active layer and P-type semiconductor over the substrate
Layer；
Wherein, the stress release layer includes multiple first sublayers and multiple second sublayers, the multiple first sublayer and
The multiple alternately laminated setting of second sublayer；The material of first sublayer be mixed with aluminium element zinc oxide, described second
The material of sublayer is the gallium nitride mixed with phosphide element.
Optionally, the growth temperature of the stress release layer is 800 DEG C~1000 DEG C, the growth pressure of the stress release layer
Power is 100torr~500torr.
Technical solution provided in an embodiment of the present invention has the benefit that
By the way that stress release layer is changed to replace by the zinc oxide film mixed with aluminium element and mixed with the gallium nitride layer of phosphide element
Be laminated, mixed with the zinc oxide film of aluminium element defect extended there is barrier effect, can to avoid sapphire and gallium nitride it
Between lattice mismatch generate stress and defect continue to extend, promoted epitaxial wafer entirety lattice quality, effectively delay V-type defect
It generates, to reduce the generation of V-type defect；It is certain mixed with haveing the defects that inside the gallium nitride layer of phosphide element simultaneously, it can release
The stress that lattice mismatch generates between sapphire and gallium nitride is put, what lattice mismatch generated between alleviation sapphire and gallium nitride lacks
It falls into；Therefore the zinc oxide film mixed with aluminium element and the gallium nitride layer mixed with phosphide element is alternately laminated, it on the one hand can use and mix
There is the zinc oxide film of aluminium element to reduce the range that lattice mismatch influences between sapphire and gallium nitride, on the other hand can use and mix
There is the gallium nitride layer of phosphide element to reduce lattice mismatch effect between sapphire and gallium nitride, two aspect comprehensive functions can
To reach good stress release effect, lattice mismatch generates between sapphire and gallium nitride stress and defect is effectively avoided to prolong
Active layer is reached, the radiation recombination for being conducive to electrons and holes in active layer shines, and improves the luminous efficiency of light emitting diode.And
And the zinc oxide film for adulterating aluminium element can become the accumulating layer of carrier, it will be mixed with the zinc oxide film of aluminium element and mixed with indium member
The gallium nitride layer of element is alternately laminated, and the carrier of accumulation can be made to sprawl rapidly in two-dimensional surface, improve two dimensional expansions of electric current
Exhibition, promotes the antistatic effect of light emitting diode.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is the structural schematic diagram of stress release layer provided in an embodiment of the present invention；
Fig. 3 is a kind of showing for variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
It is intended to；
Fig. 4 is another variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
Schematic diagram；
Fig. 5 is another variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
Schematic diagram；
Fig. 6 is another variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
Schematic diagram；
Fig. 7 is a kind of flow chart of the preparation method of LED epitaxial slice provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
The embodiment of the invention provides a kind of LED epitaxial slice, Fig. 1 is a kind of hair provided in an embodiment of the present invention
The structural schematic diagram of optical diode epitaxial wafer, referring to Fig. 1, which includes substrate 10, buffer layer 20, N-type
Semiconductor layer 30, stress release layer 40, active layer 50 and p type semiconductor layer 60, buffer layer 20, n type semiconductor layer 30, stress are released
Layer 40, active layer 50 and p type semiconductor layer 60 is put to be sequentially laminated on substrate 10.
Fig. 2 is that the structural schematic diagram of stress release layer provided in an embodiment of the present invention in the present embodiment, is answered referring to fig. 2
Power releasing layer 40 includes multiple first sublayers 41 and multiple second sublayers 42, and multiple first sublayers 41 and multiple second sublayers 42 are handed over
For being stacked.The material of first sublayer 41 is the zinc oxide mixed with aluminium element, and the material of the second sublayer 42 is mixed with phosphide element
Gallium nitride.
The embodiment of the present invention is by being changed to stress release layer by the zinc oxide film mixed with aluminium element and mixed with phosphide element
Gallium nitride layer is alternately laminated to be formed, and extends defect with barrier effect mixed with the zinc oxide film of aluminium element, can be to avoid blue precious
The stress and defect that lattice mismatch generates between stone and gallium nitride continue to extend, and promote the lattice quality of epitaxial wafer entirety, effectively
Delay the generation of V-type defect, to reduce the generation of V-type defect；It is certain mixed with existing inside the gallium nitride layer of phosphide element simultaneously
Defect, the stress that lattice mismatch between sapphire and gallium nitride generates can be discharged, alleviated brilliant between sapphire and gallium nitride
The defect that lattice mismatch generates；Therefore the zinc oxide film mixed with aluminium element and the gallium nitride layer mixed with phosphide element is alternately laminated, one
Aspect can use the range for reducing lattice mismatch influence between sapphire and gallium nitride mixed with the zinc oxide film of aluminium element, another
Aspect can use the gallium nitride layer mixed with phosphide element and reduce lattice mismatch effect between sapphire and gallium nitride, and two
Aspect comprehensive function can achieve good stress release effect, and lattice mismatch between sapphire and gallium nitride is effectively avoided to generate
Stress and defect extend to active layer, be conducive to electrons and holes in active layer radiation recombination shine, improve light-emitting diodes
The luminous efficiency of pipe.And the zinc oxide film for adulterating aluminium element can become the accumulating layer of carrier, and it will be mixed with the oxygen of aluminium element
Change zinc layers and alternately laminated mixed with the gallium nitride layer of phosphide element, the carrier of accumulation can be made to sprawl rapidly in two-dimensional surface,
The two-dimensional expansion for improving electric current, promotes the antistatic effect of light emitting diode.
Optionally, the molar content of aluminium component can be less than or equal to 5% in the first sublayer 41.
If the molar content of aluminium component is greater than 5% in the first sublayer, may due in the first sublayer aluminium component rub
Your content is too big and causes the lattice mismatch between the first sublayer and the second sublayer larger, additional to generate stress and defect, causes
The crystal quality of stress release layer is poor, and preferable crystal basis can not be provided for active layer, influences shining for light emitting diode
Efficiency.
Fig. 3 is that a kind of variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention shows
It is intended to, referring to Fig. 3, in a kind of implementation of the present embodiment, the molar content of aluminium component can be in each first sublayer 41
It is identical, it is relatively simple in realization and conveniently.
For example, stress release layer includes the first sublayer 41a, the second sublayer 42a, the first sublayer 41b, second stacked gradually
Sublayer 42b, the first sublayer 41c, the second sublayer 42c, the first sublayer 41d, the second sublayer 42d, the first sublayer 41e, the second sublayer
The molar content of aluminium component is 3% in 42e, the first sublayer 41f and the second sublayer 42f, the first sublayer 41a, in the first sublayer 41b
The molar content of aluminium component is 3%, and the molar content of aluminium component is 3% in the first sublayer 41c, aluminium component in the first sublayer 41d
Molar content be 3%, the molar content of aluminium component is 3% in the first sublayer 41e, mole of aluminium component in the first sublayer 41f
Content is 3%.
Fig. 4 is another variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
Schematic diagram, referring to fig. 4, in another implementation of the present embodiment, the molar content of aluminium component in multiple first sublayers 41
It can successively increase along the stacking direction of the LED epitaxial slice, the improvement effect of lattice mismatch between sapphire and gallium nitride
Fruit is preferable.
For example, stress release layer includes the first sublayer 41a, the second sublayer 42a, the first sublayer 41b, second stacked gradually
Sublayer 42b, the first sublayer 41c, the second sublayer 42c, the first sublayer 41d, the second sublayer 42d, the first sublayer 41e, the second sublayer
The molar content of aluminium component is 1.5% in 42e, the first sublayer 41f and the second sublayer 42f, the first sublayer 41a, the first sublayer 41b
The molar content of middle aluminium component is 2%, and the molar content of aluminium component is 2.5% in the first sublayer 41c, aluminium in the first sublayer 41d
The molar content of component is 3%, and the molar content of aluminium component is 3.5% in the first sublayer 41e, aluminium component in the first sublayer 41f
Molar content be 4%.
Fig. 5 is another variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
Schematic diagram, referring to Fig. 5, in another implementation of the present embodiment, the molar content of aluminium component in multiple first sublayers 41
It can successively reduce along the stacking direction of the LED epitaxial slice, the improvement effect of lattice mismatch between sapphire and gallium nitride
Fruit is preferable.
For example, stress release layer includes the first sublayer 41a, the second sublayer 42a, the first sublayer 41b, second stacked gradually
Sublayer 42b, the first sublayer 41c, the second sublayer 42c, the first sublayer 41d, the second sublayer 42d, the first sublayer 41e, the second sublayer
The molar content of aluminium component is 4% in 42e, the first sublayer 41f and the second sublayer 42f, the first sublayer 41a, in the first sublayer 41b
The molar content of aluminium component is 3.5%, and the molar content of aluminium component is 3% in the first sublayer 41c, aluminium group in the first sublayer 41d
The molar content divided is 2.5%, and the molar content of aluminium component is 2% in the first sublayer 41e, aluminium component in the first sublayer 41f
Molar content is 1.5%.
Preferably, the molar content of indium component can be along the stacking of the LED epitaxial slice in multiple second sublayers 42
Direction successively increases.
It or include the first sublayer 41a stacked gradually, the second sublayer 42a, the first sublayer 41b, the with stress release layer
Two sublayer 42b, the first sublayer 41c, the second sublayer 42c, the first sublayer 41d, the second sublayer 42d, the first sublayer 41e, the second son
For layer 42e, the first sublayer 41f and the second sublayer 42f, the molar content of aluminium component is 0.5%, second in the second sublayer 42a
The molar content of aluminium component is 1% in sublayer 42b, and the molar content of aluminium component is 1.5% in the second sublayer 42c, the second sublayer
The molar content of aluminium component is 2% in 42d, and the molar content of aluminium component is 2.5% in the second sublayer 42e, in the second sublayer 42f
The molar content of aluminium component is 3%.
The molar content of indium component successively increases along the stacking direction of the LED epitaxial slice in multiple second sublayers,
Stress release layer can gradually relax towards the Quantum Well of high indium component in active layer, to preferably discharge answering in epitaxial wafer
Power.The molar content of aluminium component successively reduces along the stacking direction of the LED epitaxial slice in multiple first sublayers simultaneously,
The energy band of multiple first sublayers can be reduced with staged, and the mismatch between the first sublayer and the second sublayer can achieve minimum,
The first sublayer will not be influenced to the barrier effect of defect simultaneously.
Fig. 6 is another variation pattern of the molar content of aluminium component in stress release layer provided in an embodiment of the present invention
Schematic diagram, referring to Fig. 6, in another implementation of the present embodiment, the molar content of aluminium component in each first sublayer 41
It can be one in the first setting value and the second setting value, the first setting value and the second setting value are different, and two neighboring the
The molar content of aluminium component is different in one sublayer 41, and the improvement of lattice mismatch is preferable between sapphire and gallium nitride.
For example, stress release layer includes the first sublayer 41a, the second sublayer 42a, the first sublayer 41b, second stacked gradually
Sublayer 42b, the first sublayer 41c, the second sublayer 42c, the first sublayer 41d, the second sublayer 42d, the first sublayer 41e, the second sublayer
The molar content of aluminium component is 2% in 42e, the first sublayer 41f and the second sublayer 42f, the first sublayer 41a, in the first sublayer 41b
The molar content of aluminium component is 4%, and the molar content of aluminium component is 2% in the first sublayer 41c, aluminium component in the first sublayer 41d
Molar content be 4%, the molar content of aluminium component is 2% in the first sublayer 41e, mole of aluminium component in the first sublayer 41f
Content is 4%.
Optionally, the molar content of indium component can be less than or equal to 3% in the second sublayer 42.
If the molar content of indium component is greater than 3% in the second sublayer, may due in the second sublayer indium component rub
Your content is too big and causes the lattice mismatch between the first sublayer and the second sublayer larger, additional to generate stress and defect, causes
The crystal quality of stress release layer is poor, and preferable crystal basis can not be provided for active layer, influences shining for light emitting diode
Efficiency.
Optionally, the thickness of the first sublayer 41 can be 5nm~30nm.
If the thickness of the first sublayer is less than 5nm, can not may effectively stop since the thickness of the first sublayer is too small
The stress and defect that lattice mismatch generates between sapphire and gallium nitride extend, the final luminous efficiency for influencing light emitting diode；
If the thickness of the first sublayer is greater than 30nm, the first sublayer and the second son may be led to since the thickness of the first sublayer is too big
Lattice mismatch between layer is larger, additional to generate stress and defect, causes the crystal quality of stress release layer poor, can not be to have
Active layer provides preferable crystal basis, influences the luminous efficiency of light emitting diode.
Optionally, the thickness of the second sublayer 42 can be 5nm~30nm.
If the thickness of the second sublayer is less than 5nm, may can not be released effectively since the thickness of the second sublayer is too small
What lattice mismatch generated between the stress and alleviation sapphire and gallium nitride that lattice mismatch generates between sapphire and gallium nitride lacks
It falls into, the final luminous efficiency for influencing light emitting diode；If the thickness of the second sublayer is greater than 30nm, may be due to the second sublayer
Thickness it is too big and cause the lattice mismatch between the first sublayer and the second sublayer larger, it is additional to generate stress and defect, cause
The crystal quality of stress release layer is poor, and preferable crystal basis can not be provided for active layer, influences shining for light emitting diode
Efficiency.
Optionally, the thickness of stress release layer 40 can be 0.2 μm~1 μm.
If the thickness of stress release layer less than 0.2 μm, may can not have since the thickness of stress release layer is too small
Effect alleviates the lattice mismatch between sapphire and gallium nitride；If the thickness of stress release layer is greater than 1 μm, may be due to stress
The thickness of releasing layer is too big and causes the waste of material, it is also possible to which luminous efficiency and forward voltage to light emitting diode cause to bear
It influences.
Specifically, the quantity of the first sublayer 41 is identical as the quantity of the second sublayer 42, and the quantity of the second sublayer 42 can be 4
It is a~50, preferably 30.
Specifically, the material of substrate 10 can use sapphire (main component Al2O3), it is preferred to use [0001] crystal orientation
Sapphire.The material of buffer layer 20 can use gallium nitride (GaN).The material of n type semiconductor layer 30 can use n-type doping
Gallium nitride.Active layer 50 may include that multiple Quantum Well and multiple quantum are built, and multiple Quantum Well and multiple quantum build alternating layer
Folded setting；The material of Quantum Well can use InGaN (InGaN), and the material that quantum is built can use gallium nitride.P-type is partly led
The material of body layer 60 can be using the gallium nitride of p-type doping.
Further, the thickness of buffer layer 20 can be 15nm~35nm, preferably 25nm.The thickness of n type semiconductor layer 30
Degree can be 1 μm~5 μm, preferably 3 μm；The doping concentration of N type dopant can be 10 in n type semiconductor layer 3018cm-3~
1019cm-3, preferably 5*1018cm-3.The thickness of Quantum Well can be 2nm~4nm, preferably 3nm；The thickness that quantum is built can be with
For 9nm~20nm, preferably 15nm；The quantity of Quantum Well is identical as the quantity that quantum is built, quantum build quantity can for 5~
11, preferably 8.The thickness of p type semiconductor layer 60 can be 100nm~800nm, preferably 450nm；P type semiconductor layer
The doping concentration of P-type dopant can be 10 in 6019/cm3~1020/cm3, preferably 5*1019cm-3。
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include undoped gallium nitride 71,
Undoped gallium nitride layer 71 is arranged between buffer layer 20 and n type semiconductor layer 30, to alleviate between substrate and n type semiconductor layer
Lattice mismatch.
Further, the thickness of undoped gallium nitride layer 71 can be 1 μm~5 μm, preferably 3 μm.
In specific implementation, buffer layer is the gallium nitride of the layer of low-temperature epitaxy on substrate first, therefore also referred to as
For low temperature buffer layer.The longitudinal growth for carrying out gallium nitride in low temperature buffer layer again will form multiple mutually independent three-dimensional islands
Structure, referred to as three-dimensional nucleating layer；Then gallium nitride is carried out between each three-dimensional island structure on all three-dimensional island structures
Cross growth, form two-dimension plane structure, referred to as two-dimentional retrieving layer；It is finally one layer of high growth temperature thicker on two-dimensional growth layer
Gallium nitride, referred to as high temperature buffer layer.Three-dimensional nucleating layer, two-dimentional retrieving layer and high temperature buffer layer are referred to as not in the present embodiment
Doped gallium nitride layer.
Optionally, as shown in Figure 1, the LED epitaxial slice can also include electronic barrier layer 72, electronic barrier layer
72 are arranged between active layer 50 and p type semiconductor layer 60, carry out into p type semiconductor layer with hole to avoid electron transition non-
Radiation recombination influences the luminous efficiency of light emitting diode.
Specifically, the material of electronic barrier layer 72 can be using the aluminium gallium nitride alloy (AlGaN) of p-type doping, such as AlyGa1-yN,
0.1 < y < 0.5.
Further, the thickness of electronic barrier layer 72 can be 50nm~150nm, preferably 100nm；Electronic barrier layer 72
The doping concentration of middle P-type dopant can be 1017/cm3~1018/cm3, preferably 5*1017/cm3。
Preferably, as shown in Figure 1, the LED epitaxial slice can also include low temperature P-type layer 73, low temperature P-type layer 73
It is arranged between active layer 50 and electronic barrier layer 72, is caused in active layer to avoid the higher growth temperature of electronic barrier layer
Phosphide atom is precipitated, and influences the luminous efficiency of light emitting diode.
Specifically, the material of low temperature P-type layer 73 can be identical as p type semiconductor layer 60, is in the present embodiment p-type doping
Gallium nitride.
Further, the thickness of low temperature P-type layer 73 can be 50nm~150nm, preferably 100nm；In low temperature P-type layer 73
The doping concentration of P-type dopant can be 1020/cm3~1021/cm3, preferably 5*1020/cm3。
Optionally, as shown in Figure 1, the LED epitaxial slice can also include p-type contact layer 74, p-type contact layer 74
It is laid on p type semiconductor layer 60, to form Europe between the electrode or transparent conductive film that are formed in chip fabrication technique
Nurse contact.
Specifically, the material of p-type contact layer 74 can be using the InGaN of p-type doping.
Further, the thickness of p-type contact layer 74 can be 5nm~200nm, preferably 102.5nm；P-type contact layer 74
The doping concentration of middle P-type dopant can be 1021/cm3~1022/cm3, preferably 6*1021/cm3。
The embodiment of the invention provides a kind of preparation method of LED epitaxial slice, it is suitable for preparing shown in FIG. 1
LED epitaxial slice.Fig. 7 is a kind of process of the preparation method of LED epitaxial slice provided in an embodiment of the present invention
Figure, referring to Fig. 7, which includes:
Step 201: a substrate is provided.
Optionally, which may include:
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), in hydrogen atmosphere to substrate carry out 6 minutes~
It makes annealing treatment within 10 minutes (preferably 8 minutes)；
Nitrogen treatment is carried out to substrate.
The surface for cleaning substrate through the above steps avoids being conducive to the life for improving epitaxial wafer in impurity incorporation epitaxial wafer
Long quality.
Step 202: successively grown buffer layer, n type semiconductor layer, stress release layer, active layer and p-type are partly led on substrate
Body layer.
In the present embodiment, stress release layer includes multiple first sublayers and multiple second sublayers, multiple first sublayers and
Multiple alternately laminated settings of second sublayer.The material of first sublayer is the zinc oxide mixed with aluminium element, and the material of the second sublayer is
Mixed with the gallium nitride of phosphide element.
Optionally, the growth temperature of stress release layer can be 800 DEG C~1000 DEG C, realize that effect is preferable, and use
Unified growth temperature, it is fairly simple in realization and conveniently.
Optionally, the growth pressure of stress release layer can be 100torr~500torr, realize that effect is preferable, and adopt
It is fairly simple in realization and conveniently with unified growth pressure.
Specifically, which may include:
The first step, controlled at 400 DEG C~600 DEG C (preferably 500 DEG C), pressure is that 400torr~600torr is (excellent
It is selected as 500torr), grown buffer layer on substrate；
Second step, controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure is 100torr~500torr
(preferably 300torr), grows n type semiconductor layer on the buffer layer；
Third step, the growth stress releasing layer on n type semiconductor layer；
4th step, grows active layer on stress release layer；Wherein, the growth temperature of Quantum Well is 720 DEG C~829 DEG C
(preferably 770 DEG C), pressure are 100torr~500torr (preferably 300torr)；Quantum build growth temperature be 850 DEG C~
959 DEG C (preferably 900 DEG C), pressure is 100torr~500torr (preferably 300torr)；
5th step, controlled at 850 DEG C~1080 DEG C (preferably 950 DEG C), pressure is that 100torr~300torr is (excellent
It is selected as 200torr), the growing P-type semiconductor layer on active layer.
Optionally, after the first step, which can also include:
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 400torr~600torr (preferably
500torr), the in-situ annealing carried out 5 minutes~10 minutes (preferably 8 minutes) to buffer layer is handled.
Optionally, before second step, which can also include:
Undoped gallium nitride layer is grown on the buffer layer.
Correspondingly, n type semiconductor layer is grown on undoped gallium nitride layer.
Specifically, undoped gallium nitride layer is grown on the buffer layer, may include:
Controlled at 1000 DEG C~1100 DEG C (preferably 1050 DEG C), pressure be 100torr~500torr (preferably
300torr), undoped gallium nitride layer is grown on the buffer layer.
Optionally, before the 5th step, which can also include:
Electronic barrier layer is grown on active layer.
Correspondingly, p type semiconductor layer is grown on electronic barrier layer.
Specifically, electronic barrier layer is grown on active layer, may include:
Controlled at 850 DEG C~1080 DEG C (preferably 950 DEG C), pressure be 200torr~500torr (preferably
350torr), electronic barrier layer is grown on active layer.
Optionally, before growing electronic barrier layer on active layer, which can also include:
The growing low temperature P-type layer on active layer.
Correspondingly, electronic barrier layer is grown in low temperature P-type layer.
Specifically, the growing low temperature P-type layer on active layer may include:
Controlled at 500 DEG C~800 DEG C (preferably 675 DEG C), pressure be 50torr~500torr (preferably
300torr), the growing low temperature P-type layer on active layer.
Optionally, after the 5th step, which can also include:
The growing P-type contact layer on p type semiconductor layer.
Specifically, the growing P-type contact layer on p type semiconductor layer may include:
Controlled at 800 DEG C~1150 DEG C (preferably 975 DEG C), pressure be 50torr~300torr (preferably
175torr), the growing P-type contact layer on p type semiconductor layer.
It should be noted that after above-mentioned epitaxial growth terminates, can first by temperature be reduced to 650 DEG C~850 DEG C (preferably
It is 750 DEG C), the annealing of 5 minutes~15 minutes (preferably 10 minutes) is carried out to epitaxial wafer in nitrogen atmosphere, then again
The temperature of epitaxial wafer is reduced to room temperature.
Control temperature, pressure each mean temperature, pressure in the reaction chamber of control growth epitaxial wafer, and specially metal is organic
Compound chemical gaseous phase deposition (English: Metal-organic Chemical Vapor Deposition, referred to as: MOCVD) set
Standby reaction chamber.Using trimethyl gallium or triethyl-gallium as gallium source when realization, high-purity ammonia is as nitrogen source, and trimethyl indium is as indium
Source, trimethyl aluminium is as silicon source, and water is as oxygen source, and for diethyl zinc as zinc source, N type dopant selects silane, P-type dopant choosing
With two luxuriant magnesium.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of LED epitaxial slice, the LED epitaxial slice includes substrate, buffer layer, n type semiconductor layer, answers
Power releasing layer, active layer and p type semiconductor layer, the buffer layer, the stress release layer, described have the n type semiconductor layer
Active layer and the p type semiconductor layer stack gradually over the substrate；It is characterized in that, the stress release layer includes multiple
One sublayer and multiple second sublayers, the multiple first sublayer and the multiple alternately laminated setting of second sublayer；Described first
The material of sublayer is the zinc oxide mixed with aluminium element, and the material of second sublayer is the gallium nitride mixed with phosphide element.
2. LED epitaxial slice according to claim 1, which is characterized in that indium component in the multiple second sublayer
Molar content successively increase along the stacking direction of the LED epitaxial slice.
3. LED epitaxial slice according to claim 2, which is characterized in that aluminium component in the multiple first sublayer
Molar content successively reduce along the stacking direction of the LED epitaxial slice.
4. described in any item LED epitaxial slices according to claim 1~3, which is characterized in that in first sublayer
The molar content of aluminium component is less than or equal to 5%.
5. described in any item LED epitaxial slices according to claim 1~3, which is characterized in that in second sublayer
The molar content of indium component is less than or equal to 3%.
6. described in any item LED epitaxial slices according to claim 1~3, which is characterized in that first sublayer
With a thickness of 5nm~30nm.
7. described in any item LED epitaxial slices according to claim 1~3, which is characterized in that second sublayer
With a thickness of 5nm~30nm.
8. described in any item LED epitaxial slices according to claim 1~3, which is characterized in that the stress release layer
With a thickness of 0.2 μm~1 μm.
9. a kind of preparation method of LED epitaxial slice, which is characterized in that the preparation method includes:
One substrate is provided；
Successively grown buffer layer, n type semiconductor layer, stress release layer, active layer and p type semiconductor layer over the substrate；
Wherein, the stress release layer includes multiple first sublayers and multiple second sublayers, the multiple first sublayer and described
Multiple alternately laminated settings of second sublayer；The material of first sublayer is the zinc oxide mixed with aluminium element, second sublayer
Material be mixed with phosphide element gallium nitride.
10. preparation method according to claim 9, which is characterized in that the growth temperature of the stress release layer is 800 DEG C
~1000 DEG C, the growth pressure of the stress release layer is 100torr~500torr.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810746206.7A CN109192826B (en) | 2018-07-09 | 2018-07-09 | A kind of LED epitaxial slice and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810746206.7A CN109192826B (en) | 2018-07-09 | 2018-07-09 | A kind of LED epitaxial slice and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109192826A true CN109192826A (en) | 2019-01-11 |
| CN109192826B CN109192826B (en) | 2019-11-29 |
Family
ID=64936315
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810746206.7A Active CN109192826B (en) | 2018-07-09 | 2018-07-09 | A kind of LED epitaxial slice and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109192826B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110066986A (en) * | 2019-04-29 | 2019-07-30 | 复旦大学 | A method of utilizing the GaON film of atomic layer deposition one-step method controllable preparation difference oxygen and nitrogen content |
| CN111933761A (en) * | 2020-07-23 | 2020-11-13 | 厦门士兰明镓化合物半导体有限公司 | Epitaxial structure and manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104022198A (en) * | 2014-05-30 | 2014-09-03 | 华灿光电(苏州）有限公司 | Epitaxial wafer of GaN-based light emitting diode, and manufacturing method thereof |
| CN104103723A (en) * | 2014-08-11 | 2014-10-15 | 安徽三安光电有限公司 | Gallium nitride light emitting diode and manufacturing method thereof |
| CN107658374A (en) * | 2017-08-22 | 2018-02-02 | 华灿光电（浙江）有限公司 | Epitaxial wafer of light emitting diode and preparation method thereof |
-
2018
- 2018-07-09 CN CN201810746206.7A patent/CN109192826B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104022198A (en) * | 2014-05-30 | 2014-09-03 | 华灿光电(苏州）有限公司 | Epitaxial wafer of GaN-based light emitting diode, and manufacturing method thereof |
| CN104103723A (en) * | 2014-08-11 | 2014-10-15 | 安徽三安光电有限公司 | Gallium nitride light emitting diode and manufacturing method thereof |
| CN107658374A (en) * | 2017-08-22 | 2018-02-02 | 华灿光电（浙江）有限公司 | Epitaxial wafer of light emitting diode and preparation method thereof |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110066986A (en) * | 2019-04-29 | 2019-07-30 | 复旦大学 | A method of utilizing the GaON film of atomic layer deposition one-step method controllable preparation difference oxygen and nitrogen content |
| CN111933761A (en) * | 2020-07-23 | 2020-11-13 | 厦门士兰明镓化合物半导体有限公司 | Epitaxial structure and manufacturing method thereof |
| CN111933761B (en) * | 2020-07-23 | 2022-04-26 | 厦门士兰明镓化合物半导体有限公司 | Epitaxial structure and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109192826B (en) | 2019-11-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103337573B (en) | The epitaxial wafer of semiconductor light-emitting-diode and manufacture method thereof | |
| CN108461592B (en) | A kind of LED epitaxial slice and its manufacturing method | |
| CN109786529A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109860358B (en) | Gallium nitride-based light emitting diode epitaxial wafer and preparation method thereof | |
| CN109860359A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109216514A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109346576A (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN109346583A (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN109192831A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109256445A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109473514A (en) | A kind of gallium nitride based LED epitaxial slice and its manufacturing method | |
| CN116598396A (en) | LED epitaxial wafer, preparation method thereof and LED | |
| CN109192826B (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN109671817A (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN109103312A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109346568A (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN109273571A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109473516A (en) | A kind of gallium nitride based LED epitaxial slice and its growing method | |
| CN111883623B (en) | Near ultraviolet light emitting diode epitaxial wafer and preparation method thereof | |
| CN109309150A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109686823A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109087977A (en) | A kind of gallium nitride based LED epitaxial slice and preparation method thereof | |
| CN109473521A (en) | A kind of LED epitaxial slice and preparation method thereof | |
| CN109768136A (en) | A kind of LED epitaxial slice and its growing method | |
| CN109473511A (en) | A kind of gallium nitride based LED epitaxial slice and its growing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |