CN109273571A - A kind of gallium nitride based LED epitaxial slice and preparation method thereof - Google Patents
A kind of gallium nitride based LED epitaxial slice and preparation method thereof Download PDFInfo
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- CN109273571A CN109273571A CN201811035789.9A CN201811035789A CN109273571A CN 109273571 A CN109273571 A CN 109273571A CN 201811035789 A CN201811035789 A CN 201811035789A CN 109273571 A CN109273571 A CN 109273571A
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- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 63
- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 60
- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 144
- 239000000758 substrate Substances 0.000 claims abstract description 123
- 230000009036 growth inhibition Effects 0.000 claims description 33
- 238000004519 manufacturing process Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 14
- 238000001259 photo etching Methods 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 3
- 230000006798 recombination Effects 0.000 abstract description 15
- 238000005215 recombination Methods 0.000 abstract description 15
- 239000013078 crystal Substances 0.000 abstract description 12
- 238000004020 luminiscence type Methods 0.000 abstract description 11
- 230000007547 defect Effects 0.000 abstract description 10
- 229910052594 sapphire Inorganic materials 0.000 abstract description 6
- 239000010980 sapphire Substances 0.000 abstract description 6
- 239000000463 material Substances 0.000 description 19
- 230000004888 barrier function Effects 0.000 description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 230000003760 hair shine Effects 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 210000004209 hair Anatomy 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of gallium nitride based LED epitaxial slices and preparation method thereof, belong to technical field of semiconductors.The gallium nitride based LED epitaxial slice includes substrate, n type semiconductor layer, active layer and p type semiconductor layer, the n type semiconductor layer, the active layer and the p type semiconductor layer are set gradually on the first surface of the substrate along the extending direction of first straight line, and the first straight line is parallel to the first surface of the substrate.The present invention is by the way that n type semiconductor layer, active layer and p type semiconductor layer to be successively set on the first surface of substrate along the direction for the first surface for being parallel to substrate, it is possible to prevente effectively from stress and defect that sapphire and gallium nitride crystal lattice mismatch generate constantly extend and expand along the direction of epitaxial growth, to reduce the defect of the stress inside epitaxial wafer, it improves extension and builds brilliant crystal growth quality, be conducive to carrier in the recombination luminescence of active layer.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of gallium nitride based LED epitaxial slice and its production
Method.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is a kind of semi-conductor electricity that can be luminous
Subcomponent.Gallium nitride (GaN) has good thermal conductivity, while having the good characteristics such as high temperature resistant, acid and alkali-resistance, high rigidity,
Gallium nitride (GaN) base LED is set to receive more and more attention and study.
Epitaxial wafer is the primary finished product in LED preparation process.Existing LED epitaxial wafer include substrate, n type semiconductor layer,
Active layer and p type semiconductor layer, n type semiconductor layer, active layer and p type semiconductor layer stack gradually on substrate.P-type semiconductor
Layer carries out the hole of recombination luminescence for providing, and n type semiconductor layer is used to provide the electronics for carrying out recombination luminescence, and active layer is used for
The radiation recombination for carrying out electrons and holes shines, and substrate is used to provide growing surface for epitaxial material.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The material of substrate generally selects sapphire, and the material of n type semiconductor layer etc. generally selects gallium nitride, sapphire and nitrogen
Change gallium is dissimilar materials, and differences between lattice constant is larger, there is biggish lattice mismatch between the two.The stress that lattice mismatch generates
It more can be introduced into gallium nitride with defect, and constantly extend and expand along the direction of epitaxial growth, reached at the top of epitaxial wafer
It is maximum.These stress and defect, which cause extension to build brilliant crystal growth quality, to be reduced, and influences carrier in the recombination luminescence of active layer, limit
Gallium nitride based LED has been made in the application of long wave band, especially green light and above band.
Summary of the invention
The embodiment of the invention provides a kind of gallium nitride based LED epitaxial slice and preparation method thereof, it is able to solve existing
The stress and defect for having technology sapphire and gallium nitride crystal lattice mismatch to generate, which extend, influences carrier in the recombination luminescence of active layer
The problem of.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of gallium nitride based LED epitaxial slice, the gallium nitride base hairs
Optical diode epitaxial wafer includes substrate, n type semiconductor layer, active layer and p type semiconductor layer, and the n type semiconductor layer described has
Active layer and the p type semiconductor layer are set gradually on the first surface of the substrate along the extending direction of first straight line, described
First straight line is parallel to the first surface of the substrate.
Optionally, the active layer includes that multiple Quantum Well and multiple quantum are built, the multiple Quantum Well and the multiple
Quantum base is arranged alternately on the first surface of the substrate along the extending direction of first straight line.
Preferably, the quantity of the Quantum Well is identical as the quantity that the quantum is built, and the quantity that the quantum is built is 3~
15.
Optionally, the n type semiconductor layer, the active layer and the p type semiconductor layer are perpendicular to the substrate
Equal length on the direction of first surface.
Preferably, the n type semiconductor layer, the active layer and the p type semiconductor layer are perpendicular to the substrate
Length on the direction of first surface is 0.02 μm~2 μm.
Optionally, length of the n type semiconductor layer on the extending direction of the first straight line is 0.02 μm~2 μm.
Optionally, length of the p type semiconductor layer on the extending direction of the first straight line is 0.02 μm~2 μm.
On the other hand, the embodiment of the invention provides a kind of production method of gallium nitride based LED epitaxial slice, institutes
Stating production method includes:
One substrate is provided；
Extending direction along first straight line successively grows n type semiconductor layer, active layer on the first surface of the substrate
And p type semiconductor layer.
Optionally, the extending direction along first straight line on the first surface of the substrate successively partly lead by growth N-type
Body layer, active layer and p type semiconductor layer, comprising:
First shutter is set on the first surface of the substrate, first shutter be covered on the active layer and
On the setting area of the p type semiconductor layer；
N type semiconductor layer is grown on the first surface of the substrate；
First shutter is removed from the first surface of the substrate；
Second shutter is set on the first surface of the substrate, second shutter be covered on the active layer and
On the setting area of the n type semiconductor layer；
Growing P-type semiconductor layer on the first surface of the substrate；
Second shutter is removed from the first surface of the substrate；
Third shutter is set on the first surface of the substrate, and the third shutter is covered on the N-type and partly leads
On the setting area of body layer and the p type semiconductor layer；
Active layer is grown on the first surface of the substrate；
The third shutter is removed from the first surface of the substrate.
Optionally, the extending direction along first straight line on the first surface of the substrate successively partly lead by growth N-type
Body layer, active layer and p type semiconductor layer, comprising:
Form the first growth inhibition layer, first growth inhibition on the first surface of the substrate using photoetching technique
Layer is located on the setting area of the active layer and the p type semiconductor layer；
N type semiconductor layer is grown on the first surface of the substrate；
The first growth inhibition layer is removed from the first surface of the substrate；
Form the second growth inhibition layer, second growth inhibition on the first surface of the substrate using photoetching technique
Layer is located on the setting area of the active layer and the n type semiconductor layer；
Growing P-type semiconductor layer on the first surface of the substrate；
The second growth inhibition layer is removed from the first surface of the substrate；
Form third growth inhibition layer, the third growth inhibition on the first surface of the substrate using photoetching technique
Layer is located on the setting area of the n type semiconductor layer and the p type semiconductor layer；
Active layer is grown on the first surface of the substrate；
The third growth inhibition layer is removed from the first surface of the substrate.
Technical solution provided in an embodiment of the present invention has the benefit that
By by n type semiconductor layer, active layer and p type semiconductor layer along the direction for the first surface for being parallel to substrate successively
It is arranged on the first surface of substrate, it is possible to prevente effectively from stress and defect that sapphire and gallium nitride crystal lattice mismatch generate are along outer
The direction for prolonging growth constantly extends and expands, to reduce the defect of the stress inside epitaxial wafer, improves extension and builds crystalline substance
Crystal growth quality is conducive to carrier in the recombination luminescence of active layer.Active layer is located at the middle part of the first surface of substrate simultaneously,
The influence that the warpage that extension is formed due to high temperature etc. shines to Carrier recombination in active layer can be improved.To sum up, by N-type
Semiconductor layer, active layer and p type semiconductor layer are successively set on the first of substrate along the direction for the first surface for being parallel to substrate
On surface, can effectively improve the crystal quality of epitaxial wafer, suitable for gallium nitride based LED long wave band application, especially
Green light and above band.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is the structural schematic diagram of active layer provided in an embodiment of the present invention；
Fig. 3 is a kind of process of the production method of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention
Figure.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
The embodiment of the invention provides a kind of gallium nitride based LED epitaxial slices.Fig. 1 provides for the embodiment of the present invention
A kind of gallium nitride based LED epitaxial slice structural schematic diagram.Referring to Fig. 1, the gallium nitride based LED epitaxial slice
Including substrate 10, n type semiconductor layer 20, active layer 30 and p type semiconductor layer 40, n type semiconductor layer 20, active layer 30 and p-type
Semiconductor layer 40 is successively set on the first surface of substrate 10 along the extending direction (being indicated by the arrow A in Fig. 1) of first straight line,
First straight line is parallel to the first surface of substrate 10.
The embodiment of the present invention by by n type semiconductor layer, active layer and p type semiconductor layer along the first table for being parallel to substrate
The direction in face is successively set on the first surface of substrate, it is possible to prevente effectively from answering of generating of sapphire and gallium nitride crystal lattice mismatch
Power and defect constantly extend and expand along the direction of epitaxial growth, to reduce the defect of the stress inside epitaxial wafer, improve
Extension builds brilliant crystal growth quality, is conducive to carrier in the recombination luminescence of active layer.Active layer is located at the first of substrate simultaneously
The middle part on surface can also improve the shadow that the warpage that extension is formed due to high temperature etc. shines to Carrier recombination in active layer
It rings.To sum up, n type semiconductor layer, active layer and p type semiconductor layer are set gradually along the direction for the first surface for being parallel to substrate
On the first surface of substrate, the crystal quality of epitaxial wafer can effectively improve, suitable for gallium nitride based LED in long wave band
Using especially green light and above band.
Fig. 2 is the structural schematic diagram of active layer provided in an embodiment of the present invention.Referring to fig. 2, optionally, active layer 30 can be with
32 are built including multiple Quantum Well 31 and multiple quantum, multiple Quantum Well 31 and multiple quantum build 32 extending directions along first straight line
(being indicated by the arrow A in figure) is disposed alternately on the first surface of substrate 10.
It is arranged alternately multiple Quantum Well and multiple quantum is built, carrier is limited in Quantum Well by quantum base carries out compound hair
The recombination luminescence efficiency of light, active layer is higher.And setting for active layer is equivalent to according to n type semiconductor layer and p type semiconductor layer
Multiple Quantum Well and multiple quantum are built and accordingly are adjusted to be arranged alternately along the extending direction of first straight line by seated position.
Preferably, the quantity of Quantum Well 31 is identical as the quantity that quantum builds 32, and the quantity that quantum builds 32 can be 3~15
It is a, preferably 9.
If the quantity that Quantum Well and quantum are built less than 3, may due to negligible amounts that Quantum Well and quantum are built and
Influence the recombination luminescence efficiency of carrier；If the quantity that Quantum Well and quantum are built is greater than 15, may be due to Quantum Well
The quantity built with quantum is more and increase the complexity of manufacture craft, improves production cost.
Specifically, as shown in Fig. 2, each quantum build 32 length a on the extending direction of first straight line can for 9nm~
20nm, preferably 15nm.
If quantum, which builds the length on the extending direction of first straight line, is less than 9nm, may be built due to quantum first
Length on the extending direction of straight line is shorter and effectively carrier can not be limited in Quantum Well and carry out recombination luminescence；If amount
Sub- trap builds the length on the direction of first straight line and is greater than 20nm, then may be built on the extending direction of first straight line due to quantum
Length it is longer and influence the migration of carrier, the final luminous efficiency for reducing LED.
Specifically, as shown in Fig. 2, length b of each Quantum Well 31 on the extending direction of first straight line can for 2nm~
4nm, preferably 3nm.
If length of the Quantum Well on the extending direction of first straight line is less than 2nm, may be since Quantum Well is first
Length on the extending direction of straight line is shorter and can not provide enough spaces and carry out recombination luminescence to carrier；If Quantum Well
Length on the extending direction of first straight line is greater than 4nm, then may build the length on the direction of first straight line due to quantum
It is longer and cause the crystal quality of active layer poor, the final luminous efficiency for reducing LED.
Optionally, as shown in Figure 1, length c of the n type semiconductor layer 20 on the extending direction of first straight line can be 0.02
μm~2 μm, preferably 1 μm.
If length of the n type semiconductor layer on the extending direction of first straight line, may be due to N-type half less than 0.02 μm
The electron amount that length of the conductor layer on the extending direction of first straight line is shorter and n type semiconductor layer is caused to provide is less, shadow
Ring the luminous efficiency of LED；It, may be due to if length of the n type semiconductor layer on the extending direction of first straight line is greater than 2 μm
Length of the n type semiconductor layer on the extending direction of first straight line is longer and causes the waste of material.
Optionally, as shown in Figure 1, length d of the p type semiconductor layer 40 on the extending direction of first straight line can be 0.02
μm~2 μm, preferably 1 μm.
If length of the p type semiconductor layer on the extending direction of first straight line, may be due to p-type half less than 0.02 μm
The number of cavities that length of the conductor layer on the extending direction of first straight line is shorter and p type semiconductor layer is caused to provide is less, shadow
Ring the luminous efficiency of LED；It, may be due to if length of the p type semiconductor layer on the extending direction of first straight line is greater than 2 μm
Length of the p type semiconductor layer on the extending direction of first straight line is longer and causes the waste of material.
Optionally, as shown in Figure 1, n type semiconductor layer 20, active layer 30 and p type semiconductor layer 40 are perpendicular to substrate 10
First surface direction on length e can be equal.N type semiconductor layer, active layer are in p type semiconductor layer perpendicular to substrate
First surface direction on equal length, the synthesis service efficiency of three can be made to reach maximum.
Preferably, n type semiconductor layer 20, active layer 30 and p type semiconductor layer 40 are in the first surface perpendicular to substrate 10
Direction on length can be 0.02 μm~2 μm.
If the length of n type semiconductor layer, active layer and p type semiconductor layer on the direction perpendicular to the first surface of substrate
Degree, then may be since n type semiconductor layer, active layer and p type semiconductor layer be in the first surface perpendicular to substrate less than 0.02 μm
Direction on length it is shorter and cause light-emitting area smaller, influence the luminous efficiency of LED；If n type semiconductor layer, active layer
Be greater than 2 μm with length of the p type semiconductor layer on the direction perpendicular to the first surface of substrate, then it may be due to N-type semiconductor
Layer, the length of active layer and p type semiconductor layer on the direction perpendicular to the first surface of substrate is longer and causes internal losses
Light it is more.
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include buffer layer 51, buffer layer
51 are arranged on the first surface of substrate 10, to alleviate the stress and lack that lattice mismatch generates between substrate material and gallium nitride
It falls into, and provides nuclearing centre for gallium nitride material epitaxial growth.
Correspondingly, n type semiconductor layer 20, active layer 30 and p type semiconductor layer 40 along first straight line extending direction successively
It is arranged on buffer layer 51.
Specifically, the material of buffer layer 51 can use gallium nitride.
Further, the thickness of buffer layer 51 can be 15nm~35nm, preferably 25nm.
Preferably, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include undoped gallium nitride layer
52, undoped gallium nitride layer 52 is arranged on buffer layer 51, further to alleviate lattice mismatch between substrate material and gallium nitride
The stress and defect of generation provide crystal quality preferable growing surface for epitaxial wafer main structure.
Correspondingly, n type semiconductor layer 20, active layer 30 and p type semiconductor layer 40 along first straight line extending direction successively
It is arranged on undoped gallium nitride layer 52.
In specific implementation, buffer layer is the gallium nitride of the layer of low-temperature epitaxy first in patterned substrate, because
This is also referred to as low temperature buffer layer.The longitudinal growth for carrying out gallium nitride in low temperature buffer layer again, will form multiple mutually independent three
Island structure is tieed up, referred to as three-dimensional nucleating layer；Then it is carried out between each three-dimensional island structure on all three-dimensional island structures
The cross growth of gallium nitride forms two-dimension plane structure, referred to as two-dimentional retrieving layer；The finally high growth temperature one on two-dimensional growth layer
The thicker gallium nitride of layer, referred to as intrinsic gallium nitride layer.By three-dimensional nucleating layer, two-dimentional retrieving layer and intrinsic gallium nitride in the present embodiment
Layer is referred to as undoped gallium nitride layer.
Further, the thickness of undoped gallium nitride layer 52 can be 1 μm~5 μm, preferably 3 μm.
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include electronic barrier layer 61, electricity
Sub- barrier layer 61 is arranged between active layer 30 and p type semiconductor layer 40, to avoid electron transition into p type semiconductor layer with sky
Cave carries out non-radiative recombination, reduces the luminous efficiency of LED.
Specifically, the material of electronic barrier layer 61 can be using the aluminium gallium nitride alloy (AlGaN) of p-type doping, such as AlyGa1-yN,
0.1 < y < 0.5.
Further, the thickness of electronic barrier layer 61 can be 50nm~150nm, preferably 100nm.
Preferably, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include low temperature P-type layer 62, low temperature
P-type layer 62 is arranged between active layer 30 and electronic barrier layer 61, has caused to avoid the higher growth temperature of electronic barrier layer
Phosphide atom in active layer is precipitated, and influences the luminous efficiency of light emitting diode.
Specifically, the material of low temperature P-type layer 62 can be identical as the material of p type semiconductor layer 40.In the present embodiment,
The material of low temperature P-type layer 62 can be the gallium nitride of p-type doping.
Further, the thickness of low temperature P-type layer 62 can be 10nm~50nm, preferably 30nm；P in low temperature P-type layer 62
The doping concentration of type dopant can be 1018/cm3~1020/cm3, preferably 1019/cm3。
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include p-type contact layer 70, p-type
Contact layer 70 is arranged on p type semiconductor layer 40, with the electrode or transparent conductive film that are formed in chip fabrication technique it
Between form Ohmic contact.
Specifically, the material of p-type contact layer 70 can be using the InGaN of p-type doping.
Further, the thickness of p-type contact layer 70 can be 5nm~100nm, preferably 50nm；P in p-type contact layer 70
The doping concentration of type dopant can be 1021/cm3~1022/cm3, preferably 5*1021/cm3。
The embodiment of the invention provides a kind of production methods of gallium nitride based LED epitaxial slice, are suitable for production figure
Gallium nitride based LED epitaxial slice shown in 1.Fig. 3 is a kind of gallium nitride based light emitting diode provided in an embodiment of the present invention
The flow chart of the production method of epitaxial wafer.Referring to Fig. 3, which includes:
Step 201: a substrate is provided.
Specifically, which may include:
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), in hydrogen atmosphere to substrate carry out 1 minute~
It makes annealing treatment within 10 minutes (preferably 5 minutes)；
Nitrogen treatment is carried out to substrate.
The surface for cleaning substrate through the above steps avoids being conducive to the life for improving epitaxial wafer in impurity incorporation epitaxial wafer
Long quality.
Step 202: successively growing n type semiconductor layer on the first surface of substrate along the extending direction of first straight line, have
Active layer and p type semiconductor layer.
In a kind of implementation of the present embodiment, which may include:
First shutter is set on the first surface of substrate, and the first shutter is covered on active layer and p type semiconductor layer
Setting area on；
N type semiconductor layer is grown on the first surface of substrate；
The first shutter is removed from the first surface of substrate；
Second shutter is set on the first surface of substrate, and the second shutter is covered on active layer and n type semiconductor layer
Setting area on；
The growing P-type semiconductor layer on the first surface of substrate；
The second shutter is removed from the first surface of substrate；
Third shutter is set on the first surface of substrate, and third shutter is covered on n type semiconductor layer and p-type is partly led
On the setting area of body layer；
Active layer is grown on the first surface of substrate；
Third shutter is removed from the first surface of substrate.
In above-mentioned implementation, the first shutter, the second shutter, third shutter, which are that setting area is different, to be blocked
Plate.Shutter is formed using non-substrate material, so that semiconductor layer can not be grown on shutter.
In another implementation of the present embodiment, which may include:
The first growth inhibition layer is formed on the first surface of substrate using photoetching technique, the first growth inhibition layer, which is located at, to be had
On the setting area of active layer and p type semiconductor layer；
N type semiconductor layer is grown on the first surface of substrate；
The first growth inhibition layer is removed from the first surface of substrate；
The second growth inhibition layer is formed on the first surface of substrate using photoetching technique, the second growth inhibition layer, which is located at, to be had
On the setting area of active layer and n type semiconductor layer；
The growing P-type semiconductor layer on the first surface of substrate；
The second growth inhibition layer is removed from the first surface of substrate；
Third growth inhibition layer is formed on the first surface of substrate using photoetching technique, third growth inhibition layer is located at N
On the setting area of type semiconductor layer and p type semiconductor layer；
Active layer is grown on the first surface of substrate；
Third growth inhibition layer is removed from the first surface of substrate.
In above-mentioned implementation, the first growth inhibition layer, the second growth inhibition layer and third growth inhibition layer are setting
The different growth inhibition layer in region.Material (such as silica) formation that growth inhibition layer can not be deposited using semiconductor material,
To inhibit the growth of semiconductor layer.
It should be noted that when active layer includes multiple Quantum Well and multiple quantum are built, since Quantum Well and quantum are built
It is formed using different materials, therefore in specific implementation, shape can be distinguished using different shutters or growth inhibition layer
It is built at Quantum Well and quantum.
Specifically, n type semiconductor layer is grown on the first surface of substrate, may include:
Controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure be 100torr~300torr (preferably
200torr), n type semiconductor layer is grown on the first surface of substrate.
The growing P-type semiconductor layer on the first surface of substrate may include:
Controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure be 100torr~300torr (preferably
200torr), the growing P-type semiconductor layer on the first surface of substrate.
Active layer is grown on the first surface of substrate, may include:
Active layer is grown on the first surface of substrate；Wherein, the growth temperature of Quantum Well be 720 DEG C~829 DEG C (preferably
It is 760 DEG C), pressure is 100torr~500torr (preferably 300torr)；The growth temperature that quantum is built is 850 DEG C~959 DEG C
(preferably 900 DEG C), pressure are 100torr~500torr (preferably 300torr).
Optionally, before step 202, which can also include:
Grown buffer layer on substrate.
Correspondingly, n type semiconductor layer, active layer and p type semiconductor layer are grown on the buffer layer.
Specifically, grown buffer layer on substrate may include:
Controlled at 400 DEG C~600 DEG C (preferably 500 DEG C), pressure be 400torr~600torr (preferably
500torr), grown buffer layer on substrate；
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 400torr~600torr (preferably
500torr), the in-situ annealing carried out 5 minutes~10 minutes (preferably 8 minutes) to buffer layer is handled.
Preferably, on substrate after grown buffer layer, which can also include:
Undoped gallium nitride layer is grown on the buffer layer.
Correspondingly, n type semiconductor layer, active layer and p type semiconductor layer are grown on undoped gallium nitride layer.
Specifically, undoped gallium nitride layer is grown on the buffer layer, may include:
Controlled at 1000 DEG C~1100 DEG C (preferably 1050 DEG C), pressure be 100torr~500torr (preferably
300torr), undoped gallium nitride layer is grown on the buffer layer.
Optionally, which can also include:
Electronic barrier layer is formed between active layer and p type semiconductor layer.
Specifically, the forming process of electronic barrier layer can be similar with n type semiconductor layer, active layer and p type semiconductor layer,
Details are not described herein.Difference essentially consists in, grow electronic barrier layer when, growth temperature be 850 DEG C~1080 DEG C (preferably
950 DEG C), growth pressure is 200torr~500torr (preferably 350torr).
Preferably, which can also include:
Low temperature P-type layer is formed between active layer and electronic barrier layer.
Specifically, the forming process of low temperature P-type layer can be similar with electronic barrier layer, and details are not described herein.Difference
It essentially consists in, when growing low temperature P-type layer, growth temperature is 600 DEG C~850 DEG C (preferably 750 DEG C), and growth pressure is
100torr~600torr (preferably 300torr).
Optionally, after step 202, which can also include:
The growing P-type contact layer on p type semiconductor layer.
Specifically, the growing P-type contact layer on p type semiconductor layer may include:
Controlled at 850 DEG C~1050 DEG C (preferably 950 DEG C), pressure be 100torr~300torr (preferably
200torr), the growing P-type contact layer on p type semiconductor layer.
It should be noted that after above-mentioned epitaxial growth terminates, can first by temperature be reduced to 650 DEG C~850 DEG C (preferably
It is 750 DEG C), the annealing of 5 minutes~15 minutes (preferably 10 minutes) is carried out to epitaxial wafer in nitrogen atmosphere, then again
The temperature of epitaxial wafer is reduced to room temperature.
Control temperature, pressure each mean temperature, pressure in the reaction chamber of control growth epitaxial wafer, and specially metal is organic
Compound chemical gaseous phase deposition (English: Metal-organic Chemical Vapor Deposition, referred to as: MOCVD) set
Standby reaction chamber.Using trimethyl gallium or triethyl-gallium as gallium source when realization, high-purity ammonia is as nitrogen source, and trimethyl indium is as indium
Source, for trimethyl aluminium as silicon source, N type dopant selects silane, and P-type dopant selects two luxuriant magnesium.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of gallium nitride based LED epitaxial slice, which is characterized in that the gallium nitride based LED epitaxial slice packet
Include substrate, n type semiconductor layer, active layer and p type semiconductor layer, the n type semiconductor layer, the active layer and the p-type half
Conductor layer is set gradually on the first surface of the substrate along the extending direction of first straight line, and the first straight line is parallel to institute
State the first surface of substrate.
2. gallium nitride based LED epitaxial slice according to claim 1, which is characterized in that the active layer includes more
A Quantum Well and multiple quantum are built, and the multiple Quantum Well and the multiple quantum base are alternately set along the extending direction of first straight line
It sets on the first surface of the substrate.
3. gallium nitride based LED epitaxial slice according to claim 2, which is characterized in that the quantity of the Quantum Well
Identical as the quantity that the quantum is built, the quantity that the quantum is built is 3~15.
4. described in any item gallium nitride based LED epitaxial slices according to claim 1~3, which is characterized in that the N-type
The length of semiconductor layer, the active layer and the p type semiconductor layer on the direction of the first surface perpendicular to the substrate
It is equal.
5. gallium nitride based LED epitaxial slice according to claim 4, which is characterized in that the n type semiconductor layer,
The length of the active layer and the p type semiconductor layer on the direction of the first surface perpendicular to the substrate be 0.02 μm~
2μm。
6. described in any item gallium nitride based LED epitaxial slices according to claim 1~3, which is characterized in that the N-type
Length of the semiconductor layer on the extending direction of the first straight line is 0.02 μm~2 μm.
7. described in any item gallium nitride based LED epitaxial slices according to claim 1~3, which is characterized in that the p-type
Length of the semiconductor layer on the extending direction of the first straight line is 0.02 μm~2 μm.
8. a kind of production method of gallium nitride based LED epitaxial slice, which is characterized in that the production method includes:
One substrate is provided；
Extending direction along first straight line successively grows n type semiconductor layer, active layer and p-type on the first surface of the substrate
Semiconductor layer.
9. production method according to claim 8, which is characterized in that the extending direction along first straight line is in the lining
N type semiconductor layer, active layer and p type semiconductor layer are successively grown on the first surface at bottom, comprising:
First shutter is set on the first surface of the substrate, and first shutter is covered on the active layer and described
On the setting area of p type semiconductor layer；
N type semiconductor layer is grown on the first surface of the substrate；
First shutter is removed from the first surface of the substrate；
Second shutter is set on the first surface of the substrate, and second shutter is covered on the active layer and described
On the setting area of n type semiconductor layer；
Growing P-type semiconductor layer on the first surface of the substrate；
Second shutter is removed from the first surface of the substrate；
Third shutter is set on the first surface of the substrate, and the third shutter is covered on the n type semiconductor layer
On the setting area of the p type semiconductor layer；
Active layer is grown on the first surface of the substrate；
The third shutter is removed from the first surface of the substrate.
10. production method according to claim 8, which is characterized in that the extending direction along first straight line is described
N type semiconductor layer, active layer and p type semiconductor layer are successively grown on the first surface of substrate, comprising:
Form the first growth inhibition layer, the first growth inhibition layer position on the first surface of the substrate using photoetching technique
On the setting area of the active layer and the p type semiconductor layer；
N type semiconductor layer is grown on the first surface of the substrate；
The first growth inhibition layer is removed from the first surface of the substrate；
Form the second growth inhibition layer, the second growth inhibition layer position on the first surface of the substrate using photoetching technique
On the setting area of the active layer and the n type semiconductor layer；
Growing P-type semiconductor layer on the first surface of the substrate；
The second growth inhibition layer is removed from the first surface of the substrate；
Form third growth inhibition layer, the third growth inhibition layer position on the first surface of the substrate using photoetching technique
On the setting area of the n type semiconductor layer and the p type semiconductor layer；
Active layer is grown on the first surface of the substrate；
The third growth inhibition layer is removed from the first surface of the substrate.
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| CN113540300A (en) * | 2021-05-27 | 2021-10-22 | 华灿光电（浙江）有限公司 | Preparation method of light-emitting diode epitaxial wafer for improving surface flatness |
| CN114141911A (en) * | 2021-11-10 | 2022-03-04 | 重庆康佳光电技术研究院有限公司 | Epitaxial structure, manufacturing method thereof and light-emitting device |
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| CN114141911A (en) * | 2021-11-10 | 2022-03-04 | 重庆康佳光电技术研究院有限公司 | Epitaxial structure, manufacturing method thereof and light-emitting device |
| CN114141911B (en) * | 2021-11-10 | 2023-05-16 | 重庆康佳光电技术研究院有限公司 | Epitaxial structure, manufacturing method thereof and light-emitting device |
| WO2023082963A1 (en) * | 2021-11-10 | 2023-05-19 | 重庆康佳光电技术研究院有限公司 | Epitaxial structure and manufacturing method therefor, and light-emitting device |
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