CN108899369A - 一种石墨烯沟道碳化硅功率半导体晶体管 - Google Patents

一种石墨烯沟道碳化硅功率半导体晶体管 Download PDF

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CN108899369A
CN108899369A CN201810682926.1A CN201810682926A CN108899369A CN 108899369 A CN108899369 A CN 108899369A CN 201810682926 A CN201810682926 A CN 201810682926A CN 108899369 A CN108899369 A CN 108899369A
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刘斯扬
汤丽芝
李胜
张弛
魏家行
孙伟锋
陆生礼
时龙兴
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Southeast University
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Abstract

本发明提出了一种石墨烯沟道碳化硅功率半导体晶体管,其元胞结构包括:N型衬底,衬底表面的N型漂移区,在漂移区两端设置P型基区,各P型基区内分别设有P+型体接触区和N+型源区,在N型漂移区的表面设有栅氧层且所述栅氧层的两端分别延伸进入两侧的P型基区,在栅氧层的表面设有多晶硅栅。其特征在于P型基区表面内嵌有作为沟道的石墨烯条且石墨烯条的两端分别触及N+型源区与P型基区之间的边界和P型基区与N型漂移区之间的边界,在栅宽方向呈蜂窝状分布,器件的导电沟道仍由石墨烯构成,在维持基本不变的导通电阻和电流传输能力下,P型基区被石墨烯条间隔开来,增强辅助耗尽的作用,进一步减小器件整体关态漏电电流,提高击穿电压。

Description

一种石墨烯沟道碳化硅功率半导体晶体管
技术领域
本发明属于高压功率半导体器件领域,具体而言是一种石墨烯沟道碳化硅功率半导体器件。
背景技术
石墨烯是一种单层碳聚合物,其导带和价带在狄拉克点相遇,称为零带隙半导体。作为新兴材料,石墨烯具有极高的载流子迁移率,室温下亚微米尺度的弹道传输特性、量子霍尔效应、极优的力学性能以及电子自旋输运、超导电性等特点,被认为最理想的电极和半导体材料,使其在纳米电子学和自旋电子学元器件方向拥有非常广阔的发展前景。目前,石墨烯材料产业形态基本形成,主要应用于光电半导体、生物医学、航天军工、传感器和微电子器件等领域。在具有宽禁带、高临界击穿电场、高热导率、高功率密度及低开关损耗等特点的碳化硅功率器件中应用新兴材料石墨烯,可以进一步提高电器件性能,使其在高温、高频、大功率、光电子以及抗辐射器件等方面具有更大的应用潜力。鉴于广阔的应用前景,国内外纷纷开展了深入的研究工作。
图1所示的是常规的石墨烯沟道碳化硅功率半导体器件,包括:N型衬底,在N型衬底一侧设有漏极金属,在N型衬底的另一侧为N型漂移区,在N型漂移区两端对称设有P型基区,N+型源区和P+型体接触区,在P型基区和N型漂移区的表面设有栅氧层,在P型基区上方、栅氧内部设有连续的石墨烯层,且石墨烯层与p型基区接触,在栅氧层的表面设有多晶硅栅,上方的钝化层包裹着多晶硅栅,在N+型源区和P+型体接触区的上方有源极金属。当漏极施加一定的正电压时,电子在正漏压的作用下将从N+型源区经过p型基区上方的石墨烯沟道注入至N型漂移区和N型衬底,最终抵达漏端。在常规的石墨烯沟道碳化硅功率半导体器件中,利用表面的石墨烯沟道直接导电,器件具有较低导通电阻,较强的电流传输能力等特点,然而连续的高迁移率石墨烯层电流密度大,在高漏压、零栅压的情况下,器件导电沟道不能完全耗尽,导致关态漏电电流大,击穿电压低,可靠性较低。
发明内容
本发明就是针对上述问题,提出了一种能够增强辅助耗尽的作用、进一步减小器件整体关态漏电电流、提高击穿电压的石墨烯沟道碳化硅功率半导体器件。
本发明采用的技术方案如下:
一种石墨烯沟道碳化硅功率半导体晶体管,包括:N型衬底,在N型衬底的一侧连接漏极金属,另一侧有N型漂移区,在N型漂移区两端分别设置P型基区,在各P型基区内分别设有P+型体接触区和N+型源区,在N型漂移区的表面设有栅氧层且所述栅氧层的两端分别延伸进入两侧的P型基区,在栅氧层的表面设有多晶硅栅,在多晶硅栅上设有钝化层且所述钝化层包裹多晶硅栅的两侧,在N+型源区和P+型体接触区上设有源极金属,在所述P型基区内设有作为所述晶体管沟道的石墨烯条且石墨烯条的两端分别触及N+型源区与P型基区之间的边界和P型基区与N型漂移区之间的边界,所述石墨烯条内嵌P型基区表面。
进一步,所述的石墨烯阵列可以设置为在栅长方向由N+型源区和P型基区的相交处向N型漂移区间隔式延伸,在栅宽方向如图4所示,石墨烯呈连续或间隔型交叉分布等形式。
与现有器件相比,本发明具有如下优点:
本发明在P型基区表面内嵌有石墨烯条,且石墨烯与栅氧表面接触,在栅宽方向呈蜂窝状分布,此时器件的导电沟道仍由石墨烯构成,在维持基本不变的导通电阻和电流传输能力下,P型基区被石墨烯条间隔开来,增强辅助耗尽的作用,进一步减小器件整体关态漏电电流,提高击穿电压。
(1)石墨烯条呈蜂窝状分布,使得P型基区间隔,且与石墨烯存在多面接触,当零栅压、高漏压时,石墨烯中存在电子,与P型基区多子空穴复合,形成空间电荷区,增强辅助耗尽的作用,降低器件整体关态漏电电流。因此,与栅氧内连续分布石墨烯的半导体器件相比,器件的关态漏电电流更小,击穿电压更高,可靠性更强。
(2)P型基区内嵌蜂窝状石墨烯阵列,当器件漏极施加正电压时,N+源区的多子电子将通过石墨烯沟道直接注入N型漂移区和N型衬底,最终抵达漏端,形成电流通路。由于碳化硅和石墨烯不同的载流子迁移率,栅氧内间隔分布石墨烯时,器件的导通电阻较高,电流传输不均匀。因此,相较于石墨烯间隔分布于栅氧中,器件的导通电阻更低,通态I-V特性更好,电流传输能力更强。相较于石墨烯连续分布于栅氧中,本发明的导通电阻基本不变,电流传输能力几乎不变。
(3)碳化硅外延生长法是石墨烯制备的方法之一,在高温下加热碳化硅单晶体,使其发生石墨化现象,从而得到基于碳化硅衬底性能优异的石墨烯,与现有器件制备工艺兼容。
(4)由于石墨烯材料的载流子迁移率受温度影响较小,提出的一种石墨烯沟道碳化硅功率半导体晶体管中采用石墨烯沟道,沟道内载流子的传输受温度影响较低,在高温下导通电阻稳定性较好。
附图说明
图1是石墨烯连续分布于栅氧内的常规石墨烯沟道碳化硅功率半导体器件结构立体图。
图2是本发明的结构立体图。
图3是本发明实施例的平行于栅宽方向沿A-A’直线呈蜂窝状分布俯视剖面图。
图4是本发明另一实施例的平行于栅宽方向沿A-A’直线的俯视剖面图。
图5是本发明平行于栅宽方向沿B-B’直线的侧剖立体图。
图6是本发明与石墨烯连续分布的碳化硅功率半导体器件在栅压为0V时的击穿特性,可以看出本发明器件漏电电流更小,击穿电压更大。
图7是本发明提供与石墨烯连续或间隔分布于栅氧内的石墨烯沟道碳化硅功率半导体器件在栅压为5V时的I-V曲线比较图,可以看出本发明器件相较于石墨烯连续分布于栅氧内的器件导通电阻基本不变,电流传输能力不变;而相较于石墨烯间隔分布于栅氧内的器件导通电阻明显降低,电流传输能力增强。
图8是本发明制作方法在碳化硅N型衬底上形成碳化硅外延层的结构示意图。
图9是本发明制作方法在N型漂移区上通过光刻和离子注入形成碳化硅P型基区的结构示意图。
图10是本发明制作方法在碳化硅P型基区通过光刻和离子注入形成的碳化硅P+型体接触区的结构示意图。
图11是本发明制作方法在碳化硅P型基区通过光刻和离子注入形成的碳化硅N+型源区的结构示意图。
图12是本发明制作方法在碳化硅P型基区通过刻蚀石墨烯沟槽的结构示意图。
图13是本发明制作方法在碳化硅P型基区的沟槽内通过淀积形成的石墨烯阵列的结构示意图。
图14是本发明制作方法通过热氧化生长和刻蚀在N型漂移区和P型基区表面形成的栅氧的结构示意图。
图15是本发明制作方法通过淀积和刻蚀工艺在栅氧层上淀并刻蚀多晶硅栅的结构示意图。
图16是本发明制作方法通过淀积和刻蚀金属形成金属接触,并进行钝化处理后的结构示意图。
具体实施方式
一种石墨烯沟道碳化硅功率半导体晶体管,包括:N型衬底1,在N型衬底1的一侧连接漏极金属10,另一侧有N型漂移区2,在N型漂移区2两端分别设置P型基区3,在各P型基区3内分别设有P+型体接触区4和N+型源区5,在N型漂移区2的表面设有栅氧层7且所述栅氧层7的两端分别延伸进入两侧的P型基区3,在栅氧层7的表面设有多晶硅栅8,在多晶硅栅8上设有钝化层6且所述钝化层6包裹多晶硅栅8的两侧,在N+型源区5和P+型体接触区4上设有源极金属9,在所述P型基区3内设有作为所述晶体管沟道的石墨烯条11且石墨烯条的两端分别触及N+型源区5与P型基区3之间的边界和P型基区3与N型漂移区2之间的边界,所述石墨烯条11内嵌P型基区3表面。所述石墨烯条应为广义的理解或解释,石墨烯条是相对于整块石墨烯而言的,可以包括或解释为镂空的整块石墨烯,并可进一步包括以下方式:
(1)所述石墨烯条11在栅宽方向呈蜂窝状,参见图3;(2)所述石墨烯条11呈直条状,参见图4。
本实施例还可在由石墨烯条11分割P型基区3形成的各个P型基区小区域中分别设有石墨烯块体12。
以下结合说明书附图对本发明作详细说明。
实施例1:
一种石墨烯沟道碳化硅功率半导体晶体管,包括:N型衬底1,在N型衬底1的一侧设有漏极金属10,另一侧为N型漂移区2,在N型漂移区2两端设置一对P型基区3,在各P型基区3中分别设有P+型体接触区4和N+型源区5,在N型漂移区2的表面设有栅氧层7且所述栅氧层7的两端分别延伸进入两侧的P型基区3,在栅氧层7的表面设有多晶硅栅8,在多晶硅栅8上设有钝化层6且所述钝化层6包裹多晶硅栅8的两侧,在N+型源区5和P+型体接触区4上设有源极金属9。
本实施例中:P型基区3内嵌的石墨烯在栅长方向由N+型源区5与P型基区3的相交处向N型漂移区5间隔式延伸,且石墨烯块12长度为0.1μm,间隔为0.1μm,厚度1nm;石墨烯条12在栅宽方向对角的石墨烯互连,呈蜂窝状分布。
实施例2:
本实施例在传统器件结构的基础上,P型基区3内嵌的石墨烯在栅长方向由N+型源区5与P型基区3的相交处向N型漂移区5间隔式延伸,且石墨烯块12长度为0.1μm,间隔为0.1μm,厚度1nm;石墨烯条11在栅宽方向上连续或间隔型交叉分布。
相较于实施例2中石墨烯呈连续或间隔型交叉分布,实施案例1中呈蜂窝状分布的器件在栅宽方向石墨烯相互连接,导通电阻更小,电流传输能力更强。蜂窝状的石墨烯使得P型基区间隔更明显,辅助耗尽作用更强,关态漏电电流更小,击穿电压更高。因此,呈蜂窝状分布的石墨烯沟道碳化硅功率半导体器件总体性能更佳。
本发明采用如下方法来制备:
第一步:采用外延工艺,在N型衬底1的表面生长一较厚的外延层形成N型漂移区2;
第二步:采用光刻和离子注入工艺,在N型漂移区2两端对称注入铝离子形成P型基区3;
第三步:采用光刻和离子注入工艺,在P型基区3注入铝离子形成P+型体接触区4;
第四步:采用光刻和离子注入工艺,在P型基区3注入磷离子形成N+型源区5;
第五步:采用刻蚀和淀积工艺,在P型基区3内刻蚀并淀积石墨烯阵列11;
第六步:采用热氧化或淀积和刻蚀工艺,在P型体区3、石墨烯阵列11和N型漂移区2上方形成栅氧层7;
第七步:采用淀积和刻蚀工艺,在栅氧层7上方淀积多晶硅,刻蚀出多晶硅栅8;
第八步:采用淀积和刻蚀工艺,在器件表面淀积一层金属层,刻蚀出电极接触区引出电极,最后进行钝化处理。

Claims (4)

1.一种石墨烯沟道碳化硅功率半导体晶体管,包括:N型衬底(1),在N型衬底(1)的一侧连接漏极金属(10),另一侧有N型漂移区(2),在N型漂移区(2)两端分别设置P型基区(3),在各P型基区(3)内分别设有P+型体接触区(4)和N+型源区(5),在N型漂移区(2)的表面设有栅氧层(7)且所述栅氧层(7)的两端分别延伸进入两侧的P型基区(3),在栅氧层(7)的表面设有多晶硅栅(8),在多晶硅栅(8)上设有钝化层(6)且所述钝化层(6)包裹多晶硅栅(8)的两侧,在N+型源区(5)和P+型体接触区(4)上设有源极金属(9),其特征在于,在所述P型基区(3)内设有作为所述晶体管沟道的石墨烯条(11)且石墨烯条(11)的两端分别触及N+型源区(5)与P型基区(3)之间的边界和P型基区(3)与N型漂移区(2)之间的边界,所述石墨烯条(11)内嵌P型基区(3)表面。
2.根据权利要求1所述的一种石墨烯沟道碳化硅功率半导体晶体管,其特征在于,所述石墨烯条(11)在栅宽方向呈蜂窝状。
3.根据权利要求1所述的一种石墨烯沟道碳化硅功率半导体晶体管,其特征在于,所述石墨烯条(11)呈直条状。
4.根据权利要求1、2或3所述的一种石墨烯沟道碳化硅功率半导体晶体管,其特征在于,在由石墨烯条(11)分割P型基区(3)形成的各个P型基区小区域中分别设有石墨烯块体(12)。
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