CN108735614A - 半导体装置及半导体装置的制造方法 - Google Patents
半导体装置及半导体装置的制造方法 Download PDFInfo
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- CN108735614A CN108735614A CN201810343019.4A CN201810343019A CN108735614A CN 108735614 A CN108735614 A CN 108735614A CN 201810343019 A CN201810343019 A CN 201810343019A CN 108735614 A CN108735614 A CN 108735614A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical group [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 claims description 2
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Abstract
本发明涉及半导体装置以及半导体装置的制造方法,其目的在于得到能够长寿命化以及小型化的半导体装置以及半导体装置的制造方法。本发明涉及的半导体装置具有:基板,其在上表面具有金属图案;半导体芯片,其设置于该金属图案之上;平板状的背面电极端子,其通过导线与该金属图案连接;平板状的表面电极端子,其在该背面电极端子的上方与该背面电极端子平行,延伸至该半导体芯片的正上方,与该半导体芯片的上表面直接接合;壳体,其将该基板包围;以及封装材料,其对该壳体的内部进行封装。
Description
技术领域
本发明涉及半导体装置及半导体装置的制造方法。
背景技术
在专利文献1中,作为从外部电极向功率器件芯片通电的方法,采用了导线键合。在导线键合中,使用导线将功率器件的电极部和外部电极进行连接。
专利文献1:日本特开2003-224243号公报
通常,就功率器件芯片而言,由于由电流平衡引起的冷热循环,导线的接合部受到应力。另外,为了实现接合部的长寿命化,有时导致封装件的大型化或高成本化。因此,特别是就具有多个功率器件芯片的大容量模块而言,得到廉价且小型、能够长寿命化的封装件成为课题。
发明内容
本发明就是为了解决上述课题而提出的,其目的在于得到能够长寿命化以及小型化的半导体装置以及半导体装置的制造方法。
本发明涉及的半导体装置具有:基板,其在上表面具有金属图案;半导体芯片,其设置于该金属图案之上;平板状的背面电极端子,其通过导线与该金属图案连接;平板状的表面电极端子,其在该背面电极端子的上方与该背面电极端子平行,延伸至该半导体芯片的正上方,与该半导体芯片的上表面直接接合;壳体,其将该基板包围;以及封装材料,其对该壳体的内部进行封装。
本发明涉及的半导体装置的制造方法具有下述工序:将半导体芯片搭载于在基板的上表面设置的金属图案之上的工序;设置平板状的背面电极端子和将该基板包围的壳体的工序;导线键合工序,通过导线将该背面电极端子和该金属图案连接;将与该背面电极端子平行且延伸至该半导体芯片的正上方的平板状的表面电极端子设置于该背面电极端子的上方,将该半导体芯片的上表面和该表面电极端子直接接合的工序;以及封装工序,在导线键合工序之后,通过封装材料对该壳体的内部进行封装。
发明的效果
就本发明涉及的半导体装置而言,表面电极端子与半导体芯片的上表面直接接合。因此,与由导线进行的连接相比,能够提高表面电极端子与半导体芯片的接合部相对于热循环应力的耐受性。另外,将通常与表面电极端子侧相比温度较低的背面电极端子通过导线进行连接,从而与将背面电极端子和半导体芯片直接接合的情况相比,能够将半导体装置小型化。因此,能够将半导体装置长寿命化以及小型化。
在本发明涉及的半导体装置的制造方法中,表面电极端子与半导体芯片的上表面直接接合。因此,与由导线进行的连接相比,能够提高表面电极端子与半导体芯片的接合部相对于热循环应力的耐受性。另外,将通常与表面电极端子侧相比温度较低的背面电极端子通过导线进行连接,从而与将背面电极端子和半导体芯片直接接合的情况相比,能够将半导体装置小型化。因此,能够将半导体装置长寿命化以及小型化。
附图说明
图1是实施方式1涉及的半导体装置的剖视图。
图2是表示实施方式1涉及的半导体装置的制造方法的流程图。
图3是对比例涉及的半导体装置的剖视图。
图4是实施方式2涉及的半导体装置的剖视图。
图5是表示实施方式2涉及的半导体装置的制造方法的流程图。
图6是表示实施方式2的变形例涉及的半导体装置的制造方法的流程图。
图7是实施方式3涉及的半导体装置的剖视图。
标号的说明
100、300、400半导体装置,16、416基板,20、420金属图案,22半导体芯片,28背面电极端子,30导线,32表面电极端子,26、326、426壳体,44封装材料
具体实施方式
参照附图对本发明的实施方式涉及的半导体装置及半导体装置的制造方法进行说明。对相同或对应的结构要素标注相同的标号,有时省略重复的说明。
实施方式1.
图1是实施方式1涉及的半导体装置100的剖视图。半导体装置100具有基座板10。基座板10由铜或铝等形成。在基座板10之上设置基板16。在基板16的背面设置金属图案18。基板16经由金属图案18通过焊料14与基座板10接合。基板16在上表面具有金属图案20。基板16以及金属图案18、20构成绝缘基板。
半导体装置100具有多个半导体芯片22。多个半导体芯片22包含开关元件和二极管。在本实施方式中,开关元件是IGBT(Insulated Gate Bipolar Transistor)。多个半导体芯片22设置在金属图案20之上。半导体装置100所具有的半导体芯片22的数量只要是大于或等于1个即可。另外,也可以将开关元件和二极管设置于1个半导体芯片22。各个半导体芯片22通过焊料24与金属图案20接合。
在基座板10之上设置壳体26。壳体26设置于基座板10的外周部。基板16被壳体26包围。壳体26由树脂形成。
半导体装置100具有背面电极端子28。背面电极端子28埋入于壳体26。背面电极端子28呈平板状。背面电极端子28具有与基板16的上表面平行地延伸的水平部39。水平部39的一端从壳体26露出。水平部39的一端以与基板16的端部相邻的方式设置。背面电极端子28在水平部39的一端,通过导线30与金属图案20连接。导线30由铜或铝等形成。
与基板16的上表面垂直的垂直部38从水平部39的另一端延伸出。垂直部38的上端从壳体26露出。在垂直部38的上端设置外部连接部40。外部连接部40是用于将外部的装置和背面电极端子28连接的部分。
在壳体26的设置背面电极端子28的那一侧设置与基板16的上表面平行地延伸的底座部分27。底座部分27将背面电极端子28的水平部39的一部分覆盖。在底座部分27之上设置表面电极端子32。表面电极端子32呈平板状。表面电极端子32在背面电极端子28的上方,与背面电极端子28平行。
表面电极端子32具有与基板16的上表面平行地延伸的水平部43。表面电极端子32的水平部43延伸至半导体芯片22的正上方。表面电极端子32通过焊料34与半导体芯片22的上表面直接接合。与基板16的上表面垂直的垂直部42从水平部43的与半导体芯片22相反侧的端部延伸出。垂直部42埋入于壳体26。垂直部42的上端从壳体26露出。垂直部42的上端与外部的装置连接。另外,水平部43从壳体26露出。
表面电极端子32具有引线框。引线框与多个半导体芯片22的上表面接合。即,通过1个表面电极端子32向多个半导体芯片22的上表面通电。
表面电极端子32和背面电极端子28构成半导体装置100的主端子电极。主端子电极具有平行平板构造。背面电极端子28以及导线30被表面电极端子32覆盖。
壳体26的内部由封装材料44进行封装。封装材料44也称为绝缘材料。基板16、金属图案20、半导体芯片22、背面电极端子28以及表面电极端子32被封装材料44封装。封装材料44例如是凝胶或树脂。在这里,在半导体芯片22是由硅或碳化硅形成的功率器件芯片的情况下,有时与引线框之间的线膨胀差变大。为了使由线膨胀差产生的热应力分散,优选采用比凝胶硬的树脂作为封装材料44。由此,能够提高可靠性。
在壳体26之上设置盖46。通过盖46,将由壳体26包围的区域盖住。壳体26的对盖46进行设置的部分形成为以盖46的厚度的量降低。由此,能够使盖46的上表面的高度和壳体26的不设置盖46的部分的高度一致。此外,外部连接部40延伸至盖46之上。
下面,对本实施方式涉及的半导体装置100的制造方法进行说明。图2是表示实施方式1涉及的半导体装置100的制造方法的流程图。首先,将半导体芯片22搭载于在基板16的上表面设置的金属图案20之上。在这里,预先将焊料24设置于金属图案20之上。由此,通过焊料24将金属图案20和半导体芯片22接合。因此,包含IGBT以及二极管的多个半导体芯片22搭载于基板16。然后,将焊料34设置于半导体芯片22之上。焊料34也可以预先搭载于半导体芯片22。
然后,将基板16搭载于基座板10。在这里,预先将焊料14搭载于基座板10之上。由此,通过焊料14将基座板10和基板16接合。在这里,也可以在将基板16搭载于基座板10之后,将半导体芯片22搭载于基板16。
然后,将壳体26搭载于基座板10。在这里,预先使背面电极端子28、表面电极端子32以及壳体26一体化。此时,以表面电极端子32设置于背面电极端子28的上方的方式,形成背面电极端子28、表面电极端子32以及壳体26。因此,通过将壳体26搭载于基座板10的工序,在半导体装置100设置壳体26、表面电极端子32以及背面电极端子28。
在这里,表面电极端子32也可以不与壳体26一体化。在该情况下,也可以在后述的导线键合工序之后,将表面电极端子32设置于壳体26之上。另外,在本实施方式中,背面电极端子28埋入于壳体26,但并不限于此,背面电极端子28例如也可以设置于底座部分27之上。
然后,实施导线键合工序。在导线键合工序中,通过导线30将背面电极端子28和金属图案20进行连接。在导线键合工序中,也可以进一步通过导线或引线框将半导体芯片22与半导体装置100的端子之间、半导体芯片22与半导体芯片22之间、半导体芯片22与金属图案20之间进行连接。然后,通过焊料34将表面电极端子32和半导体芯片22的上表面直接接合。
然后,实施封装工序。在封装工序中,向壳体26的内部注入封装材料44,进行封装。然后,使封装材料44固化。该工序也称为硬化(cure)。然后,进行盖46的安装。由此,本实施方式涉及的半导体装置100的制造方法结束。
图3是对比例涉及的半导体装置200的剖视图。半导体装置200的表面电极端子232的构造与半导体装置100不同。表面电极端子232通过导线248与半导体芯片22的上表面连接。就半导体装置200而言,形成上下叠放的2层导线30、248。根据该构造,上层的导线248的导线长度比导线30长。因此,导线248的电阻以及电感成分增加。因此,导线248的接合部有可能大幅地受到由半导体芯片22的反复ON/OFF产生的热应力的影响。因此,有可能使导线248的接合部的寿命变短,半导体装置200不再起作用。
与此相对,在本实施方式中,在半导体芯片22之上将表面电极端子32进行焊料接合。因此,与通过导线248进行连接的情况相比,能够提高接合部相对于热应力的耐受性。另外,通过将导线键合用于背面电极端子28与金属图案20之间的连接,从而与通过引线框将背面电极端子28和金属图案20连接的情况相比,能够将封装件小型化。
在这里,通常,将背面电极端子28和金属图案20连接的导线键合部分与表面电极端子32侧相比温度较低。因此,通过导线30将背面电极端子28侧连接,将容易成为高温的表面电极端子32与半导体芯片22直接接合,从而能够确保可靠性且将封装件小型化。因此,在本实施方式中,能够实现半导体装置100的长寿命化以及小型化。
另外,通过导线30将背面电极端子28和金属图案20进行连接,从而与通过引线框将背面电极端子28和金属图案20连接的情况相比,能够降低半导体装置100的制造成本。因此,在本实施方式中,能够确保接合部的可靠性,并且廉价地制造半导体装置100。
另外,通过导线30将背面电极端子28和金属图案20连接,从而与通过引线框将背面电极端子28和金属图案20连接的情况相比,能够将表面电极端子32之下的间隙确保得大。因此,能够容易地使封装材料44漫入。因此,能够可靠地对壳体26的内部进行封装。
另外,表面电极端子32和背面电极端子28呈平板状,彼此平行。在该构造中,伴随着电流的变动在表面电极端子32以及背面电极端子28处产生的磁通彼此抵消。因此,能够抑制在半导体装置100处产生的磁通。因此,能够降低半导体装置100的电感。因此,能够抑制在半导体装置100处产生的热应力。另外,半导体装置100能够进行高速的通断。
另外,就对比例涉及的半导体装置200而言,通过多个导线将多个半导体芯片22与多个表面电极端子232之间进行连接。与此相对,在本实施方式中,1个引线框与多个半导体芯片22直接连接。即,能够将多个导线以及多个表面电极端子232置换成1个引线框。因此,能够容易地制造半导体装置100。
作为本实施方式的变形例,半导体芯片22也可以由宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或金刚石。通过宽带隙半导体形成半导体芯片22,从而能够提高半导体芯片22的耐电压性以及容许电流密度。因此,能够将半导体芯片22小型化。因此,能够进一步将半导体装置100小型化。
另外,通过宽带隙半导体形成半导体芯片22,从而能够降低半导体芯片22的电力损耗。因此,能够将半导体芯片22高效化。因此,能够将半导体装置100高效化。另外,作为该变形例,也可以是多个半导体芯片22中的开关元件和二极管中的一者由宽带隙半导体形成。在该情况下,也能够得到半导体装置100的小型化和高效化的效果。
这些变形能够适当地应用于以下的实施方式涉及的半导体装置以及半导体装置的制造方法。此外,以下的实施方式涉及的半导体装置以及半导体装置的制造方法与实施方式1的共通点多,因此以与实施方式1的不同点为中心进行说明。
实施方式2.
图4是实施方式2涉及的半导体装置300的剖视图。就半导体装置300而言,背面电极端子28与壳体326一体化。另外,表面电极端子32是独立于壳体326以及背面电极端子28而设置的。表面电极端子32安装于壳体326之上。由此,表面电极端子32设置于背面电极端子28的上方。图4表示将表面电极端子32从壳体326拆下的状态。另外,在图4中,出于方便起见,省略了封装材料44以及盖46。
表面电极端子32的垂直部42的一部分被树脂部336覆盖。表面电极端子32与树脂部336一体化。树脂部336通过螺钉或压入配合等嵌合于壳体326。由此,表面电极端子32安装于壳体326之上。即,树脂部336以及表面电极端子32外嵌于壳体326。
下面,对本实施方式涉及的半导体装置300的制造方法进行说明。图5是表示实施方式2涉及的半导体装置300的制造方法的流程图。首先,将壳体326和背面电极端子28一体成型。在本实施方式中,通过嵌件成型形成壳体326和背面电极端子28。在嵌件成型中,在将背面电极端子28嵌入于模具的状态下,向模具注入树脂。然后,通过使树脂固化,从而使壳体326与背面电极端子28一体化而成型。
同样地,将树脂部336与表面电极端子32一体成型。壳体326和背面电极端子28的成型方法不限于嵌件成型,只要能够将壳体326和背面电极端子28一体化即可。另外,树脂部336和表面电极端子32的成型方法不限于嵌件成型,只要能够将树脂部336和表面电极端子32一体化即可。
然后,与实施方式1同样地,将半导体芯片22搭载于基板16。然后,与实施方式1同样地,将基板16搭载于基座板10。然后,将壳体326搭载于基座板10。在这里,背面电极端子28与壳体26一体化,因此通过该工序在半导体装置100设置壳体26以及背面电极端子28。
然后,实施导线键合工序,通过导线30将背面电极端子28和金属图案20进行连接。然后,将表面电极端子32外嵌于壳体326。此时,在制造工序内将树脂部336嵌合于壳体326。由此,表面电极端子32安装于壳体326。作为该变形例,也可以将表面电极端子32直接安装于壳体326。通过将表面电极端子32安装于壳体326之上,从而将表面电极端子32设置于背面电极端子28的上方。
然后,通过焊料34将表面电极端子32和半导体芯片22的上表面直接接合。然后,与实施方式1同样地实施封装工序。然后,将盖46安装于壳体326。由此,本实施方式涉及的半导体装置300的制造工序结束。
在本实施方式中,表面电极端子32是独立于壳体326而设置的。因此,在导线键合工序之后,能够在制造工序内将表面电极端子32安装于壳体326之上。因此,与实施方式1相比,导线键合工序变得容易。
图6是表示实施方式2的变形例涉及的半导体装置300的制造方法的流程图。在实施方式2中,在将表面电极端子32和半导体芯片22接合之后,实施封装工序。封装工序并不限于此,只要在导线键合工序之后实施即可。例如,如图6所示,也可以在封装工序之后,将表面电极端子32设置于背面电极端子28的上方。
在变形例涉及的半导体装置300的制造方法中,在导线键合工序之后实施封装工序。在封装工序中,将封装材料44形成至半导体芯片22的上表面露出的高度为止。在封装工序之后,将表面电极端子32外嵌于壳体326。然后,将表面电极端子32和半导体芯片22接合。
在变形例中,在未搭载有表面电极端子32的状态下实施封装工序。因此,能够容易地使封装材料44漫入与表面电极端子32相比更靠下的空间。即,能够以抑制了在封装材料44与部件之间产生的间隙的形态将封装材料44进行填充。由此,能够提高半导体装置300的可靠性。另外,在本变形例中,也可以在将表面电极端子32和半导体芯片22接合之后,进一步通过封装材料44对壳体326内进行填充。
实施方式3.
图7是实施方式3涉及的半导体装置400的剖视图。半导体装置400不具有基座板10和焊料14。本实施方式涉及的基板416具有兼作为基座板的构造。在基板416的背面设置金属图案418。在基板416的上表面设置金属图案420。基板416以及金属图案418、420构成绝缘基板。
壳体426无间隙地将基板416包围。壳体426设置为与基板416的侧面以及金属图案418接触。由此,即使不设置基座板10,也能够由壳体426和基板416构成封装件。因此,能够将半导体装置400的构造简化。另外,能够进一步将半导体装置400小型化。
此外,也可以将在各实施方式中说明的技术特征适当地组合而使用。
Claims (10)
1.一种半导体装置,其特征在于,具有:
基板,其在上表面具有金属图案;
半导体芯片,其设置于所述金属图案之上;
平板状的背面电极端子,其通过导线与所述金属图案连接;
平板状的表面电极端子,其在所述背面电极端子的上方与所述背面电极端子平行,延伸至所述半导体芯片的正上方,与所述半导体芯片的上表面直接接合;
壳体,其将所述基板包围;以及
封装材料,其对所述壳体的内部进行封装。
2.根据权利要求1所述的半导体装置,其特征在于,
所述背面电极端子与所述壳体一体化,
所述表面电极端子通过安装于所述壳体之上而设置于所述背面电极端子的上方。
3.根据权利要求1或2所述的半导体装置,其特征在于,
具有多个所述半导体芯片,
所述表面电极端子具有引线框,
所述引线框与所述多个半导体芯片的上表面接合。
4.根据权利要求1至3中任一项所述的半导体装置,其特征在于,
所述壳体无间隙地将所述基板包围。
5.根据权利要求1至4中任一项所述的半导体装置,其特征在于,
所述半导体芯片由宽带隙半导体形成。
6.根据权利要求1至4中任一项所述的半导体装置,其特征在于,
所述半导体芯片具有开关元件和二极管,
所述开关元件和所述二极管中的一者由宽带隙半导体形成。
7.根据权利要求5或6所述的半导体装置,其特征在于,
所述宽带隙半导体是碳化硅、氮化镓类材料或金刚石。
8.一种半导体装置的制造方法,其特征在于,具有下述工序:
将半导体芯片搭载于在基板的上表面设置的金属图案之上的工序;
设置平板状的背面电极端子和将所述基板包围的壳体的工序;
导线键合工序,通过导线将所述背面电极端子和所述金属图案连接;
将与所述背面电极端子平行且延伸至所述半导体芯片的正上方的平板状的表面电极端子设置于所述背面电极端子的上方,将所述半导体芯片的上表面和所述表面电极端子直接接合的工序;以及
封装工序,在导线键合工序之后,通过封装材料对所述壳体的内部进行封装。
9.根据权利要求8所述的半导体装置的制造方法,其特征在于,
所述壳体与所述背面电极端子一体成型,
通过将所述表面电极端子安装于所述壳体之上,从而将所述表面电极端子设置于所述背面电极端子的上方。
10.根据权利要求8或9所述的半导体装置的制造方法,其特征在于,
在所述封装工序之后,将所述表面电极端子设置于所述背面电极端子的上方。
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