CN108701599A - 基板处理方法 - Google Patents
基板处理方法 Download PDFInfo
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- CN108701599A CN108701599A CN201780011940.2A CN201780011940A CN108701599A CN 108701599 A CN108701599 A CN 108701599A CN 201780011940 A CN201780011940 A CN 201780011940A CN 108701599 A CN108701599 A CN 108701599A
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- silicon oxide
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- 239000000758 substrate Substances 0.000 title claims description 26
- 238000003672 processing method Methods 0.000 title claims description 13
- 239000007789 gas Substances 0.000 claims abstract description 124
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 88
- 239000001301 oxygen Substances 0.000 claims abstract description 24
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims description 52
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 33
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims description 33
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 19
- 238000005040 ion trap Methods 0.000 claims description 11
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 10
- 239000007795 chemical reaction product Substances 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 229910052736 halogen Inorganic materials 0.000 claims description 6
- 150000002367 halogens Chemical class 0.000 claims description 6
- 150000002500 ions Chemical class 0.000 claims description 5
- 230000001590 oxidative effect Effects 0.000 claims description 4
- 229910021529 ammonia Inorganic materials 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 2
- 230000004913 activation Effects 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims description 2
- 239000011737 fluorine Substances 0.000 claims description 2
- 229910052731 fluorine Inorganic materials 0.000 claims description 2
- 239000001257 hydrogen Substances 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 150000002431 hydrogen Chemical class 0.000 claims description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims 1
- 229910003978 SiClx Inorganic materials 0.000 claims 1
- 229910001882 dioxygen Inorganic materials 0.000 claims 1
- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 abstract description 63
- 229910052681 coesite Inorganic materials 0.000 abstract description 61
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 61
- 229910052682 stishovite Inorganic materials 0.000 abstract description 61
- 229910052905 tridymite Inorganic materials 0.000 abstract description 61
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 27
- 238000005530 etching Methods 0.000 description 18
- -1 oxygen radical Chemical class 0.000 description 16
- 150000003254 radicals Chemical class 0.000 description 13
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 11
- 230000000052 comparative effect Effects 0.000 description 10
- 239000000126 substance Substances 0.000 description 10
- 239000002585 base Substances 0.000 description 9
- 238000010438 heat treatment Methods 0.000 description 7
- 239000013078 crystal Substances 0.000 description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- 229910019975 (NH4)2SiF6 Inorganic materials 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- 238000010926 purge Methods 0.000 description 4
- 238000009489 vacuum treatment Methods 0.000 description 4
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000011144 upstream manufacturing Methods 0.000 description 3
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910004074 SiF6 Inorganic materials 0.000 description 2
- 239000012159 carrier gas Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003028 elevating effect Effects 0.000 description 2
- 239000004615 ingredient Substances 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-O Ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 description 1
- 240000008168 Ficus benjamina Species 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000003851 corona treatment Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003085 diluting agent Substances 0.000 description 1
- 238000004821 distillation Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 235000019441 ethanol Nutrition 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- ZHPNWZCWUUJAJC-UHFFFAOYSA-N fluorosilicon Chemical compound [Si]F ZHPNWZCWUUJAJC-UHFFFAOYSA-N 0.000 description 1
- 239000012458 free base Substances 0.000 description 1
- BGOFCVIGEYGEOF-UJPOAAIJSA-N helicin Chemical compound O[C@@H]1[C@@H](O)[C@H](O)[C@@H](CO)O[C@H]1OC1=CC=CC=C1C=O BGOFCVIGEYGEOF-UJPOAAIJSA-N 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000010943 off-gassing Methods 0.000 description 1
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- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
- 230000007723 transport mechanism Effects 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/311—Etching the insulating layers by chemical or physical means
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Abstract
在对形成于晶圆的表面的SiO2膜蚀刻到到达下层之前的中途阶段时,对粗糙度进行改善。在对形成于晶圆(W)的表面的SiO2膜(1)蚀刻到到达下层之前的中途阶段时,对SiO2膜(1)的表面照射氧自由基(102)来进行亲水化之后,利用NH3气体和HF气体对所述SiO2膜(1)进行了蚀刻。因此,能够使NH3气体和HF气体均匀地吸附于SiO2膜(1)的表面。因而,SiO2膜(1)的表面被均匀地进行蚀刻,在对SiO2膜(1)蚀刻到到达下层之前的中途阶段时也能够改善表面的粗糙度(Roughness)。
Description
技术领域
本发明涉及一种对被处理基板的表面供给处理气体来进行蚀刻处理的基板处理方法。
背景技术
半导体器件的多样化、立体化不断推进,因此器件结构变得复杂化、微细化,在半导体制造工序的各工艺中,也需要不断地应对各种各样的新的表面结构、膜类型。例如,在制作三维结构的晶体管的工序中存在如下的工序:在包含晶体管的前驱结构部分在内形成了用于将各晶体管分离的绝缘层的SiO2(氧化硅)膜之后,对该SiO2(氧化硅)膜进行蚀刻直到露出该前驱结构部分为止。
作为对SiO2膜进行蚀刻的方法,已知一种例如专利文献1所记载的那样使用利用HF(氟化氢)气体和NH3(氨气)气体进行的化学氧化物去除处理(Chemical Oxide Removal)的方法。该方法是为了对形成于半导体晶圆(以下称为“晶圆”)的表面的SiO2膜进行蚀刻而向处理容器内供给HF气体和NH3气体的方法。这些气体与SiO2发生反应生成(NH4)2SiF6(氟硅酸铵),因此例如通过在相同的处理容器内对晶圆进行加热使该(NH4)2SiF6升华来去除SiO2。
另外,当电路图案的微细化推进时,例如在用于将晶体管彼此之间绝缘的SiO2膜中,SiO2膜的表面的粗糙程度对泄漏特性带来较大的影响。因此,存在使SiO2膜的表面的粗糙度比以往更加良好的要求。
在专利文献2中记载了在去除形成于基板表面的氧化膜时为了提高蚀刻时的润湿性而进行使用了将O2活化所得到的等离子体的等离子体处理的技术,但是对于蚀刻后的表面的粗糙度没有进行考虑。
专利文献1:日本特开2009-156774号公报
专利文献2:日本特开2003-68766号公报
发明内容
发明要解决的问题
本发明是在这种情况下完成的,其目的在于提供一种在对形成于基板的表面的SiO2层的一部分进行蚀刻时能够抑制粗糙度的恶化的技术。
用于解决问题的方案
本发明的基板处理方法是对形成于基板的表面部的氧化硅层进行蚀刻的基板处理方法,其特征在于,包括:
第一工序,对所述氧化硅层的表面进行亲水化处理;以及
第二工序,接着,向所述基板供给包含卤素的气体,通过使该包含卤素的气体与所述氧化硅层发生反应而生成的反应产物升华,来对所述氧化硅层进行蚀刻。
发明的效果
本发明在对形成于基板的表面的氧化硅层进行蚀刻时,在对氧化硅层的表面进行了亲水化处理之后,利用包含卤素的气体对所述氧化硅层进行蚀刻。因此,氧化硅层的表面被均匀地蚀刻,表面的粗糙度(Roughness)得到改善。关于该机理的推测在后面记述。
附图说明
图1是表示蚀刻处理前的晶圆的表面附近的截面立体图。
图2是表示晶圆表面的蚀刻的样子的说明图。
图3是表示晶圆表面的蚀刻的样子的说明图。
图4是表示蚀刻处理后的晶圆的表面附近的截面立体图。
图5是示意性地表示蚀刻处理前的晶圆的表面的说明图。
图6是示意性地表示进行了氧自由基处理的晶圆表面的说明图。
图7是示意性地表示进行了氧自由基处理的晶圆表面的说明图。
图8是表示晶圆表面的蚀刻的样子的说明图。
图9是表示向晶圆供给氧自由基的自由基处理装置的截面图。
图10是利用COR对SiO2膜进行蚀刻的COR处理装置的截面图。
图11是表示真空处理装置的俯视图。
图12是表示实施例、比较例以及参考例中的均方粗糙度的特性图。
图13是表示实施例、比较例以及参考例中的晶圆的表面的照片。
具体实施方式
对作为通过本发明的实施方式所涉及的基板处理方法来处理的被处理基板的晶圆W的表面结构的一例进行说明。图1表示半导体器件的制造工序的中途阶段中的晶圆W的表面结构。该表面结构为对Si(硅)层10进行蚀刻而形成了相互平行地延伸的多个突壁部11,这些突壁部11之间成为槽部12。然后,通过在氧化环境中对晶圆W进行加热,来在包含槽部12的内侧在内的晶圆W的表面整体形成SiO2的热氧化膜(第一SiO2膜)13。之后,针对包含槽部12的内部在内的晶圆W的表面整体,例如通过使用了有机原料气体和氧化气体的CVD(Chemical Vaper Deposition:化学气相沉积)进行第二SiO2膜14的成膜。
接着,进行在真空环境中一边利用N2气体进行吹扫一边以400℃~1000℃对晶圆W进行加热的退火处理,进行第二SiO2膜14的烧结处理。之后,通过CMP(ChemicalMechanical Polishing:化学机械研磨)对晶圆W的表面进行研磨。由此,突壁部11的上表面在晶圆W的表面露出。图1是表示研磨处理后的晶圆W的表面结构的截面立体图。在图1中,夸大地绘制了第一SiO2膜13的厚度,第一SiO2膜13由于厚度薄,因此几乎没有在表面露出。在以下的说明书中,将第一SiO2膜13与第二SiO2膜14合起来表示为SiO2膜1。另外,在本发明的实施方式中,SiO2膜1相当于氧化硅层。
之后,将晶圆W搬送到自由基处理装置,朝向晶圆W的表面供给氧自由基102。具体地说,能够采用例如后述的那样使将O2(氧气)活化所得到的等离子体通过离子阱板后进行供给的方法。
接着,将晶圆W搬送到公知的COR处理装置。然后,通过使SiO2膜1与HF分子104和NH3分子105发生反应来去除SiO2膜1的COR(Chemical Oxide Removal:化学氧化物去除)法来进行蚀刻。在COR处理装置中,如后述的那样向晶圆W供给HF气体和NH3气体。由此,HF分子104和NH3分子105吸附于SiO2膜1的表面。
当HF分子104和NH3分子105吸附于SiO2膜1的表面时,如图2所示那样,SiO2膜1与HF分子104和NH3分子105发生反应,生成例如(NH4)2SiF6、水等反应产物106。然后,通过将晶圆W加热为例如115℃,如图3所示那样,(NH4)2SiF6、水等反应产物106挥发(升华)而被去除。之后,停止NH3气体和HF气体的供给,使吹扫气体流动。由此,升华了的(NH4)2SiF6、水等反应产物通过吹扫气体而被排出,并且未反应的HF分子104和NH3分子105通过吹扫气体而被去除。因而,SiO2膜1与HF分子104和NH3分子105的反应停止,从而蚀刻停止。其结果,成为反应产物106的SiO2膜1被去除,从而如图4所示那样蚀刻成在槽部12内残留SiO2膜1。
通过像这样在利用COR法对成膜有SiO2膜1的晶圆W进行蚀刻之前朝向SiO2膜1供给氧自由基,如从后述的实验例可知的那样,粗糙度变得良好。
关于粗糙度变得良好的理由,推测如下。在图1所示的进行了CMP的晶圆W的SiO2膜1的表面,如图5所示那样,由于退火处理和CMP处理中的至少一方的原因,羟基(OH基)101的大部分被去除,成为了SiO2分子的悬挂键100排列的状态。
之后,在自由基处理装置中,当向晶圆W供给氧自由基时,如图6所示那样,氧自由基102与晶圆W的表面的SiO2分子的悬挂键100键合。然后,键合于晶圆W的表面上的氧自由基102如图7所示那样与周围的H2O(水)分子103发生反应,成为OH基101。其结果,SiO2膜1的表面整体被均匀地进行亲水化,有OH基101分布。
接着,在COR处理装置中,供给HF气体和NH3气体,HF分子104和NH3分子105具有容易吸附于OH基101的性质。因此,HF分子104和NH3分子105将吸附于晶圆W的表面上的OH基101的附近。
在进行了退火处理和CMP处理之后,如图5所示,晶圆W的表面的OH基101变得稀疏。因此,在供给了HF气体和NH3气体时,导致HF分子104和NH3分子105局部地吸附于晶圆W的表面上的键合有OH基101的部位。与此相对地,通过朝向SiO2膜1的表面供给氧自由基,来使OH基101均匀地分布于SiO2膜1的表面整体,由此如图8所示那样HF分子104和NH3分子105均匀地分布。
然后,如已经记述的那样,HF分子104和NH3分子105与SiO2膜1发生反应,通过被加热而升华,从而SiO2膜1被蚀刻而被去除。此时,在SiO2膜1的表面,如果HF分子104和NH3分子105局部地附着,则导致在HF分子104和NH3分子105局部地附着的部位处蚀刻的进展变快,从而不均匀地进行蚀刻。因此,在以在槽部12内残留SiO2膜1的方式进行了蚀刻时,蚀刻后的晶圆W的表面的粗糙度(Roughness)变差。
与此相对地,通过将SiO2膜1的表面均匀地进行亲水化,来使HF分子104和NH3分子105均匀地进行吸附,由此SiO2膜1被均匀地进行蚀刻。因而,推测出在以残留SiO2膜1的方式进行了蚀刻时,蚀刻后的SiO2膜1的表面的粗糙度(Roughness)的恶化被抑制。
接着,对进行向晶圆W的表面照射氧自由基102的处理的自由基处理装置进行说明。如图9所示,自由基处理装置具备被接地的例如不锈钢制的处理容器20,在处理容器20的内部设置有用于载置晶圆W的圆筒形的载置部21。例如,在载置部21内形成温度调整流路39,将被后述的等离子体加热的晶圆W的温度调整成例如10℃~120℃。此外,关于晶圆W交接用的升降销、使升降销进行升降的升降机构,省略了图示。在处理容器20的底面形成有排气口22,在排气口22处连接排气管34,并构成为经由真空排气部37进行排气,在该排气管34上设置有压力调整阀35、开闭阀36。另外,在处理容器20的侧壁上设置有用于搬入和搬出晶圆W的搬入口30,在搬入口30处设置有闸阀70。
在处理容器20的顶板部分,以面向被载置于载置部21的晶圆W的方式设置有由例如石英板等构成的电介质窗23。在电介质窗23的上表面侧载置有由螺旋状的平面线圈构成的高频天线24。在线圈状的高频天线24的中心侧的端部,经由匹配器25而连接输出例如200W~1200W的高频的高频电源26,高频天线24的外周侧的端部被接地。
另外,在处理容器20中的比气体供给口27靠下方且在载置部21和搬入口30的上方的位置设置有由例如冲孔板构成的、例如由导电性构件形成的离子阱板32,在该离子阱板32上纵横地配置有贯通孔33。离子阱板32吸附要通过贯通孔33的等离子体中所包含的离子来捕捉该离子。
另外,在处理容器20的侧壁上形成有用于向离子阱板32与电介质窗23之间供给O2气体和Ar气体的、朝向处理容器20的内部形成开口的多个气体供给口27。在气体供给口27处连接气体供给管28,该气体供给管28例如分别经由阀V11、流量调整部M11来与O2气体供给源29连接,经由阀V12、流量调整部M12来与作为添加性气体的Ar气体供给源38连接。
在上述自由基处理装置中,在将晶圆W载置于载置部21之后,将处理容器20内的压力设定为13.3Pa~133Pa(100mTorr~1000mTorr)、例如20Pa,以100sccm~800sccm的流量供给O2气体,以50sccm~800sccm的流量供给作为添加性气体的Ar气体。由此,处理容器20中的离子阱板32与电介质窗23之间被O2气体和Ar气体充满。之后,当从高频电源26向高频天线施加200W~1200W的高频电力时,离子阱板32与电介质窗23之间的O2气体和Ar气体被激发而等离子体化。等离子体保持原状地下降,在通过离子阱板32时,等离子体中所包含的离子被去除,主要的活性种成为氧自由基并被供给到晶圆W。然后,将晶圆W在氧自由基中暴露例如10秒~180秒。此时,晶圆W被设定为10℃~120℃。由此,如已经记述的那样对SiO2膜1的表面整体进行亲水化。
接着,关于在进行了向晶圆W供给氧自由基的处理之后对SiO2膜1进行蚀刻的装置,在本例中对COR处理装置进行说明。如图10所示,COR处理装置具备作为真空腔室的处理容器40,在处理容器40的内部设置有作为晶圆W的载置部的圆柱形状的载置台42,在该载置台42的内部设置有形成加热部的加热器56。在载置台42上沿周向等间隔地形成三处贯通孔57,在各贯通孔57处设置有升降销51。升降销51被构成为通过设置在处理容器40的下方的升降机构52而自如地升降,通过升降销51与外部的搬送机构的协同作用,来将晶圆W交接至载置台42。另外,在处理容器20的侧壁设置用于搬入和搬出晶圆W的搬入口53,在搬入口30处设置有闸阀70。
在处理容器40的上部侧设置有气体喷头43。气体喷头43被构成为将在内部设置的分散室44分散的气体经由扩散板60朝向晶圆W供给。另外,以与分散室44连通的方式形成有气体供给路59,气体供给路59的上游侧端部分支为两条来分别连接气体供给管45、46。此外,图10中的58是用于使从气体供给路59向分散室44内供给的气体扩散的扩散部。
一个气体供给管45的上游侧被分支来连接氨气(NH3)气体供给源47和供给作为稀释气体(载气)的氮气(N2)气体的N2气体供给源48。另外,另一个气体供给管46的上游侧被分支来连接HF气体供给源49和用于供给作为稀释气体(载气)的氩气(Ar)气体的Ar气体供给源50。此外,图10中的V1~V4是阀,M1~M4是流量调整部。另外,在处理容器40的底面设置有用于对处理容器40内的环境进行排气的排气口41。在排气口41处连接排气管71,构成为经由真空排气部74进行排气。此外,图10中的72和73分别是压力调整阀和开闭阀。
在上述COR处理装置中,当晶圆W被载置于载置台42时,被加热为例如115℃。并且,处理容器40内的压力被设定为250Pa(1.88Torr),并朝向晶圆W供给包含HF气体和NH3气体的气体。由此,如已经记述的那样,形成于晶圆W的SiO2膜1与HF气体和NH3气体发生反应而成为反应产物106,通过加热,反应产物106升华而被去除。
自由基处理装置和COR处理装置例如被设置为多腔系统的真空处理装置。如图11所示,真空处理装置具备横向长的常压搬送室62,该常压搬送室62例如通过N2气体被形成为常压环境。在常压搬送室62的近前侧设置有用于对例如用于搬入晶圆W的承载件C进行晶圆W的交接的装载端口61。图11中的67是设置于常压搬送室62的正面壁上的开闭门。在常压搬送室62内设置有用于搬送晶圆W的搬送臂65。另外,从装载端口61侧来看在常压搬送室62的左侧壁设置有对晶圆W的朝向、偏心进行调整的对准室66。
在常压搬送室62的与装载端口61相反的一侧,以左右排列的方式配置有在使晶圆W等待着的状态下将内部的环境在常压环境与真空环境之间切换的、例如两个加载互锁室63。从常压搬送室62侧来看在加载互锁室63的里侧配置有真空搬送室64。加载互锁室63、自由基处理装置8以及COR处理装置9经由闸阀70来与真空搬送室64连接。在真空搬送室64中设置有搬送臂69,通过搬送臂69来在各加载互锁室63、自由基处理装置8、COR处理装置9之间进行晶圆W的交接。
在真空处理装置中设置有例如由计算机构成的控制部90。该控制部90具备程序、存储器、由CPU构成的数据处理部等,在程序中编入有命令(各步骤)使得从控制部90向真空处理装置的各部发送控制信号来进行用于执行例如自由基处理、蚀刻处理的各步骤。该程序被保存在计算机存储介质、例如软盘、光盘、硬盘、MO(磁光盘)等存储部中并被安装到控制部90中。
当收纳有具有例如图1所示的表面结构的晶圆W的搬送容器C被搬入到真空处理装置的装载端口61时,晶圆W从搬送容器C被取出,经由常压搬送室62被搬入到对准室66中进行对准,接着经由加载互锁室63被搬送到真空搬送室64。接着,晶圆通过搬送臂69被搬送到自由基处理装置8中执行已经记述的自由基处理。之后,晶圆W通过搬送臂69被取出并搬送到COR处理装置9中,进行基于已经记述的COR法的蚀刻处理。将通过这样对SiO2膜1进行蚀刻后的晶圆W通过第二搬送臂69搬送到真空环境的加载互锁室63,接着将加载互锁室切换为大气环境之后,将晶圆W通过搬送臂65返回至例如原来的承载件C。
此外,也可以将从COR处理装置9搬出的晶圆W搬入到与真空搬送室64连接的加热处理室,在此处例如以比COR处理装置9中的加热温度高的温度对晶圆W进行加热,来使反应产物106更可靠地升华。
根据上述实施方式,在对形成于晶圆W的表面的SiO2膜1蚀刻到到达下层之前的中途阶段时,对SiO2膜1的表面照射O2自由基来进行亲水化之后,利用NH3气体和HF气体对所述SiO2膜1进行了蚀刻。因此,NH3气体和HF气体均匀地吸附于SiO2膜1的表面。因而,SiO2膜1的表面被均匀地进行蚀刻,表面的粗糙度(Roughness)得到改善。
另外,作为向SiO2膜1的表面供给氧自由基的方法,也可以代替使O2气体活化,而使O3(臭氧)气体、或O2气体与O3气体的混合气体活化,使所得到的等离子体通过离子阱板32后向晶圆W供给。另外,作为对SiO2膜1的表面进行亲水化的方法,也可以不对等离子体进行离子捕捉处理,而使用例如包含电子温度低的氧的活性种的所谓的软性等离子体。而且,作为亲水化的方法,不限于等离子体的供给,也可以是向图1所示的晶圆W的表面供给水蒸气的方法。
另外,也可以在对SiO2膜1进行蚀刻时,在例如图10所示的COR处理装置中,向晶圆W供给NH3气体和HF气体,使NH3气体和HF气体与SiO2膜1发生反应而生成反应产物106。之后,将从COR处理装置取出的晶圆W搬送到加热装置,对该晶圆W进行加热来使反应产物106升华来进行蚀刻。
并且,能够使用包含含有氮、氢、氟的化合物的处理气体、例如氟化铵(NH4F)对SiO2膜1进行蚀刻,在该情况下,该气体也与SiO2膜1发生反应生成(NH4)2SiF6。因而,在对具有SiO2膜1的晶圆W进行蚀刻时,也可以供给氟化铵(NH4F)(或者,NH4FHF)气体。此外,处理气体也可以是NH3气体、HF气体以及NH4F气体(或者,NH4FHF)的混合气体。
另外,作为对SiO2膜1进行蚀刻的方法,不限于COR,也可以进行等离子体蚀刻,例如也可以使包含NF3气体和NH3气体的处理气体、或HF气体和NH3气体等离子体化,例如使等离子体通过离子阱板32后向晶圆W供给。另外,在蚀刻中,作为与NH3气体一起使用的气体,也可以使用HBr气体等包含F以外的卤素的气体。并且,也能够使用乙醇(C2H5OH)、水(H2O)来代替NH3气体。
另外,在将SiO2膜1全部去除而使下层露出的情况下,也有可能将SiO2膜1蚀刻时的粗糙度转印到下层的表面。因此,对于将SiO2膜1全部去除的情况也是有效的。
实施例
为了验证本发明的效果,对晶圆W进行了蚀刻处理,并进行了表面的均匀性的评价。
作为实施例,在晶圆W的表面例如通过使用了有机原料气体和氧化气体的CVD进行SiO2膜的成膜,接着,在真空环境中一边通过N2气体进行吹扫一边以400℃~1000℃对晶圆W进行加热来进行退火处理。并且,通过CMP进行表面研磨从而制作出了图1所示的试样。然后,与本实施方式同样地,在图9所示的自由基处理装置中向试样供给氧自由基180秒。之后,使用图10所示的COR处理装置来通过HF气体和NH3气体进行蚀刻处理,直到中途为止对SiO2膜1进行蚀刻处理。另外,作为比较例,除了不进行氧自由基的照射以外,进行了与实施例同样的处理。
在实施例和比较例的各个例子中,对蚀刻处理后的晶圆W的表面的粗糙度(均方粗糙度)进行了测定。另外,作为参考例,在通过CVD法进行SiO2膜1的成膜并进行了退火处理和基于CMP的研磨之后,对晶圆W的表面的粗糙度(均方粗糙度)进行了测定。
均方粗糙度(以下称为“平均粗糙度RMS”)是指,从粗糙度曲线中沿其平均线的方向抽出基准长度l,分别将基准长度l的平均线的方向取为X轴、将纵向倍率的方向取为Y轴,对从基准长度l的平均线到测定曲线的偏差的均方进行合计而得到的值。当用y=f(x)来表示粗糙度曲线时,通过下式求出。
制作实施例、比较例以及参考例各自的一个样品,并分别测定出平均粗糙度RMS。
图12示出其结果,示出实施例、比较例以及参考例中的表面的平均粗糙度RMS的值。此外,图12中的误差线表示AFM(原子力显微镜)测定时的系统偏差。另外,图13是分别表示参考例、比较例以及实施例中的晶圆W的表面的照片。如图12所示,在参考例中,晶圆W的表面的平均粗糙度RMS为0.298,在比较例中为3.108,在实施例中为1.313。另外,如图12所示可知,相对于在参考例中几乎看不到凹凸,在比较例中能够看到大的凹凸,在实施例中,凹凸小于比较例的凹凸。
根据该结果可知,通过在基于CMP对SiO2膜1进行研磨之后利用HF气体和NH3气体将表面蚀刻到中途,表面的粗糙度恶化,通过在利用HF气体和NH3气体进行蚀刻之前进行氧自由基的照射,使表面的粗糙度的恶化改善了58%。
因而,根据本发明,可以说在对SiO2膜1的表面进行蚀刻时能够抑制表面的粗糙度的恶化。
Claims (8)
1.一种基板处理方法,对形成于基板的表面部的氧化硅层进行蚀刻,该基板处理方法的特征在于,包括:
第一工序,对所述氧化硅层的表面进行亲水化处理;以及
第二工序,接着,向所述基板供给包含卤素的气体,通过使该包含卤素的气体与所述氧化硅层发生反应而生成的反应产物升华,来对所述氧化硅层进行蚀刻。
2.根据权利要求1所述的基板处理方法,其特征在于,
所述第一工序是向所述氧化硅层的表面供给氧的活性种的工序。
3.根据权利要求2所述的基板处理方法,其特征在于,
所述氧的活性种是氧自由基。
4.根据权利要求2所述的基板处理方法,其特征在于,
所述第一工序是如下的工序:使将氧气气体和臭氧气体中的至少一方活化所得到的等离子体在通过形成有多个气体通过用的开口部的离子阱构件之后供给至所述氧化硅层的表面。
5.根据权利要求1所述的基板处理方法,其特征在于,
所述第二工序是如下的工序:将基板的表面暴露于包含氟化氢气体和氨气气体的处理气体以及包含含有氮、氢、氟的化合物的处理气体中的至少一方的处理气体中。
6.根据权利要求1所述的基板处理方法,其特征在于,
在所述第二工序中,利用将三氟化氮气体与氨气气体的混合气体、或氟化氢气体与氨气气体的混合气体活化所得到的等离子体对所述基板进行蚀刻。
7.根据权利要求1所述的基板处理方法,其特征在于,
所述氧化硅层是使原料气体与氧化气体发生反应并沉积而成的。
8.根据权利要求1所述的基板处理方法,其特征在于,
在对所述氧化硅层的表面进行亲水化处理的工序之前,包括:
对所述氧化硅层进行退火处理的工序;以及
接着对所述氧化硅层进行研磨来使所述氧化硅层平坦化的平坦化处理。
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101500935A (zh) * | 2006-08-02 | 2009-08-05 | 点35微结构有限公司 | 蚀刻牺牲氧化硅层的方法 |
CN102460653A (zh) * | 2009-06-16 | 2012-05-16 | 东京毅力科创株式会社 | 成膜方法、前处理装置和处理系统 |
US20120244718A1 (en) * | 2011-03-23 | 2012-09-27 | Tokyo Electron Limited | Substrate processing method and storage medium |
US20140329390A1 (en) * | 2012-01-26 | 2014-11-06 | Tokyo Electron Limited | Plasma treatment method and plasma treatment device |
JP2016025111A (ja) * | 2014-07-16 | 2016-02-08 | 東京エレクトロン株式会社 | 基板洗浄方法、基板処理方法、基板処理システム、および半導体装置の製造方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08327959A (ja) * | 1994-06-30 | 1996-12-13 | Seiko Epson Corp | ウエハ及び基板の処理装置及び処理方法、ウエハ及び基板の移載装置 |
US4845054A (en) * | 1985-06-14 | 1989-07-04 | Focus Semiconductor Systems, Inc. | Low temperature chemical vapor deposition of silicon dioxide films |
JP3237743B2 (ja) | 1996-02-15 | 2001-12-10 | 東京エレクトロン株式会社 | プラズマ処理装置及びプラズマ処理方法 |
DE10109218A1 (de) * | 2001-02-26 | 2002-06-27 | Infineon Technologies Ag | Verfahren zur Herstellung eines Speicherkondensators |
JP2003068766A (ja) | 2001-08-28 | 2003-03-07 | Murata Mfg Co Ltd | 電界効果トランジスタの製造方法 |
KR100628888B1 (ko) * | 2004-12-27 | 2006-09-26 | 삼성전자주식회사 | 샤워 헤드 온도 조절 장치 및 이를 갖는 막 형성 장치 |
JP2009156774A (ja) | 2007-12-27 | 2009-07-16 | Chugoku Electric Power Co Inc:The | 流量監視方法、流量監視装置 |
JP5374039B2 (ja) | 2007-12-27 | 2013-12-25 | 東京エレクトロン株式会社 | 基板処理方法、基板処理装置及び記憶媒体 |
EP2409313A1 (de) * | 2009-03-17 | 2012-01-25 | Roth & Rau AG | Substratbearbeitungsanlage und substratbearbeitungsverfahren |
US20110139748A1 (en) * | 2009-12-15 | 2011-06-16 | University Of Houston | Atomic layer etching with pulsed plasmas |
JP2012235059A (ja) * | 2011-05-09 | 2012-11-29 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
JP5926527B2 (ja) * | 2011-10-17 | 2016-05-25 | 信越化学工業株式会社 | 透明soiウェーハの製造方法 |
TWI604528B (zh) * | 2012-10-02 | 2017-11-01 | 應用材料股份有限公司 | 使用電漿預處理與高溫蝕刻劑沉積的方向性二氧化矽蝕刻 |
JP6211999B2 (ja) * | 2014-06-25 | 2017-10-11 | 株式会社東芝 | 窒化物半導体層、窒化物半導体装置及び窒化物半導体層の製造方法 |
US9431268B2 (en) | 2015-01-05 | 2016-08-30 | Lam Research Corporation | Isotropic atomic layer etch for silicon and germanium oxides |
-
2016
- 2016-02-19 JP JP2016030365A patent/JP6601257B2/ja active Active
-
2017
- 2017-02-07 WO PCT/JP2017/004431 patent/WO2017141773A1/ja active Application Filing
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101500935A (zh) * | 2006-08-02 | 2009-08-05 | 点35微结构有限公司 | 蚀刻牺牲氧化硅层的方法 |
CN102460653A (zh) * | 2009-06-16 | 2012-05-16 | 东京毅力科创株式会社 | 成膜方法、前处理装置和处理系统 |
US20120244718A1 (en) * | 2011-03-23 | 2012-09-27 | Tokyo Electron Limited | Substrate processing method and storage medium |
US20140329390A1 (en) * | 2012-01-26 | 2014-11-06 | Tokyo Electron Limited | Plasma treatment method and plasma treatment device |
JP2016025111A (ja) * | 2014-07-16 | 2016-02-08 | 東京エレクトロン株式会社 | 基板洗浄方法、基板処理方法、基板処理システム、および半導体装置の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113380618A (zh) * | 2020-03-10 | 2021-09-10 | 东京毅力科创株式会社 | 基板处理方法和基板处理装置 |
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