CN108695385A - 一种基于Si衬底的GaN基射频器件外延结构及其制造方法 - Google Patents

一种基于Si衬底的GaN基射频器件外延结构及其制造方法 Download PDF

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CN108695385A
CN108695385A CN201810784434.3A CN201810784434A CN108695385A CN 108695385 A CN108695385 A CN 108695385A CN 201810784434 A CN201810784434 A CN 201810784434A CN 108695385 A CN108695385 A CN 108695385A
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CN108695385B (zh
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王洪
周泉斌
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South China University of Technology SCUT
Zhongshan Institute of Modern Industrial Technology of South China University of Technology
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Zhongshan Institute of Modern Industrial Technology of South China University of Technology
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Abstract

本发明公开了一种基于Si衬底的GaN基射频器件外延结构及其制造方法。该外延结构从下至上由依次层叠的Si衬底、AlN成核层、AlGaN缓冲层、GaN：Fe/GaN高阻层、GaN超晶格层、GaN沟道层、AlGaN势垒层和GaN帽层组成；GaN：Fe/GaN高阻层由故意铁掺杂GaN层和非故意掺杂GaN层交替连接组成；GaN超晶格层由低压/低V/III比GaN层和高压/高V/III比GaN层周期性交替连接组成。本发明外延结构晶体质量高、缓冲层背景载流子浓度低、沟道载流子限域性好、泄漏电流小，制备的器件具有高击穿电压、高电流密度、低关态漏电、以及优良的夹断特性，且高温、高频下性能退化小，制造成本低。

Description

一种基于Si衬底的GaN基射频器件外延结构及其制造方法
技术领域
本发明涉及半导体器件，特别是涉及一种基于Si衬底的GaN基射频器件外延结构及其制造 方法，该GaN基射频器件外延结构可用于适用于高频率、高功率的无线通信、雷达等领域；属 于微电子技术领域。
背景技术
随着现代武器装备和航空航天、核能、通信技术、汽车电子、开关电源的发展，对半导体器 件的性能提出了更高的要求。作为宽禁带半导体材料的典型代表，GaN基材料具有禁带宽度大、 电子饱和漂移速度高、临界击穿场强高、热导率高、稳定性好、耐腐蚀、抗辐射等特点，可用于 制作高温、高频及大功率电子器件。另外，GaN还具有优良的电子特性，可以和AlGaN形成调制 掺杂的AlGaN/GaN异质结构，该结构在室温下可以获得高于1500cm2/Vs的电子迁移率，以及高 达3×107cm/s的峰值电子速度和2×107cm/s的饱和电子速度，并获得比第二代化合物半导体异 质结构更高的二维电子气密度，被誉为是研制微波功率器件的理想材料。因此，基于AlGaN/GaN 异质结的高电子迁移率晶体管HEMT在微波大功率器件方面具有非常好的应用前景。
SiC和Si是GaN基微波功率器件的主要衬底材料。其中，SiC衬底材料具有晶格失配小、位 错密度低、导热性能好等特点，在SiC衬底上生长的GaN材料晶体质量高、漏电低，同时，由于 SiC衬底导热性能好，能有效降低高功率密度的GaN基微波功率器件的自热效应。因此，SiC是 制作高频、大功率GaN基微波功率器件的主要衬底材料。SiC衬底材料的主要制约因素是成本较 高，导致基于SiC衬底的GaN基微波功率目前只能应用在有源相控阵雷达、卫星等军用领域。
相较于SiC衬底，Si衬底在低成本和大晶圆制备方面颇具优势，大尺寸(>12寸的Si衬底制 备技术已十分成熟，同时，基于Si衬底的GaN材料可与Si工艺兼容从而实现大规模量产。因此， 在低成本、高产能需求的通信卫星、低功率器件、有线电视等商业领域，基于Si衬底的GaN材 料具更高竞争力。目前，在大尺寸Si衬底上生长平整的GaN基外延材料的主要困难是，由于GaN 和Si衬底之间存在巨大的晶格失配(‐17％和热失配(116％，导致晶圆翘曲度高、材料均匀性差、 GaN晶体质量差，所以缺陷密度高(包括位错和背景杂质、进而材料的漏电高，造成器件的可靠 性问题。
发明内容
本发明的目的在于克服上述已有技术的缺陷，从器件纵向结构的优化角度提出一种基于Si 衬底的GaN基射频器件外延结构及其制造方法，提高外延材料晶体质量和性能，减小材料漏电， 降低工艺难度，提高器件的可靠性。
本发明的目的至少通过如下技术方案实现。
一种基于Si衬底的GaN基射频器件外延结构，从下至上由依次层叠的Si衬底、AlN成核层、 AlGaN缓冲层、GaN：Fe/GaN高阻层、GaN超晶格层、GaN沟道层、AlGaN势垒层和GaN帽层 组成；其中，GaN：Fe/GaN高阻层由故意铁掺杂GaN层和非故意掺杂GaN层交替连接组成；所 述的故意铁掺杂GaN层和非故意掺杂GaN层每层的厚度都为100nm～200nm；GaN超晶格层由 低压/低V/III比GaN层和高压/高V/III比GaN层周期性交替连接组成；所述的低压/低V/III比GaN 层和高压/高V/III比GaN层每层的厚度都为20～50nm。
为进一步实现本发明目的，优选地，所述的低压/低V/III比GaN层和高压/高V/III比GaN层 的重复周期为3～5个周期。
优选地，所述的故意铁掺杂GaN层和非故意掺杂GaN层的重复周期为3～5个周期，故意铁 掺杂GaN层的Fe杂质的掺杂浓度为1E19cm‐3～1E20cm‐3。
优选地，所述的AlGaN缓冲层总共三层，其中从下至上每层的Al元素摩尔含量百分比依次 减小，且都在20～70％的范围内，厚度依次增加，且都在200nm～800nm的范围内。
优选地，所述的Si衬底为圆形，直径为6inch‐10inch。
优选地，所述的Si衬底、AlN成核层、AlGaN缓冲层、GaN沟道层、AlGaN势垒层和GaN帽 层的厚度分别为0.5‐2mm、0.2‐1μm、600‐2400nm、100‐500nm、10‐30nm和2‐5nm。
所述的基于Si衬底的GaN基射频器件外延结构的制造方法，包括如下步骤:
1)将Si衬底放入金属有机化学气相沉积设备中，在反应室中对Si衬底表面进行退火处理；
2)在衬底上外延生长AlN成核层；
3)在AlN成核层的基础上外延生长AlGaN缓冲层，共三层，其Al元素的摩尔含量百分依次 下降，且都在20％～70％的范围内，厚度依次增加，且都在200nm～800nm的范围内；
4)循环重复以下步骤4a)和4b)多次，在AlGaN缓冲层基础上外延GaN：Fe/GaN高阻层；
4a)以Cp2Fe作为Fe掺杂源，生长故意铁掺杂GaN层，Fe杂质的掺杂浓度为1E19cm‐3～ 1E20cm‐3，厚度为100nm～200nm；
4b)在故意铁掺杂GaN层上，不通入Cp2Fe，生长非故意掺杂GaN层，厚度为100nm～200nm；
5)循环重复以下步骤5a)和5b)多次，在GaN：Fe/GaN高阻层外延生长上GaN超晶格层；
5a)以低压和低V/III比的生长条件，生长低压/低V/III比GaN层，生长压力为50Torr～100Torr， V/III比小于50，厚度为20～50nm；
5b)以高压和高V/III比的生长条件，生长高压/高V/III比GaN层，生长压力为300Torr～400 Torr，V/III比大于110，厚度为20～50nm：
6)外延生长GaN沟道层；
7)外延生长AlGaN势垒层；
8)外延生长GaN帽层。
优选地，步骤1)所述的退火处理的温度高于1100摄氏度，时间大于10分钟。
优选地，步骤2)所述的AlN成核层为后续生长提供成核节点，温度高于1200摄氏度。
优选地，步骤7)所述的AlGaN势垒层中Al元素的摩尔含量百分比为20～30％。
与现有技术相比，本发明具有如下优点和技术效果：
该外延是基于Si衬底上的GaN基射频器件外延结构，通过优化工艺条件，一方面抑制材料 失效，另一方面提高薄膜质量，在大尺寸的Si衬底上制备的外延具有晶体质量高、沟道载流子 限域性好、漏电流小的特点。采用发明的外延结构制备的器件高击穿电压、高电流密度、低关态 漏电、优良的夹断特性，且高温下性能退化小。本发明的基于Si衬底的GaN基射频器件外延结 构制造工艺简单，重复性好，适用于高频率、高功率的无线通信、雷达等应用。
附图说明
图1～图8是本发明实例中基于Si衬底的GaN基射频器件外延结构的制备过程示意图。
图9是本发明实施例1中GaN：Fe/GaN高阻层的Cp2Fe的流量变化曲线。
图10本发明实施例1中GaN超晶格层压力变化曲线图。
图11是本发明实施例1中GaN超晶格层的V/III比的变化曲线图。
图12是本发明的外延结构和现有技术外延结构的源漏电极的漏电曲线；
图中示出：Si衬底1、AlN成核层2、第一AlGaN缓冲层3、第二AlGaN缓冲层4、第三AlGaN 缓冲层5、GaN：Fe/GaN高阻层6、GaN超晶格层7、GaN沟道层8、AlGaN势垒层9、GaN帽层10。
具体实施方式
以下结合附图和实例对本发明的具体实施作进一步说明，但本发明的实施和保护不限于此， 需指出的是，以下若有未特别详细说明之过程或工艺参数，均是本领域技术人员可参照现有技术 实现的。
参照图8，一种基于Si衬底的GaN基高压HEMT器件外延结构，下至上包括Si衬底1、AlN 成核层2、第一AlGaN缓冲层3、第二AlGaN缓冲层4、第三AlGaN缓冲层5、GaN：Fe/GaN高阻层6、GaN超晶格层7、GaN沟道层8、AlGaN势垒层9、GaN帽层10。其中，GaN：Fe/GaN 高阻层6由故意铁掺杂GaN层和非故意掺杂GaN层交替连接组成，GaN超晶格层7由低压/低 V/III比GaN层和高压/高V/III比GaN层周期性交替连接组成。低V/III比即低NH3流量、高TMGa 流量，反之，高V/III比即高NH3流量、低TMGa流量。
实施例1
Si衬底1为圆形，直径为8inch。Si衬底、AlN成核层、GaN沟道层、AlGaN势垒层和GaN帽层的厚度分别为1mm、0.5μm、300nm、20nm和3nm。
第一AlGaN缓冲层3、第二AlGaN缓冲层4和第三AlGaN缓冲层5总共三层，其中从下至上 每层的Al元素摩尔含量依次减小，分别为0.7、0.5和0.3，厚度依次增加，分别为300nm、500nm 和700nm。
GaN：Fe/GaN高阻层6由故意铁掺杂GaN层和非故意掺杂GaN层交替连接组成，故意铁掺 杂GaN层和非故意掺杂GaN层每层的厚度分别为100nm，周期为3个周期，故意铁掺杂GaN层 的Fe杂质的掺杂浓度为1E19cm‐3。
GaN超晶格层7由低压和低V/III比条件下生长的低压/低V/III比GaN层和高压和高V/III比 条件下生长的高压/高V/III比GaN层周期性交替连接组成，低压/低V/III比GaN层和高压/高V/III 比GaN层每层的厚度分别为25nm，周期为5个周期。
如图1～图8，一种基于Si衬底的GaN基射频器件外延结构的制造方法，包括如下步骤：
步骤一，将Si衬底1放入金属有机化学气相沉积(MOCVD设备中，在反应室中对Si衬底1 表面进行退火处理，温度1200摄氏度，时间15分钟；所得结构如图1。
步骤二，AlN成核层2外延在Si衬底1上面；所得结构如图2。
步骤三，第一AlGaN缓冲层3、第二AlGaN缓冲层4、第三AlGaN缓冲层5依次外延在AlN 成核层2上面，一共三层，其Al元素摩尔含量依次下降，分别取值0.7、0.5和0.3，单层厚度依 次增加，分别取值为300nm、500nm和700nm；所得结构如图3。
步骤四，循环重复以下步骤4a)和4b)共3次，在第三AlGaN缓冲层5基础上外延GaN：Fe/GaN高阻层6，所得结构如图4。图9是本发明实施例1中GaN：Fe/GaN高阻层的Cp2Fe的 流量变化曲线。Cp2Fe的流量呈周期性变化，Fe杂质的掺杂浓度也呈周期性变化。生长故意铁掺 杂GaN层时，通入Cp2Fe，故意铁掺杂GaN层的电阻高，生长非故意掺杂GaN层时，不通入Cp2Fe， Cp2Fe的流量为零，Fe杂质的掺杂浓度为零，非故意掺杂GaN层的晶体质量高。二者交替生长， 得到较高电阻和晶体质量的GaN：Fe/GaN高阻层6。本实施例的Cp2Fe的流量变化曲线图9，可 以由设备上Cp2Fe的质量流量计监控数据得到。
4a)以二茂铁(Cp2Fe)作为Fe掺杂源，生长故意铁掺杂GaN层，Fe杂质的掺杂浓度为1E19cm‐3， 厚度为100nm；
4b)在故意铁掺杂GaN层上，不通入Cp2Fe，生长非故意掺杂GaN层，厚度为100nm。
步骤五，循环重复以下步骤5a)和5b)5次，在GaN：Fe/GaN高阻层6外延生长上GaN超晶格层7，所得结构如图5。图10和图11是本实施例1中GaN超晶格层的压力和V/III比的变化曲线。压力和V/III比呈周期性变化，生长低压/低V/III比GaN层时，生长压力低、V/III比低， 生长高压/高V/III比GaN层时，生长压力高、V/III比高。二者交替生长，得到GaN超晶格层7。 本实施例的压力变化曲线图10可以由设备上压力控制器监控数据得到。本实施例的V/III变化曲 线图11可以由设备上氨气的质量流量计监控数据得到。
5a)以低压和低V/III比的生长条件，生长低压/低V/III比GaN层，生长压力为50Torr，V/III 比为50，厚度为25nm；
5b)以高压和高V/III比的生长条件，生长高压/高V/III比GaN层，生长压力为300Torr，V/III 为110，厚度为25nm。
步骤六，GaN沟道层8外延在GaN超晶格层7上面，厚度为300nm；所得结构如图6。
步骤七，AlGaN势垒层9外延在GaN沟道层8上面，其Al元素摩尔含量为25％，厚度为25nm； 所得结构如图7。
步骤八，GaN帽层10外延在AlGaN势垒层9上，厚度为3nm，所得结构如图8，为一种基于Si衬底的GaN基高压HEMT器件外延结构。
在实施例1所述的样品上制备电极后，采用安捷伦B1505A源表测试射频器件的关态I‐V曲 线，得到图12的结果。图12中横坐标为电压，单位为V，纵坐标为漏电流，单位为A。实线为 现有外延结构的漏电流曲线，虚线为本发明外延结构的漏电流曲线；从图中可见，相对于现有外 延结构，本实施例的样品击穿电压更高，大于510V，比现有外延结构高一个50V，同时，关态 漏电较小，低于10‐6A/mm，比现有外延结构低一个数量级，夹断特性更好。
实施例2
Si衬底1为圆形，直径为8inch。Si衬底、AlN成核层、GaN沟道层、AlGaN势垒层和GaN帽层的厚度分别为1mm、0.5μm、300nm、30nm和5nm。
第一AlGaN缓冲层3、第二AlGaN缓冲层4、第三AlGaN缓冲层5总共三层，其中从下至上 每层的Al元素摩尔含量依次减小，分别为0.7、0.5和0.3，厚度依次增加，分别为300nm、500nm 和700nm。
GaN：Fe/GaN高阻层6由故意铁掺杂GaN层和非故意掺杂GaN层交替连接组成，每层的厚 度为150nm，周期为5个周期，故意铁掺杂GaN层的Fe杂质的掺杂浓度为5E19cm‐3。
GaN超晶格层7由低压和低V/III比条件下生长的低压/低V/III比GaN层和高压和高V/III比 条件下生长的高压/高V/III比GaN层周期性交替连接组成，每层的厚度为25nm，周期为5个周 期。
如图1～图8，一种基于Si衬底的GaN基射频器件外延结构的制造方法，包括如下步骤：
步骤一，将Si衬底放入金属有机化学气相沉积(MOCVD)设备中，在反应室中对Si衬底表 面进行退火处理，温度1200摄氏度，时间15分钟；
步骤二，AlN成核层2外延在Si衬底1上面；
步骤三，AlGaN缓冲层3‐5外延在AlN成核层2上面，一共三层，其Al元素摩尔含量依次下 降，分别取值0.7、0.5和0.3，单层厚度依次增加，分别取值为300nm、500nm和700nm；
步骤四，循环重复以下步骤4a)和4b)5次，在AlGaN缓冲层3‐5基础上外延GaN：Fe/GaN 高阻层6。
4a)以二茂铁Cp2Fe作为Fe掺杂源，生长故意铁Fe掺杂GaN层，Fe杂质的掺杂浓度为5E19cm‐3， 厚度为150nm；
4b)在故意铁Fe掺杂GaN层上，不通入Cp2Fe，生长非故意掺杂GaN层，厚度为150nm。
步骤五，循环重复以下步骤5a)和5b)5次，在GaN：Fe/GaN高阻层6外延生长上GaN超晶格层7。
5a)以低压和低V/III比的生长条件，生长低压/低V/III比GaN层，生长压力为50Torr，V/III
比为50，厚度为25nm；
5b)以高压和高V/III比的生长条件，生长高压/高V/III比GaN层，生长压力为300Torr，V/III 为110，厚度为25nm。
步骤六，GaN沟道层8外延在GaN超晶格层7上面，厚度为300nm；
步骤七，AlGaN势垒层9外延在GaN沟道层8上面，其Al元素摩尔含量为25％，厚度为25nm；
步骤八，GaN帽层10外延在AlGaN势垒层9上，厚度为3nm。
本实施例2与实施例1相比，GaN：Fe/GaN高阻层6的周期数更多、厚度更大、Fe杂质的 掺杂浓度更大，因此关态漏电比实施例1略低，击穿电压略高，击穿电压为600V，关态漏电较 为8x 10‐7A/mm。
实施例3
Si衬底1为圆形，直径为8inch。Si衬底、AlN成核层、GaN沟道层、AlGaN势垒层和GaN帽层的厚度分别为1mm、0.5μm、300nm、15nm和2nm。
AlGaN缓冲层3‐5总共三层，其中从下至上每层的Al元素摩尔含量依次减小，分别为0.7、 0.5和0.3，厚度依次增加，分别为300nm、500nm和700nm。
GaN：Fe/GaN高阻层6由故意铁Fe掺杂GaN层和非故意掺杂GaN层交替连接组成，每层 的厚度为100nm，周期为3个周期，故意铁Fe掺杂GaN层的Fe杂质的掺杂浓度为1E19cm‐3。
GaN超晶格层7由低压和低V/III比条件下生长的低压/低V/III比GaN层和高压和高V/III比 条件下生长的高压/高V/III比GaN层周期性交替连接组成，每层的厚度为50nm，周期为5个周 期。
如图1～图8，一种基于Si衬底的GaN基射频器件外延结构的制造方法，包括如下步骤：
步骤一，将Si衬底放入金属有机化学气相沉积(MOCVD)设备中，在反应室中对Si衬底表 面进行退火处理，温度1200摄氏度，时间15分钟；
步骤二，AlN成核层2外延在Si衬底1上面；
步骤三，第一AlGaN缓冲层3、第二AlGaN缓冲层4和第三AlGaN缓冲层5依次外延在AlN 成核层2上面，一共三层，其Al元素摩尔含量依次下降，分别取值0.7、0.5和0.3，单层厚度依 次增加，分别取值为300nm、500nm和700nm；
步骤四，循环重复以下步骤4a)和4b)共3次，在第三AlGaN缓冲层5基础上外延GaN：Fe/GaN高阻层6。
4a)以二茂铁Cp2Fe作为Fe掺杂源，生长故意铁掺杂GaN层，Fe杂质的掺杂浓度为1E19cm‐3， 厚度为150nm；
4b)在故意铁掺杂GaN层上，不通入Cp2Fe，生长非故意掺杂GaN层，厚度为150nm。
步骤五，循环重复以下步骤5a)和5b)5次，在GaN：Fe/GaN高阻层6外延生长上GaN超晶格层7。
5a)以低压和低V/III比的生长条件，生长低压/低V/III比GaN层，生长压力为50Torr，V/III 比为50，厚度为50nm；
5b)以高压和高V/III比的生长条件，生长高压/高V/III比GaN层，生长压力为300Torr，V/III 为110，厚度为25nm。
步骤六，GaN沟道层8外延在GaN超晶格层7上面，厚度为300nm；
步骤七，AlGaN势垒层9外延在GaN沟道层8上面，其Al元素摩尔含量为25％，厚度为25nm；
步骤八，GaN帽层10外延在AlGaN势垒层9上，厚度为3nm。
本实施例3与实施例1相比，GaN超晶格层的厚度更大，晶体质量较实施例1的晶体质量更 好，XRD的002面摇摆曲线半峰宽为418arcsec，102面摇摆曲线半峰宽为464arcsec。
该外延是基于Si衬底上的GaN基射频器件外延结构，通过优化工艺条件，一方面抑制材料 失效，另一方面提高薄膜质量，在大尺寸的Si衬底上制备的外延具有晶体质量高、沟道载流子 限域性好、漏电流小的特点。采用发明的外延结构制备的器件高击穿电压、高电流密度、低关态 漏电、优良的夹断特性，且高温下性能退化小。本发明的基于Si衬底的GaN基射频器件外延结 构制造工艺简单，重复性好，适用于高频率、高功率的无线通信、雷达等应用。
本发明的外延结构，通过GaN：Fe/GaN高阻层和GaN超晶格层的结构，具有晶体质量高的 优点，沟道载流子限域性好、漏电流小的特点。采用发明的外延结构制备的器件，与现有的外延 结构相比，击穿电压高、电流密度高、关态漏电低、夹断特性优良，且高温下性能退化小。
需要说明的是，实施例不构成对本发明的任何限制，显然对于本领域的专业人员来说，在了 解本发明内容和原理后，能够在不背离本发明的原理和范围的情况下，对本发明进行形式和细节 上的各种修正和改变，这些基于本发明的修正和改变仍在本发明的权利要求保护范围之内。

Claims (10)

1.一种基于Si衬底的GaN基射频器件外延结构，其特征在于，所述的GaN基射频器件外延结构从下至上由依次层叠的Si衬底、AlN成核层、AlGaN缓冲层、GaN：Fe/GaN高阻层、GaN超晶格层、GaN沟道层、AlGaN势垒层和GaN帽层组成；其中，GaN：Fe/GaN高阻层由故意铁掺杂GaN层和非故意掺杂GaN层交替连接组成；所述的故意铁掺杂GaN层和非故意掺杂GaN层每层的厚度都为100nm～200nm；GaN超晶格层由低压/低V/III比GaN层和高压/高V/III比GaN层周期性交替连接组成；所述的低压/低V/III比GaN层和高压/高V/III比GaN层每层的厚度都为20～50nm。
2.根据权利要求1所述的基于Si衬底的GaN基射频器件外延结构，其特征在于，所述的低压/低V/III比GaN层和高压/高V/III比GaN层的重复周期为3～5个周期。
3.根据权利要求1所述的基于Si衬底的GaN基射频器件外延结构，其特征在于，所述的故意铁掺杂GaN层和非故意掺杂GaN层的重复周期为3～5个周期，故意铁掺杂GaN层的Fe杂质的掺杂浓度为1E19cm‐3～1E20cm‐3。
4.根据权利要求1所述的基于Si衬底的GaN基射频器件外延结构，其特征在于，所述的AlGaN缓冲层总共三层，其中从下至上每层的Al元素摩尔含量百分比依次减小，且都在20～70％的范围内，厚度依次增加，且都在200nm～800nm的范围内。
5.根据权利要求1所述的基于Si衬底的GaN基射频器件外延结构，其特征在于，所述的Si衬底为圆形，直径为6inch‐10inch。
6.根据权利要求1所述的基于Si衬底的GaN基射频器件外延结构，其特征在于，所述的Si衬底、AlN成核层、AlGaN缓冲层、GaN沟道层、AlGaN势垒层和GaN帽层的厚度分别为0.5‐2mm、0.2‐1μm、600‐2400nm、100‐500nm、10‐30nm和2‐5nm。
7.根据权利要求1～6任一项所述的基于Si衬底的GaN基射频器件外延结构的制造方法，其特征在于包括如下步骤:
1)将Si衬底放入金属有机化学气相沉积设备中，在反应室中对Si衬底表面进行退火处理；
2)在衬底上外延生长AlN成核层；
3)在AlN成核层的基础上外延生长AlGaN缓冲层，共三层，其Al元素的摩尔含量百分依次下降，且都在20～70％的范围内，厚度依次增加，且都在200nm～800nm的范围内；
4)循环重复以下步骤4a)和4b)多次，在AlGaN缓冲层基础上外延GaN：Fe/GaN高阻层；
4a)以Cp2Fe作为Fe掺杂源，生长故意铁掺杂GaN层，Fe杂质的掺杂浓度为1E19cm‐3～1E20cm‐3，厚度为100nm～200nm；
4b)在故意铁掺杂GaN层上，不通入Cp2Fe，生长非故意掺杂GaN层，厚度为100nm～200nm；
5)循环重复以下步骤5a)和5b)多次，在GaN：Fe/GaN高阻层外延生长上GaN超晶格层；
5a)以低压和低V/III比的生长条件，生长低压/低V/III比GaN层，生长压力为50Torr～100Torr，V/III比小于50，厚度为20～50nm；
5b)以高压和高V/III比的生长条件，生长高压/高V/III比GaN层，生长压力为300Torr～400Torr，V/III比大于110，厚度为20～50nm：
6)外延生长GaN沟道层；
7)外延生长AlGaN势垒层；
8)外延生长GaN帽层。
8.根据权利要求7所述的基于Si衬底的GaN基射频器件外延结构的制造方法，其特征在于，步骤1)所述的退火处理的温度高于1100摄氏度，时间大于10分钟。
9.根据权利要求7所述的基于Si衬底的GaN基射频器件外延结构的制造方法，其特征在于，步骤2)所述的AlN成核层为后续生长提供成核节点，温度高于1200摄氏度。
10.根据权利要求7所述的基于Si衬底的GaN基射频器件外延结构的制造方法，其特征在于，步骤7)所述的AlGaN势垒层中Al元素的摩尔含量百分比为20～30％。
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