CN108461506A - 一种阵列基板及其制备方法、显示装置 - Google Patents

一种阵列基板及其制备方法、显示装置 Download PDF

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CN108461506A
CN108461506A CN201810260421.6A CN201810260421A CN108461506A CN 108461506 A CN108461506 A CN 108461506A CN 201810260421 A CN201810260421 A CN 201810260421A CN 108461506 A CN108461506 A CN 108461506A
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trepanning
array substrate
passivation layer
substrate
scan line
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郑在纹
王念念
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BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
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Priority to CN201810260421.6A priority Critical patent/CN108461506A/zh
Publication of CN108461506A publication Critical patent/CN108461506A/zh
Priority to US16/465,791 priority patent/US11127767B2/en
Priority to PCT/CN2018/115177 priority patent/WO2019184380A1/zh
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Abstract

本申请提供了一种阵列基板及其制备方法、显示装置，所述阵列基板包括基板、有机膜层和钝化层，所述有机膜层位于所述基板和所述钝化层之间，所述钝化层上设置有透气孔；通过钝化层上的透气孔，可以将有机膜层在工艺制程中产生的杂质气体及时排出，确保基板上的器件如TFT特性等不受影响。

Description

一种阵列基板及其制备方法、显示装置
技术领域
本发明涉及显示面板技术领域，特别是涉及一种阵列基板及其制备方法、显示装置。
背景技术
在现有显示产品的阵列基板中，为了使金属层之间相互绝缘，或者为了降低金属层之间的耦合电容，一般在金属层之间设置有机膜层。但是，在这种产品的制作过程中需要对有机膜层进行退火处理，在退火工艺过程中容易挥发出杂质气体，而有机膜层的上下一般都设置有钝化层，杂质气体无法扩散出去，导致其向下渗透，最终扩散至有源层，对TFT的Ion/Ioff特性造成影响，甚至会导致TFT失效。
发明内容
本发明提供一种阵列基板及其制备方法、显示装置，以导出有机膜层在工艺过程中产生的气体，确保有机膜层周围的器件特性不受影响。
为了解决上述问题，本发明公开了一种阵列基板，包括基板、有机膜层和钝化层，所述有机膜层位于所述基板和所述钝化层之间；
其中，所述钝化层上设置有透气孔。
优选地，所述阵列基板包括显示区域和测试区域；所述显示区域和所述测试区域的基板均包括有源层，所述透气孔包括第一开孔，所述第一开孔在所述有源层所在平面上的正投影与所述有源层的距离满足预设条件。
优选地，所述显示区域的基板还包括交叉排布的扫描线和数据线，所述透气孔还包括第二开孔，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线上，和/或所述第二开孔在所述数据线所在平面上的正投影位于所述数据线上。
优选地，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线和所述数据线的交叉区域。
优选地，在所述显示区域，所述有机膜层和所述钝化层之间还设置有公共电极层。
优选地，在所述测试区域，所述有机膜层上设置有第三开孔，所述第三开孔与所述第一开孔贯通。
优选地，所述有源层的材质为铟镓锌氧化物IGZO。
优选地，所述透气孔的直径大于或等于2μm。
为了解决上述问题，本发明还公开了一种显示装置，包括上述任一项所述的阵列基板。
为了解决上述问题，本发明还公开了一种阵列基板的制备方法，包括：
提供基板，在所述基板上依次形成有机膜层和钝化层；
在所述钝化层上形成透气孔。
优选地，所述阵列基板包括显示区域和测试区域；所述显示区域和所述测试区域的基板均包括有源层，在所述钝化层上形成透气孔的步骤，包括：
在所述钝化层上形成第一开孔，所述第一开孔在所述有源层所在平面上的正投影与所述有源层的距离满足预设条件。
优选地，所述显示区域的基板还包括交叉排布的扫描线和数据线，在所述钝化层上形成透气孔的步骤，还包括：
在所述钝化层上形成第二开孔，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线上，和/或所述第二开孔在所述数据线所在平面上的正投影位于所述数据线上。
优选地，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线和所述数据线的交叉区域。
优选地，所述方法还包括：
在所述测试区域的有机膜层上形成第三开孔，所述第三开孔与所述第一开孔贯通。
与现有技术相比，本发明包括以下优点：
本申请提供了一种阵列基板及其制备方法、显示装置，所述阵列基板包括基板、有机膜层和钝化层，所述有机膜层位于所述基板和所述钝化层之间，所述钝化层上设置有透气孔；通过钝化层上的透气孔，可以将有机膜层在工艺制程中产生的杂质气体及时排出，确保基板上的器件如TFT特性等不受影响。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对本发明实施例的描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1示出了本发明一实施例提供的一种阵列基板的结构示意图；
图2示出了本发明一实施例提供的显示区域的阵列基板的平面结构示意图；
图3示出了本发明一实施例提供的测试区域的阵列基板的平面结构示意图；
图4示出了本发明一实施例提供的显示区域的阵列基板沿AA’的剖面结构示意图；
图5示出了本发明一实施例提供的测试区域的阵列基板沿DD’的剖面结构示意图；
图6示出了本发明一实施例提供的显示区域的阵列基板沿BB’的剖面结构示意图；
图7示出了本发明一实施例提供的显示区域的阵列基板沿CC’的剖面结构示意图；
图8示出了本发明一实施例提供的一种阵列基板的制备方法的步骤流程图；
附图标记说明：
11-基板；12-有机膜层；13-钝化层；14-透气孔；21-薄膜晶体管；22-扫描线；23-数据线；40-第一开孔；41-玻璃衬底；43-栅极绝缘层；44-有源层；46-源极绝缘层；47-公共电极层；48-像素电极层；49-搭接孔；51-第三开孔；61-第二开孔。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本发明作进一步详细的说明。
本申请一实施例提供了一种阵列基板，参照图1，该阵列基板包括基板11、有机膜层12和钝化层13，有机膜层12位于基板11和钝化层13之间；其中，钝化层13上设置有透气孔14。
在实际应用中，上述阵列基板可以包括显示区域和测试区域，参照图2示出了显示区域的阵列基板的平面结构示意图，图3示出了测试区域的阵列基板的平面结构示意图。
显示区域和测试区域的基板均可以包括薄膜晶体管TFT 21，薄膜晶体管21包括有源层；显示区域的基板还包括交叉排布的扫描线22和数据线23。在显示区域，钝化层13背离有机膜层12的表面还可以设置有像素电极层48，在这种结构中，参照图4，像素电极层48需要通过设置在钝化层13以及有机膜层12上的搭接孔49与薄膜晶体管21的源漏极实现电连接。值得注意的是，本实施例中在钝化层13上设置的透气孔14与实现电连接的搭接孔49不同，但二者可以同步形成，具体可以参考后续实施例的描述。
在阵列基板的制作工艺过程中，往往需要监测显示区域的TFT特性，如EPM(Electrical parameter measurement)参数等，而EPM参数是通过Prober Contact测试进行，该测试手段为损伤不可逆操作，所以EPM测试一般在测试区域的薄膜晶体管21上进行。因此，测试区域的薄膜晶体管21用于在工艺过程中通过测试其EPM参数，以表征显示区域的TFT特性。
有机膜层12可以是设置在金属层和金属层之间的绝缘材料，其作用可以使金属层间绝缘，或者增大金属层的间距，从而降低金属层之间的耦合电容，因此也可以叫做层间介质层(ILD)。有机膜层12的材质可以为SiO2，Si3N4、气凝胶、高分子材料等，在工艺制程中，如高温退火过程中容易产生杂质气体。现有技术中，由于钝化层13的阻隔使杂质气体不能向外扩散，导致处于封闭空间的杂质气体向下渗透，可能会与基板上的有源层发生反应而影响TFT的开关特性，甚至导致TFT失效。
为了解决这一问题，本实施例通过在钝化层13上设置透气孔14，该透气孔14可以设置在钝化层13上的任意位置，例如，可以设置在有源层在钝化层13上的正投影区域或者正投影周围区域，还可以设置在基板上的数据线和/或扫描线在钝化层13上的正投影区域，还可以设置在有效显示区域。具体透气孔的设置位置、大小以及数量可以根据有机膜层的排气量、退火温度、时间、膜质等参数特性模拟后计算获取，本申请对此均不作限定。
本实施例提供的阵列基板，通过钝化层上的透气孔，可以将有机膜层在工艺制程中产生的杂质气体及时排出，确保基板上的器件如TFT特性等不受影响。
为了有针对性地避免杂质气体对有源层的影响，上述实施例中的透气孔可以包括第一开孔40，该第一开孔40在有源层44所在平面上的正投影与有源层44的距离满足预设条件。其中，预设条件是指第一开孔40在有源层44所在平面上的正投影可以位于有源层44区域，也可以位于靠近有源层44的周围区域。
参照图4示出了显示区域的阵列基板沿AA’的剖面结构示意图，显示区域沿AA’方向的阵列基板自下而上依次包括玻璃衬底41、栅线或扫描线22、栅极绝缘层43、有源层44、源漏电极或数据线23、源极绝缘层46、有机膜层12、公共电极层47、钝化层13以及像素电极层48。其中，设置在有机膜层12和钝化层13之间的公共电极层48的厚度大约在300-1000埃之间，具有导电功能，同时还具有隔绝水分子、透过气体的功能，例如材质可以为ITO或者MoNb等。为了进一步提高杂质气体的扩散率，在薄膜晶体管21对应区域的公共电极层47上还可以设置开孔，该开孔可以与钝化层13上的第一开孔40贯通；进一步地，在薄膜晶体管21对应的区域还可以不设置公共电极层47，以使杂质气体及时排出，更有效地保护薄膜晶体管21。需要注意的是，有机膜层12和钝化层13之间的公共电极层47不是必需的，在实际应用中可以根据显示模式等具体确定。
参照图5示出了测试区域的阵列基板沿DD’的剖面结构示意图，测试区域沿DD’方向的阵列基板自下而上依次包括玻璃衬底41、栅线或扫描线22、栅极绝缘层43、有源层44、源漏电极或数据线23、源极绝缘层46、有机膜层12以及钝化层13，与显示区域相比，测试区域没有公共电极层47和像素电极层48。测试区域的有机膜层12上还可以设置有第三开孔51，该第三开孔51与第一开孔40贯通，从而使杂质气体更充分及时地扩散出去。
第一开孔40在钝化层13上的排列方式可以等间距排列，也可以非等间距排列；可以是水平和/或垂直方向排列。第一开孔40的具体位置、数量以及大小可以根据排气量、退火温度等参数模拟确定，本申请不作具体限定。需要注意的是，第一开孔40在显示区域和测试区域的设置方式，包括设置位置、数量以及大小等，应当尽量保持一致，这样可提高测试区域与显示区域TFT特性的一致性，确保测试区域TFT特性的参考价值。
为了进一步避免杂质气体对显示区域的扫描线22和数据线23金属层的影响，参照图6示出了显示区域的阵列基板沿BB’的剖面结构示意图，图7示出了显示区域的阵列基板沿CC’的剖面结构示意图。上述透气孔14还可以进一步包括第二开孔61，第二开孔61在扫描线22所在平面上的正投影位于扫描线22上，和/或第二开孔61在数据线23所在平面上的正投影位于数据线23上。也就是，第二开孔61在基板所在平面上的正投影可以分布在扫描线22上，或者分布在数据线23上，还可以既分布在扫描线22上也分布在数据线23上。同样，第二开孔61的排列方式可以等间距排列，也可以非等间距排列；可以是水平和/或垂直方向排列，具体可以根据需求设置。第二开孔61在扫描线22所在平面上的正投影还可以位于扫描线22和数据线23的交叉区域。
上述各实施例中有源层44的材质可以为铟镓锌氧化物IGZO、非晶硅、低温多晶硅等。
上述各实施例中透气孔14的直径可以大于或等于2μm。透气孔14的大小可以根据实际情况设定，本申请不作具体限定。
本申请另一实施例还提供了一种显示装置，包括上述任一实施例所述的阵列基板。
本申请另一实施例还提供了一种阵列基板的制备方法，参照图8，可以包括：
步骤801：提供基板，在基板上依次形成有机膜层和钝化层。
具体的，基板上的层结构都可以通过下述的构图工艺形成：成膜，利用磁控溅射等形成特定膜层，如金属膜、非金属膜以及像素电极等；曝光显影，利用PR材料涂覆并结合掩膜版对PR材料进行曝光和显影，形成特定图形；刻蚀，分为Dry Etch和Wet Etch，可以对曝光显影后暴露区域的膜层进行Etch，形成导通必需的线路及器件。
步骤802：在钝化层上形成透气孔。
具体的，形成透气孔的过程同样可以利用上述的曝光显影以及刻蚀等一系列构图工艺形成。在实际应用，该步骤可以与像素电极连接源漏电极的搭接孔同步形成，只需对掩膜版进行相应修改即可。
为了更充分地扩散杂质气体，上述的制备方法还可以包括：
步骤803：在测试区域的有机膜层上形成第三开孔，第三开孔与第一开孔贯通。
具体的，第三开孔的形成工艺，可以以有机膜层上的钝化层作为掩膜版，对有机膜层进行曝光和显影，从而形成第三开孔。需要注意的是，步骤803不是必须的，工艺过程可以根据实际情况具体确定。
具体的，阵列基板可以包括显示区域和测试区域；显示区域和测试区域的基板均包括有源层，上述步骤802可以进一步包括：
在钝化层上形成第一开孔，第一开孔在有源层所在平面上的正投影与有源层的距离满足预设条件。
显示区域的基板还包括交叉排布的扫描线和数据线，上述步骤802还可以包括：
在钝化层上形成第二开孔，第二开孔在扫描线所在平面上的正投影位于扫描线上，和/或第二开孔在数据线所在平面上的正投影位于数据线上。
其中，第二开孔在扫描线所在平面上的正投影位于扫描线和数据线的交叉区域。
本申请实施例提供了一种阵列基板及其制备方法、显示装置，所述阵列基板包括基板、有机膜层和钝化层，所述有机膜层位于所述基板和所述钝化层之间，所述钝化层上设置有透气孔；通过钝化层上的透气孔，可以将有机膜层在工艺制程中产生的杂质气体及时排出，确保基板上的器件如TFT特性等不受影响。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
以上对本发明所提供的一种阵列基板及其制备方法、显示装置进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (14)

1.一种阵列基板，其特征在于，包括基板、有机膜层和钝化层，所述有机膜层位于所述基板和所述钝化层之间；
其中，所述钝化层上设置有透气孔。
2.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板包括显示区域和测试区域；所述显示区域和所述测试区域的基板均包括有源层，所述透气孔包括第一开孔，所述第一开孔在所述有源层所在平面上的正投影与所述有源层的距离满足预设条件。
3.根据权利要求2所述的阵列基板，其特征在于，所述显示区域的基板还包括交叉排布的扫描线和数据线，所述透气孔还包括第二开孔，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线上，和/或所述第二开孔在所述数据线所在平面上的正投影位于所述数据线上。
4.根据权利要求3所述的阵列基板，其特征在于，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线和所述数据线的交叉区域。
5.根据权利要求2所述的阵列基板，其特征在于，在所述显示区域，所述有机膜层和所述钝化层之间还设置有公共电极层。
6.根据权利要求2所述的阵列基板，其特征在于，在所述测试区域，所述有机膜层上设置有第三开孔，所述第三开孔与所述第一开孔贯通。
7.根据权利要求2至6任一项所述的阵列基板，其特征在于，所述有源层的材质为铟镓锌氧化物IGZO。
8.根据权利要求1至6任一项所述的阵列基板，其特征在于，所述透气孔的直径大于或等于2μm。
9.一种显示装置，其特征在于，包括权利要求1至8任一项所述的阵列基板。
10.一种阵列基板的制备方法，其特征在于，包括：
提供基板，在所述基板上依次形成有机膜层和钝化层；
在所述钝化层上形成透气孔。
11.根据权利要求10所述的制备方法，其特征在于，所述阵列基板包括显示区域和测试区域；所述显示区域和所述测试区域的基板均包括有源层，在所述钝化层上形成透气孔的步骤，包括：
在所述钝化层上形成第一开孔，所述第一开孔在所述有源层所在平面上的正投影与所述有源层的距离满足预设条件。
12.根据权利要求11所述的制备方法，其特征在于，所述显示区域的基板还包括交叉排布的扫描线和数据线，在所述钝化层上形成透气孔的步骤，还包括：
在所述钝化层上形成第二开孔，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线上，和/或所述第二开孔在所述数据线所在平面上的正投影位于所述数据线上。
13.根据权利要求12所述的制备方法，其特征在于，所述第二开孔在所述扫描线所在平面上的正投影位于所述扫描线和所述数据线的交叉区域。
14.根据权利要求11所述的制备方法，其特征在于，所述方法还包括：
在所述测试区域的有机膜层上形成第三开孔，所述第三开孔与所述第一开孔贯通。
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CN113900293A (zh) * 2020-06-22 2022-01-07 京东方科技集团股份有限公司 阵列基板及其制作方法、液晶显示面板和显示装置

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