CN108321196A - A kind of trench gate charge storage type IGBT and preparation method thereof - Google Patents

A kind of trench gate charge storage type IGBT and preparation method thereof Download PDF

Info

Publication number
CN108321196A
CN108321196A CN201810113820.XA CN201810113820A CN108321196A CN 108321196 A CN108321196 A CN 108321196A CN 201810113820 A CN201810113820 A CN 201810113820A CN 108321196 A CN108321196 A CN 108321196A
Authority
CN
China
Prior art keywords
type semiconductor
conductive type
layer
electrode
charge storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201810113820.XA
Other languages
Chinese (zh)
Other versions
CN108321196B (en
Inventor
张金平
赵倩
赵阳
刘竞秀
李泽宏
张波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China
Original Assignee
University of Electronic Science and Technology of China
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China filed Critical University of Electronic Science and Technology of China
Priority to CN201810113820.XA priority Critical patent/CN108321196B/en
Publication of CN108321196A publication Critical patent/CN108321196A/en
Application granted granted Critical
Publication of CN108321196B publication Critical patent/CN108321196B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]

Abstract

A kind of trench gate charge storage type IGBT and preparation method thereof, belongs to power semiconductor device technology field.By reducing the depth that emitter region extends along base area top layer in conventional trench gate charge storage type IGBT structure, and introduce division trench gate structure, the division trench gate structure includes the Split Electrode and its side Split Electrode dielectric layer that gate electrode and its side gate dielectric layer are connected with positioned at gate electrode bottom and by gate dielectric layer, the Split Electrode and emitter metal equipotential.Device architecture proposed by the present invention is while limitation of the doping concentration and thickness for avoiding charge storage layer to device pressure resistance, it improves the tradeoff between short-circuit safety operation area, temperature characterisitic, device forward conduction voltage drop Vceon and the turn-off power loss Eoff of device, avoid electric current, voltage oscillation and the EMI problems in device unlatching dynamic process, improve the reliability of device.

Description

A kind of trench gate charge storage type IGBT and preparation method thereof
Technical field
The invention belongs to power semiconductor device technology field, more particularly to a kind of trench gate charge storage type insulated gate is double Bipolar transistor (CSTBT).
Background technology
Insulated gate bipolar transistor (IGBT) is grinding based on power MOSFET and power bipolar junction transistor npn npn (BJT) Study carefully the novel power transistor that developed, is equivalent to the MOSFET of bipolar junction transistor (BJT) driving.IGBT has both work( The advantages of rate MOSFET structure and bipolar junction transistor (BJT) structure：Both there is power MOSFET to be easy to driving, input impedance Advantage low, switching speed is fast, and with bipolar junction transistor (BJT) on state current density is big, conduction voltage drop is low, loss Advantage small, stability is good.Based on these excellent device properties, IGBT, which has become, in recent years is widely used in mesohigh neck The mainstream power device in domain, such as the driving of electric vehicle, motor, interconnection technology, energy-accumulating power station, AC/DA conversions and frequency control Deng.
Since IGBT inventions, people have been devoted to improve the comprehensive performance of IGBT, by development in thirties years, industry Boundary proposes the performance that seven generation IGBT structures constantly to be promoted device in succession.Initial NPT type IGBT structures are also referred to as symmetric form IGBT structure, forward blocking and reverse blocking state mainly by be lightly doped N-type drift region pressure resistance, therefore with it is equal just To breakdown voltage and breakdown reverse voltage, however, to ensure that pressure-resistant, need that N-type drift region doping concentration is low and thickness is big, this The increase of forward conduction voltage, switching characteristic can be caused to be deteriorated, while the compromise between forward conduction voltage and turn-off power loss is special Property deteriorate.Later, IGBT had developed the structure with FS layers, and the doping concentration that FS layers of N-type is dense higher than the doping of N-type drift region It spends, FS-IGBT structures have the thickness of thinner drift region under same voltage endurance capability, can be born for FS layers after the generation break-through of drift region Part blocks voltage improves the switching speed of device to reduce the conduction voltage drop of device；But FS-IGBT structures are anti- To when pressure resistance, backward voltage is mainly born by FS layers of PN junction formed of p-type collecting zone and N-type, and breakdown reverse voltage is low, anti- Decline to the performance of device when blocking application, in the application scenario for needing IGBT that there is reverse blocking ability, it has to a height of connecting Diode is pressed to realize reversed pressure resistance, which increase costs, reduce the Performance And Reliability of system.7th generation IGBT structure --- Trench gate charge storage type insulated gate bipolar transistor (CSTBT) is that have higher-doped by being introduced below p-type base area Concentration and certain thickness N-type charge storage layer introduce hole barrier below p-type base area so that device is close to emitter terminal Hole concentration greatly promote, and required that electron concentration herein will be greatly increased according to electroneutral, improving entire N-type with this drifts about The carrier concentration profile in area enhances the conductivity modulation effect of N-type drift region, and IGBT is made to obtain lower forward conduction voltage drop And the more preferably tradeoff of forward conduction voltage drop and turn-off power loss.As N-type charge storage layer doping concentration is higher, The improvement of CSTBT conductivity modulation effects is bigger, and the forward conduction characteristic of device is also better.However, as N-type charge storage layer is mixed The continuous improvement of miscellaneous concentration can cause CSTBT device electric breakdown strengths to significantly reduce, and which has limited the doping of N-type charge storage layer Concentration and thickness.In addition it uses trench gate IGBT structure to eliminate the areas the JFET resistance of planar gate IGBT structure, and then obtains more High MOS gully densities so that the characteristic of device is significantly improved.It is tradition FS CSTBT device architectures as shown in Figure 1, In order to effectively shield the adverse effect of N-type charge storage layer, higher device pressure resistance is obtained, the following two kinds mode is mainly used：
(1) deep trench gate depth usually makes the depth of trench gate be more than the junction depth of N-type charge storage layer；
(2) small cellular width, that is, improving MOS structure gully density keeps trench gate spacing as small as possible；
Mode (1) can increase gate-emitter capacitance and grid-collector capacitance while implementation, and the switch of IGBT Process is substantially exactly the process to grid capacitance progress charge/discharge, so, when the increase of grid capacitance can make charge/discharge Between increase, in turn result in switching speed reduction.Thus, deep trench gate depth will reduce devices switch speed, increase device Switching loss influences the compromise characteristic of break-over of device pressure drop and switching loss；And the implementation of mode (2) is on the one hand by enhancer The grid capacitance of part causes devices switch speed to reduce, switching loss increase, influences the folding of break-over of device pressure drop and switching loss Middle characteristic, the big gully density of another aspect will also increase the saturation current density of device, make shorted devices safety operation area (SCSOA) it is deteriorated.In addition, the gate oxide in trench gate structure is formed in the trench by a thermal oxide, in order to ensure Certain threshold voltage, therefore it is required that the thickness of entire gate oxide is smaller, however the thickness of mos capacitance size and oxide layer It is inversely proportional, this grid capacitance allowed in traditional C/S TBT devices dramatically increases, while the electric field concentration effect meeting of channel bottom The breakdown voltage for reducing device, causes the reliability of device poor.
Invention content
In view of described above, it is an object of the invention to：For deficiency in the prior art, a kind of trench gate charge is provided Storage-type IGBT and preparation method thereof, the depth extended along device top layer through reduction emitter region simultaneously introduce division trench gate knot Structure improves the short circuit peace of device while limitation of the doping concentration and thickness for avoiding charge storage layer to device pressure resistance Full workspace, the compromise for improving temperature characterisitic, improving between device forward conduction voltage drop Vceon and turn-off power loss Eoff are closed Be, avoid device open dynamic process in electric current, voltage oscillation and EMI problems, improve the reliability of device.
To achieve the goals above, the present invention adopts the following technical scheme that：
On the one hand, the present invention provides a kind of trench gate charge storage type IGBT, secondly point a cellular include from lower and On be cascading collector electrode metal 14, the first conductive type semiconductor collecting zone 13, the second conductive type semiconductor drift Move area 9 and emitter metal 1；The top layer of second conductive type semiconductor drift region 9 is respectively provided with the second conduction type half Conductor charge accumulation layer 6, the first conductive type semiconductor base area 5, the first conductive type semiconductor body contact zone 4 and second are conductive Type semiconductor emitter region 3；First conductive type semiconductor base area 5 is located at the second conductive type semiconductor charge storage layer 6 top layer；First conductive type semiconductor body contact zone 4 and the second conductive type semiconductor emitter region 3 are independently of each other and arranged side by side Top layer positioned at the first conductive type semiconductor base area 5, it is characterised in that：Second conductive type semiconductor emitter region 3 is first The extension depth of 5 top layer of conductive type semiconductor base area is less than the first conductive type semiconductor base area 5 in the second conduction type half The extension depth of 6 top layer of conductor charge accumulation layer；The top layer of second conductive type semiconductor drift region 9 also has division ditch Slot grid structure, the division trench gate structure includes gate electrode 71, gate dielectric layer 72, Split Electrode set on 71 side of gate electrode 81 and the Split Electrode dielectric layer 82 set on 81 side of Split Electrode, the Split Electrode 81 and the gate electrode 71 are in the devices Extending direction it is consistent；And its gate dielectric layer 72 and Split Electrode 81 of side and its Split Electrode dielectric layer 82 of side；Institute State gate electrode 71 from device top layer down through depth be less than the second conductive type semiconductor charge storage layer 6 junction depth, point Split electrode 81 down through depth be more than the second conductive type semiconductor charge storage layer 6 junction depth；Gate electrode 71 and second Conductive type semiconductor emitter region 3, the first conductive type semiconductor base area 5 and the second conductive type semiconductor charge storage layer 6 Between by gate dielectric layer 72 be connected；Split Electrode 81 is at least led with the second conductive type semiconductor charge storage layer 6 and second It is connected by Split Electrode dielectric layer 82 between electric type semiconductor drift region 9；Gate electrode 71 and its gate dielectric layer of side 72 Upper surface have spacer medium layer 2；Spacer medium layer 2, the first conductive type semiconductor body contact zone 4 and the second conduction type The upper surface in semiconductor emission area 3 is connected with emitter metal 1.
Further, the Split Electrode 81 and 1 equipotential of emitter metal.
Further, Split Electrode 81 and 1 equipotential of emitter metal.
Further, Split Electrode 81 is more than grid electricity along the depth that 9 top layer of the second conductive type semiconductor drift region extends The depth that pole 71 extends so that 81 semi-surrounding gate electrode 71 of Split Electrode and its setting of the gate dielectric layer 72 of side, Split Electrode It is connected by gate dielectric layer 72 between 81 and gate electrode 71, at this point, Split Electrode 81 is contacted with the first conductive type semiconductor body It is connected by Split Electrode dielectric layer 82 between area 4, the first conductive type semiconductor base area 5.
Further, gate electrode 71 is equal to division electricity along the depth that 9 top layer of the second conductive type semiconductor drift region extends The depth that pole 81 extends, and the part of Split Electrode 81 is located at 71 lower section of gate electrode, another part be located at device top layer and It is connected by gate dielectric layer 72 between gate electrode 71, the gate electrode 71 is less than Split Electrode along the width that device top layer extends 81 width extended；At this point, Split Electrode 81 and the first conductive type semiconductor body contact zone 4, the first conductive type semiconductor It is connected by Split Electrode dielectric layer 82 between base area 5；As embodiment, the thickness of the Split Electrode dielectric layer 82 is more than The thickness of gate dielectric layer 72.
Further, the second conductive type semiconductor emitter region 3 and the first conductive type semiconductor body contact zone 4 are located at the One conductive type semiconductor base area, 5 top central, Split Electrode 81 are located at 71 lower section of gate electrode, and partly with the second conduction type Conductor emitter region 3 by gate dielectric layer 72 be connected gate electrode 71 thickness be more than not with the second conductive type semiconductor emitter region The thickness of the thickness of 3 connected gate electrodes 71, i.e. gate dielectric layer 72 in device top layer middle section is less than the thickness of its both ends part Degree.It is electric with grid in the structure under the conditions of identical grid voltage since the threshold voltage of MOS structure is inversely proportional with oxidated layer thickness The face center part of the first conductive type semiconductor base area 5 that pole 71 is connected by gate dielectric layer 72 along the z-axis direction is formed instead Type layer, at this time the surface both ends part of the first conductive type semiconductor base area 5 along the z-axis direction can't form inversion layer, in this way The gully density that device would not be increased, to not interfere with the short-circuit trouble free service zone properties of device.
Further, also there is the first conductive type semiconductor layer 1 in the bottom of division trench gate structure.
It is preferred that first conductive type semiconductor layer 10 extends laterally to the second conductive type semiconductor electricity In second conductive type semiconductor drift region 9 of 6 lower section of lotus accumulation layer.
Further, also there is N-type region in the first conductive type semiconductor collecting zone 13, form RC-IGBT structures.
Further, the first conductive type semiconductor collecting zone 13 and the second conductive type semiconductor drift region 9 it Between also have the second conductive type semiconductor field stop layer 12, formed FS IGBT structures.
Further, when device is FS IGBT structures, device back, which also has, runs through the first conductive type semiconductor collection Electric area 13 and the second conductive type semiconductor field stop layer 12 enter the groove current collection in the second conductive type semiconductor drift region 9 Pole structure 11.
Specifically, the groove collector structure includes groove collector 111 and its groove collector dielectric layer of side 112, the groove collector 111 and 14 equipotential of metal collector, the groove collector 111 pass through groove collector medium Layer 112 and the first conductive type semiconductor collecting zone 13, the second conductive type semiconductor field stop layer 12 and the second conduction type Drift semiconductor area 9 is isolated.
Further, also there is the first conductive type semiconductor layer 2 15 in the bottom of groove collector structure.
Further, semi-conducting material used in device is any one in Si, SiC, GaAs and GaN or a variety of, each to tie Semi-conducting material of the same race can be used in structure or semi-conducting material not of the same race is combined.
Further, the gate electrode in groove is any one in polysilicon, SiC, GaAs and GaN or a variety of, each portion Point same material can be used or non-same material is combined.
In above-mentioned all technical solutions, the first conductive type semiconductor is P-type semiconductor, and the second conductive type semiconductor is N-type semiconductor；Or first conductive type semiconductor be N-type semiconductor, the second conductive type semiconductor be P-type semiconductor.
On the other hand the present invention provides a kind of preparation methods of trench gate charge storage type IGBT, which is characterized in that packet Include following steps：
Step 1：Make the second conductive type semiconductor drift region 9；
Step 2：By pre-oxidation, photoetching, etching, ion implanting and high-temperature annealing process, partly led in the second conduction type The front of body drift region 9 makes the second conductive type semiconductor charge storage layer 6 and is located at the second conductive type semiconductor charge First conductive type semiconductor base area 5 of 6 top layer of accumulation layer；
Step 3：By photoetching, etching, thermal oxide, depositing technics, in the second conductive type semiconductor charge storage layer 6 Upper etching forms first groove, and the depth of the first groove is more than the junction depth of the second conductive type semiconductor charge storage layer 6； Split Electrode dielectric layer 82 is formed in first groove inner wall, then deposition of electrode material forms Split Electrode 81 in the trench；
Step 4：By photoetching, etching, thermal oxide, depositing technics, carved on the second conductive type semiconductor drift region 9 Erosion forms second groove, and the depth of the second groove is less than the junction depth of the second conductive type semiconductor charge storage layer 6, and First groove is consistent along the direction that device top layer extends with second groove；Gate dielectric layer 72 is formed in second groove inner wall, then Deposition of electrode material forms gate electrode 71, the gate dielectric layer 72 and division of the gate electrode 71 and its side in second groove Electrode 81 and its Split Electrode dielectric layer 82 of side form division trench gate structure；
Step 5：By photoetching, etching, ion implanting and high-temperature annealing process, in the first conductive type semiconductor base area 5 Top layer make independently of each other and the first conductive type semiconductor body contact zone 4 being set up in parallel and the second conductive type semiconductor Emitter region 3；Extension depth of the second conductive type semiconductor emitter region 3 in 5 top layer of the first conductive type semiconductor base area Less than the first conductive type semiconductor base area 56 top layer of the second conductive type semiconductor charge storage layer extension depth, it is described Second conductive type semiconductor emitter region 3 is arranged close to gate electrode 71 and is connected with gate electrode 71 by gate dielectric layer 72；
Step 6：By photoetching, etching and depositing technics, is formed and be isolated in the upper surface of gate electrode 71 and gate dielectric layer 72 Dielectric layer 2；
Step 7：Surface deposition metal, by photoetching, etching technics in spacer medium layer 2, the first conductive type semiconductor The upper surface of body contact zone 4 and the second conductive type semiconductor emitter region 3 forms emitter metal 1；
Step 8：Semiconductor devices is overturn, the thickness of semiconductor is thinned, by ion implanting and high-temperature annealing process, Second conductive type semiconductor drift region, 9 back side injects the first conductive type impurity and forms the first conductive type semiconductor collecting zone 13；
Step 9：The back side deposits metal, and collector electrode metal 14 is formed on the first conductive type semiconductor collecting zone 13；Extremely Trench gate charge storage type IGBT device is made in this.
Further, formed in the step 5 the first conductive type semiconductor body contact zone 4 can in step 2 It is formed when forming the first conductive type semiconductor base area 5 or is formed in two steps together.
Further, the step of forming first groove and the second conductive type semiconductor charge storage layer 6 and first of formation The sequence of conductive type semiconductor base area 5 is commutative.
Further, it is made to be less than first groove in the devices by controlling the depth that second groove extends along device top layer The depth of extension forms the structure of first groove semi-surrounding second groove setting.
Further, the groove depth extended along device top layer by controlling second groove so that form gate electrode 71 along device The extension depth of top layer is equal to the extension depth of Split Electrode 81, but the gate electrode 71 is in the extension width at device top layer both ends It is divided less than the extension width of Split Electrode 81, while in device top layer also member-retaining portion Split Electrode dielectric layer 82 and a part 81 structure of electrode, and in subsequent step seven metal is deposited in 81 upper surface of Split Electrode.
Further, the width extended along device top layer by controlling second groove so that do not divided in device top layer 82 structure of electrode 81 and Split Electrode dielectric layer, Split Electrode 81 and Split Electrode dielectric layer 82 are located at 71 bottom of gate electrode；And And the thickness for the gate electrode 71 being connected by gate dielectric layer 72 with the second conductive type semiconductor emitter region 3 is more than and is not led with second The thickness of the connected gate electrode 71 of electric type semiconductor emitter region 3.
The comprehensive performance that device is improved with device architecture proposed by the present invention improves the reliability of device, below Elaborate the principle of device design of the present invention：
The present invention reaches the gully density of reduction MOS structure by reducing the depth that emitter region extends along base area top layer Purpose, as emitter region extends along base area top layer the reduction of depth, the gate electrode being connected by gate dielectric layer with emitter region and The depth extended in the same direction can also reduce, and not only reduce saturation current density in this way, improve the safety operation area SCSOA of device, and And the uniformity of conducting electric current can be improved, and then the reliability of device is improved, and improve its temperature characterisitic, and gate electrode edge Drift region top layer and the reduction for extending depth along device vertical direction, are also beneficial to the reduction of grid capacitance, especially grid-collection Electrode capacitance changes to improve switching speed, the switching loss for reducing device and the requirement to gate drive circuit ability of device Kind device forward conduction voltage drop Vceon and turn-off power loss EoffBetween tradeoff；Meanwhile the present invention is using division trench gate The Split Electrode of structure, introducing can play the role of charge storage layer effective charge compensation, effective shielded packaged food accumulation layer Electric field, avoid the limitation of the doping concentration and thickness of charge storage layer to device pressure resistance, so significantly improve device drift The carrier concentration profile for moving area, so as to improve device forward conduction voltage drop Vceon and turn-off power loss EoffBetween compromise close System makes device obtain broader short circuit safety operation area SCSOA；In addition, the Split Electrode introduced and emitter metal equipotential, It in this way will not shape with the semiconductor surface being connected with Split Electrode by Split Electrode dielectric layer in device opens dynamic process At accumulation or inversion layer, avoids device and negative differential capacity effect occur in opening dynamic process, to avoid device from opening Electric current, voltage oscillation and EMI problems in dynamic process, improve the reliability of device, meanwhile, the thickness of Split Electrode dielectric layer The thickness for being larger than gate dielectric layer can be thickeied, is conducive to the electric field concentration effect for improving channel bottom in this way, improves device Breakdown voltage, further improve the reliability of device.The present invention proposes the production method of device without increasing additional work Skill step is compatible with conventional trench gate charge storage type IGBT production methods.
The beneficial effects of the invention are as follows：
The present invention improves the uniformity of break-over of device electric current while reducing the gully density of MOS structure, reduces The saturation current density of device improves the short-circuit safety operation area of device；The electric field for shielding N-type charge storage layer, avoids The limitation of N-type charge storage layer doping concentration and thickness to device pressure resistance improves the carrier concentration point of device drift region Tradeoff between cloth and device forward conduction voltage drop Vceon and turn-off power loss Eoff；The switching speed of device is improved, is dropped The low switching loss of device and the requirement to gate drive circuit ability；Avoid device occur in opening dynamic process it is negative micro- Capacity effect and device is divided to open electric current, voltage oscillation and EMI problems in dynamic process；Improve the electric field collection of channel bottom Middle effect improves the breakdown voltage of device.Production method provided by the invention need not increase additional processing step, with biography The production method compatibility of system trench gate charge storage type IGBT.
Description of the drawings
Fig. 1 is the half structure cell schematic diagram of conventional trench gate charge storage type IGBT device；
Fig. 2 is that conventional trench gate charge storage type IGBT device forms spacer medium layer and emitter when making Facad structure Structural schematic diagram before metal；
Fig. 3 is that the half structure cell of conventional trench gate charge storage type IGBT device is illustrated along the section of AB lines Figure；
Fig. 4 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides Structure schematic diagram；
Fig. 5 be the embodiment of the present invention 1 provide a kind of trench gate charge storage type IGBT device remove spacer medium layer and Structural schematic diagram after emitter metal；
Fig. 6 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides Diagrammatic cross-section of the structure along AB lines；
Fig. 7 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides Diagrammatic cross-section of the structure along CD lines；
Fig. 8 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Structure schematic diagram；
Fig. 9 be the embodiment of the present invention 2 provide a kind of trench gate charge storage type IGBT device remove spacer medium layer and Structural schematic diagram after emitter metal；
Figure 10 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Diagrammatic cross-section of the structure along AB lines；
Figure 11 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Diagrammatic cross-section of the structure along CD lines；
Figure 12 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Diagrammatic cross-section of the structure along EF lines；
Figure 13 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Diagrammatic cross-section of the structure along GH lines；
Figure 14 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Structure schematic diagram；
Figure 15 be the embodiment of the present invention 3 provide a kind of trench gate charge storage type IGBT device remove spacer medium layer and Structural schematic diagram after emitter metal；
Figure 16 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Diagrammatic cross-section of the structure along AB lines；
Figure 17 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Diagrammatic cross-section of the structure along CD lines；
Figure 18 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Diagrammatic cross-section of the structure along EF lines；
Figure 19 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Diagrammatic cross-section of the structure along GH lines；
Figure 20 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Structure schematic diagram；
Figure 21 be the embodiment of the present invention 4 provide a kind of trench gate charge storage type IGBT device remove spacer medium layer and Structural schematic diagram after emitter metal；
Figure 22 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Diagrammatic cross-section of the structure along AB lines；
Figure 23 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Diagrammatic cross-section of the structure along CD lines；
Figure 24 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Diagrammatic cross-section of the structure along EF lines；
Figure 25 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Diagrammatic cross-section of the structure along GH lines；
Figure 26 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 5 provides Structure schematic diagram；
Figure 27 be the embodiment of the present invention 5 provide a kind of trench gate charge storage type IGBT device remove spacer medium layer and Structural schematic diagram after emitter metal；
Figure 28 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 5 provides Diagrammatic cross-section of the structure along AB lines；
Figure 29 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 5 provides Diagrammatic cross-section of the structure along CD lines；
Figure 30 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 5 provides Diagrammatic cross-section of the structure along EF lines；
Figure 31 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 5 provides Diagrammatic cross-section of the structure along GH lines；
Figure 32 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 6 provides Structure schematic diagram；
Figure 33 be the embodiment of the present invention 6 provide a kind of trench gate charge storage type IGBT device remove spacer medium layer and Structural schematic diagram after emitter metal；
Figure 34 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 6 provides Diagrammatic cross-section of the structure along AB lines；
Figure 35 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 6 provides Diagrammatic cross-section of the structure along CD lines；
Figure 36 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 6 provides Diagrammatic cross-section of the structure along EF lines；
Figure 37 is a kind of half cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 6 provides Diagrammatic cross-section of the structure along GH lines；
Figure 38 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms division trench gate knot Half structure cell schematic diagram after the groove of structure；
Figure 39 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms Split Electrode medium Half structure cell schematic diagram after layer；
Figure 40 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms Split Electrode Half structure cell schematic diagram；
Figure 41 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms gate trench Half structure cell schematic diagram；
Figure 42 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms gate dielectric layer Half structure cell schematic diagram；
Figure 43 is two after a kind of trench gate charge storage type IGBT device formation gate electrode that the embodiment of the present invention 1 provides / mono- cellular structural schematic diagram；
Figure 44 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms N+ emitter region Half structure cell schematic diagram；
Figure 45 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms spacer medium layer Half structure cell schematic diagram；
Figure 46 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides completes whole processes Half structure cell schematic diagram；
Figure 47 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms second groove Half structure cell schematic diagram；
Figure 48 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms third groove Half structure cell schematic diagram；
Figure 49 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms the second gate electrode Half structure cell schematic diagram；
Figure 50 be the embodiment of the present invention 3 provide a kind of trench gate charge storage type IGBT device formed N+ emitter region and Half structure cell schematic diagram after P+ body contact zones；
Figure 51 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms spacer medium layer Half structure cell schematic diagram；
In figure：1 is emitter metal, and 2 be spacer medium layer, and 3 be N+ emitter region, and 4 be P+ body contact zones, and 5 be p-type base Area, 6 be N-type charge storage layer, and 71 be gate electrode, and 72 be gate dielectric layer, and 81 be Split Electrode, and 82 be Split Electrode dielectric layer, 9 It is the first P-type layer for N-type drift region, 10,111 be groove collector electrode, and 112 be groove collector dielectric layer, and 12 be N-type field Trapping layer, 13 be p-type collecting zone, and 14 be collector electrode metal, and 15 be the second P-type layer.
Specific implementation mode
The principle of the present invention and characteristic are explained in detail with specific embodiment with reference to the accompanying drawings of the specification：
Identical label indicates same or similar component or element in the accompanying drawings.Trench gate electricity provided by the invention Lotus storage-type IGBT device can be N-channel device, can also be P-channel device, be said by taking N-channel device as an example below Bright, one of ordinary skill in the art can understand the structure and working principle of P-channel device on the basis of open N-channel device.
Embodiment 1：
A kind of trench gate charge storage type IGBT, secondly point a cellular as shown in figure 4, its along AB lines and CD lines section As shown in Figure 6 and Figure 7, three-dimensional system of coordinate, the bottom surface of a quarter cellular are established by origin of any inflection point of half cellular Two sides of the inflection point are intersected at respectively as x-axis and z-axis, the excessively described inflection point and perpendicular to the straight line of the bottom surface as y Axis, x, y, the direction of z-axis is referring to Fig. 4；
The half cellular includes the collector electrode metal 14 being cascading from bottom to top, p-type collecting zone 13, N Type drift region 9 and emitter metal 1；9 top layer of the N-type drift region is respectively provided with N-type charge storage layer 6, p-type base area 5, P+ bodies Contact zone 4 and N+ emitter region 3；The p-type base area 5 is located at the top layer of N-type charge storage layer 6；P+ body contact zones 4 and N+ emitter region 3 independently of each other and side by side positioned at the top layer of p-type base area 5, it is characterised in that：N+ emitter region 3 is deep in the extension of 5 top layer of p-type base area Spend the extension depth for being less than p-type base area 5 in 6 top layer of N-type charge storage layer；The top layer in the P drift area 9 also has division ditch Slot grid structure, it is described to divide the gate dielectric layer 72 and Split Electrode 81 and its week that trench gate structure includes gate electrode 71 and its side The Split Electrode dielectric layer 82 of side；The gate electrode 71 from device top layer down through depth be less than N-type charge storage layer 6 Junction depth, Split Electrode 81 and gate electrode 71 are consistent in the extending direction of 9 top layer of N-type drift region, are along such as z-axis side in attached drawing 4 To extension, and the extension depth of Split Electrode 81 is more than the extension depth of gate electrode 71 so that 81 semi-surrounding grid of Split Electrode Electrode 71 and its gate dielectric layer of side 72 are arranged, and Split Electrode 81 is located at the bottom of gate electrode 71 and Split Electrode 81 and grid are electric Between pole 71 by gate dielectric layer 72 be connected, Split Electrode 81 down through depth be more than N-type charge storage layer 6 junction depth N Type；It is connected by gate dielectric layer 72 between gate electrode 71 and N+ emitter region 3, the p-type base area 5 and N-type charge storage layer 6；Point It splits between electrode 81 and P+ body contact zones, p-type base area 5, N-type charge storage layer 6 and N-type drift region 9 through Split Electrode medium Layer 82 is connected；The upper surface of gate electrode 71 and its gate dielectric layer of side 72 has spacer medium layer 2；Split Electrode 81, isolation The upper surface of dielectric layer 2, P+ body contact zones 4 and N+ emitter region 3 is connected with emitter metal 1.
In the present embodiment, the size of P+ body contact zones 4 along the z-axis direction is 1~5 μm, and size, that is, junction depth along the y-axis direction is 0.1~0.3 μm；The size of the p-type base area 5 along the x-axis direction is 2~10 μm, and size, that is, junction depth along y-axis is 0.3~1 μm； The N-type charge storage layer 6 is 0.5~1 μm along size, that is, junction depth of y-axis；The gate electrode 71 along y-axis depth be 0.6~ 1.6um；The groove depth of the division trench gate structure is 4~8 μm.
Embodiment 2：
A kind of trench gate charge storage type IGBT, secondly point a cellular as shown in figure 8, its along AB lines, CD lines, EF lines and For the section of GH lines as shown in Figure 10 to 13, coordinate system establishes mode with embodiment 1, referring specifically to Fig. 8；
The present embodiment and the difference of embodiment 1 are：Extension of the gate electrode 71 of the present embodiment in 9 top layer of N-type drift region Depth is equal to the extension depth of Split Electrode 81, but extension width of the gate electrode 71 at device top layer both ends is less than division electricity The extension width of pole 81, while in device top layer also member-retaining portion Split Electrode dielectric layer 82 and 81 knot of a part of Split Electrode Structure；The thickness of the Split Electrode dielectric layer 82 is more than the thickness of gate dielectric layer 72.
The present embodiment is by a part of Split Electrode 81 of retaining means top layer and Split Electrode dielectric layer 82, to change Become device channel density, influences short-circuit trouble free service zone properties, change simultaneously extension of the gate electrode 71 along 9 top layer of N-type drift region Depth, and gate electrode 71 is made to run through N-type drift region 9 along the z-axis direction, form better electrode lead-out mode, more conducively technique It realizes, while reducing ghost effect, improve the reliability of device.
Embodiment 3：
A kind of trench gate charge storage type IGBT, secondly the cellular divided is as shown in figure 14, along AB lines, CD lines, EF lines For section with GH lines as shown in Figure 16 to 19, coordinate system establishes mode with embodiment 1, referring specifically to Figure 14；
The present embodiment and the difference of embodiment 2 are：The present embodiment is not provided with Split Electrode 81 in device top layer and divides 82 structure of electrode dielectric is split, Split Electrode 81 and Split Electrode dielectric layer 82 are to be located at 71 bottom of gate electrode, 3 He of N+ emitter region The deep equality along the z-axis direction of P+ body contact zones 4 and it is less than the depth of p-type base area 5 along the z-axis direction, while logical with N+ emitter region 3 The thickness for crossing the connected gate electrode 71 of gate dielectric layer 72 is more than the thickness for the gate electrode 71 not being connected with N+ emitter region 3
The width that the present embodiment passes through change gate electrode 71 so that under identical grid voltage, be situated between by grid with gate electrode 71 Its both ends part when middle section forms inversion layer of 5 surface of p-type base area that matter layer 72 connects along the z-axis direction can't be formed Inversion layer will not increase the gully density of device in this way, not interfere with the short-circuit trouble free service zone properties of device, while grid electricity The setting that N-type drift region 9 is run through in pole along the z-axis direction forms better electrode lead-out mode, and more conducively technique is realized, is subtracted simultaneously Small ghost effect, improves the reliability of device.
Embodiment 4：
A kind of trench gate charge storage type IGBT, secondly the cellular divided is as shown in figure 20, along AB lines, CD lines, EF lines For section with GH lines as shown in Figure 22 to 25, coordinate system establishes mode with embodiment 1, referring specifically to Figure 20；
The present embodiment other than introducing the first P-type layer 10 in division trench gate structure bottom, remaining structure with implementation Example 3 is identical；The junction depth of first P-type layer 10 is 0.5~1 μm.
This embodiment introduces the first P-type layer 10 being connected with Split Electrode 81 by Split Electrode dielectric layer 82, and One P-type layer 10 is extended laterally to both sides in the N-type drift region 9 of 6 lower section of N-type charge storage layer, is shielded N-type charge with this and is deposited The influence of negative electrical charge in reservoir, reduces grid capacitance, while improving channel bottom electric field concentration, improves the breakdown of device Voltage and reliability.
Embodiment 5：
A kind of trench gate charge storage type IGBT, secondly the cellular divided is as shown in figure 26, along AB lines, CD lines, EF lines For section with GH lines as shown in Figure 28 to 31, coordinate system establishes mode with embodiment 1, referring specifically to Figure 26；
The present embodiment is in addition to introducing the groove collector through N-type field stop layer 12 and p-type collecting zone 13 in device back Except structure 11, remaining structure is same as Example 4.
The groove collector structure 11 that the present embodiment introduces includes groove collector Jie of groove collector 111 and its side Matter layer 112, the groove collector 111 and 14 equipotential of metal collector, the groove collector 111 pass through groove collector Dielectric layer 112 is isolated with p-type collecting zone 13, N-type field stop layer 12 and N-type drift region 9.Preferably, groove The thickness of collector dielectric layer 112 is more than the thickness of gate dielectric layer 72, so that device is reversed under reverse blocking state Reverse biased pn junction that voltage is not only formed by p-type collecting zone 13 and N-type field stop layer 12 is born, at the same with groove collector structure 12 surface of N-type field stop layer of contact, which can form depletion layer, can also bear part backward voltage, and it is anti-that groove can also bear part Improve the reliability of device to voltage so as to greatly improve the breakdown reverse voltage of device, solve traditional structure due to FS layers of presence causes the breakdown reverse voltage of device lower than forward break down voltage, and in AC applications, the resistance to drops of device asks Topic.
Embodiment 6：
A kind of trench gate charge storage type IGBT, secondly the cellular divided is as shown in figure 32, along AB lines, CD lines, EF lines For section with GH lines as shown in Figure 34 to 37, coordinate system establishes mode with embodiment 1, referring specifically to Figure 32；
The present embodiment in addition to groove collector structure bottom introduce the second P-type layer 15 other than, remaining structure with implementation Example 5 is identical；The junction depth of second P-type layer 15 is 0.5~1 μm.
This embodiment introduces the second p-types being connected with groove collector electrode 111 by groove collector dielectric layer 112 Layer 15 improves channel bottom electric field with this and concentrates, improves the breakdown reverse voltage and reliability of device.
Embodiment 7：
A kind of trench gate charge storage type IGBT introduces N on the architecture basics of embodiment 1 in p-type collector area 13 Type area, forms reverse-conducting IGBTRC IGBT, and structure is equivalent to the integrated of IGBT and fly-wheel diode FWD.
Embodiment 8：
The present embodiment is illustrated by taking the trench gate charge storage type IGBT of 1200V voltage class as an example, according to this field Common sense can prepare the device of different performance parameter according to actual demand.
A kind of production method of trench gate charge storage type IGBT, which is characterized in that include the following steps：
Step 1：N-type drift region 9 of the monocrystalline silicon piece as device is lightly doped using N-type, the thickness of selected silicon chip is 300~ 600 μm, doping concentration 1013~1014A/cm3；
Step 2：One layer of field oxide is grown in silicon chip surface, is lithographically derived active area, one layer of pre-oxidation layer of regrowth leads to It crosses ion implanting N-type impurity and N-type charge storage layer 6 is made, the energy of ion implanting is 200~500keV, implantation dosage 1013 ~1014A/cm2；P-type base area 5 is made by ion implanting p type impurity and annealing above N-type charge storage layer 6 again, The energy of ion implanting is 60~120keV, implantation dosage 1013~1014A/cm2, annealing temperature is 1100~1150 DEG C, is moved back The fiery time is 10~30 minutes, and in p-type base area, 5 top layer by ion implanting p type impurity and makes annealing treatment obtained P+ body contact zones 4, the energy of ion implanting p type impurity is 60~80keV, implantation dosage 1015~1016A/cm2, annealing temperature is 900 DEG C, Annealing time is 20~30 minutes；
Step 3：In the TEOS protective layers that silicon chip surface deposition thickness is 700~1000nm, makes window by lithography and carry out groove Silicon etching, and then etching forms first groove in N-type drift region 9, as shown in Fig. 38, first groove extends from device front end To device rear end, and the depth of first groove is more than the junction depth of N-type charge storage layer 6；
Step 4：In 1050 DEG C~1150 DEG C of O2Under atmosphere, dielectric layer is formed as division in the first groove inner wall Electrode dielectric 82；Then at 750 DEG C~950 DEG C, deposition of electrode material forms Split Electrode 81 in the first groove, The present embodiment uses polycrystalline silicon material as Split Electrode material, as shown in Fig. 40；
Step 5：In the TEOS protective layers that silicon chip surface deposition thickness is 700~1000nm, makes window by lithography and carry out groove Silicon etching, the Split Electrode dielectric layer 82 for the part Split Electrode 81 and its side that etching removal previous step is formed, and then shape At second groove, as shown in Fig. 41, the second groove is consistent along the extending direction of device top layer with first groove, the second ditch The depth of slot is less than the junction depth of N-type charge storage layer 6；
Step 6：In 1050 DEG C~1150 DEG C of O2Under atmosphere, forms dielectric layer in the second groove inner wall and be situated between as grid Matter layer 72, as shown in Fig. 42；Then at 750 DEG C~950 DEG C, deposition of electrode material is as grid electricity in the second groove Pole 71, the present embodiment is using polycrystalline silicon material as gate material；Point of Split Electrode 81 and its side in first groove The gate electrode 71 and gate dielectric layer 72 split in electrode dielectric 82 and second groove forms division trench gate structure, divides trench gate Structure is as shown in Fig. 43；
Step 7：By photoetching, ion implantation technology, in p-type base area, 5 top layer injects N-type impurity, ion implanting N-type impurity Energy be 30~60keV, implantation dosage 1015~1016A/cm2, be made with P+ body contact zones 4 be set up in parallel and with grid electricity The N+ emitter region 3 that pole 71 is connected by gate dielectric layer 72, the N+ emitter region 3 are less than P in the extension depth of 5 top layer of p-type base area Type base area 5 is in the extension depth of 6 top layer of N-type charge storage layer, and the N+ emitter region 3 is deep in the extension of 5 top layer of p-type base area Degree is identical in the extension depth of N-type drift region 9 as gate electrode 71；As shown in Fig. 44；
Step 8：As shown in Fig. 45, in device surface dielectric layer deposited；Using photoetching, etching technics, in gate electrode 71 Spacer medium layer 2 is formed with 72 upper surface of gate dielectric layer；
Step 9：As shown in Fig. 46, metal is deposited in device surface；Using photoetching, etching technics, in dielectric layer 2, N+ Emitter region 3, P+ body contact zones 4 and Split Electrode 81 and 82 upper surface of Split Electrode dielectric layer form emitter metal 1；Overturn silicon Silicon wafer thickness is thinned in piece, injects the N-type field stop layer 12 of N-type impurity and making devices of annealing in silicon chip back side, N-type field prevents The thickness of layer 12 is 15~30 microns, and the energy of ion implanting is 1500~2000keV, implantation dosage 1013~1014A/ cm2, annealing temperature is 1200~1250 DEG C, and annealing time is 300~600 minutes；In 12 back side implanting p-type of N-type field stop layer Impurity forms p-type collecting zone 13, and Implantation Energy is 40~60keV, implantation dosage 1012~1013A/cm2, in H2With N2Mixing Atmosphere under carry out back side annealing, the back side annealing temperature be 400~450 DEG C, the back side annealing time be 20~30 minutes；The back of the body Face deposits metal and forms collector electrode metal 14, as shown in Fig. 46, so far completes the preparation of trench gate charge storage type IGBT.
It should be noted that in the preparation method that this implementation provides, the lateral position of device surface corresponds to Figure of description Show that the x-axis direction of coordinate system, the lengthwise position of device surface correspond to the z-axis direction that Figure of description shows coordinate system, hereafter It repeats no more.
Further, step 3 can be respectively formed p-type base area 5 and P+ body contact zones 4 in two steps；Or it can be in step 8 When re-form P+ body contact zones 4；
It is possible to further be initially formed groove, ion implanting formation N-type charge storage layer 6, p-type base area 5 and P+ bodies connect again Area 4 is touched, i.e. the sequence of step 3 and step 4 can exchange；
Further, gate electrode 71 is equal to the extension depth of Split Electrode 81 in the extension depth of 9 top layer of N-type drift region, But extension width of the gate electrode 71 at device top layer both ends is less than the extension width of Split Electrode 81, while also being protected in device top layer 81 structure of part Split Electrode dielectric layer 82 and a part of Split Electrode, the thickness of Split Electrode dielectric layer 82 is stayed to be more than gate medium The thickness of layer 72, you can obtain structure shown in Fig. 8.
Further, as shown in attached drawing 47 to 51, N+ emitter region 3 and P+ body contact zones 4 are located at 5 top layer of p-type base area side by side Middle part along the z-axis direction, gate electrode 71 runs through N-type drift region 9 along the z-axis direction at this time, and passes through in gate electrode 71 along the z-axis direction The width of the part that gate dielectric layer 72 is connected with N+ emitter region 3 along the x-axis direction be more than be not connected with N+ emitter region 3 i.e. with p-type base The width of the connected part in area 5 along the x-axis direction, i.e. shape of the gate electrode 71 in the faces xoz is "convex" shaped, you can obtains Figure 14 institutes The structure shown.
Further, step 3 can increase ion implanting step and form the first P-type layer 10 in division trench gate structure bottom, It can be obtained structure shown in Figure 20.
Further, step 11 can increase photoetching, etching, oxidation and depositing step, formed in device back and run through N-type field The groove collector structure of trapping layer 12 and p-type collecting zone 13, groove collector electrode 111 and collector electrode metal 14 etc. are electric at this time Position, the thickness of groove collector dielectric layer 112 are more than the thickness of gate dielectric layer 72, you can obtain structure shown in Figure 26.
Further, step 11 can increase ion implanting step and form the second P-type layer 15 in groove collector structure bottom, It can be obtained structure shown in Figure 32.
Further, the preparation of N-type field stop layer 12 can be before preparing the Facad structure of device in step 11 of the present invention It is prepared；Or the two-layer epitaxial material with N-type field stop layer 12 and N-type drift region 9 can directly be selected to be originated as technique Silicon sheet material.
Further, the preparation of N-type field stop layer 12 can also omit in present invention process step 11.
Further, material of the same race may be used in the material of spacer medium layer 2, gate dielectric layer 72 and Split Electrode dielectric layer 82 Material can also use combination of materials not of the same race.

Claims (10)

1. a kind of trench gate charge storage type IGBT, secondly the cellular divided includes the collector being cascading from bottom to top Metal (14), the first conductive type semiconductor collecting zone (13), the second conductive type semiconductor drift region (9) and emitter metal (1)；The top layer of second conductive type semiconductor drift region (9) is respectively provided with the second conductive type semiconductor charge storage layer (6), the first conductive type semiconductor base area (5), the first conductive type semiconductor body contact zone (4) and the second conduction type are partly led Body emitter region (3)；First conductive type semiconductor base area (5) is located at the second conductive type semiconductor charge storage layer (6) Top layer；First conductive type semiconductor body contact zone (4) and the second conductive type semiconductor emitter region (3) are independently of each other and simultaneously Top layer of the row positioned at the first conductive type semiconductor base area (5), it is characterised in that：Second conductive type semiconductor emitter region (3) It is less than the first conductive type semiconductor base area (5) second in the extension depth of first conductive type semiconductor base area (5) top layer The extension depth of conductive type semiconductor charge storage layer (6) top layer；The top of second conductive type semiconductor drift region (9) Also there is layer division trench gate structure, the division trench gate structure to include gate electrode (71), be set to gate electrode (71) side Gate dielectric layer (72), Split Electrode (81) and the Split Electrode dielectric layer (82) set on Split Electrode (81) side, the division Electrode (81) is consistent with the extending direction of the gate electrode (71) in the devices；The gate electrode (71) is worn downwards from device top layer The depth entered is less than the junction depth of the second conductive type semiconductor charge storage layer (6), and Split Electrode (81) and gate electrode (71) exist Extending direction in device is consistent, and Split Electrode (81) is located at the bottom of gate electrode (71) and Split Electrode (81) and gate electrode (71) by gate dielectric layer (72) be connected, Split Electrode (81) down through depth be more than the second conductive type semiconductor charge The junction depth of accumulation layer (6)；Gate electrode (71) and the second conductive type semiconductor emitter region (3), the first conductive type semiconductor base It is connected by gate dielectric layer (72) between area (5) and the second conductive type semiconductor charge storage layer (6)；Split Electrode (81) is extremely It is few to pass through division between the second conductive type semiconductor charge storage layer (6) and the second conductive type semiconductor drift region (9) Electrode dielectric (82) is connected；The upper surface of gate electrode (71) and its gate dielectric layer (72) of side has spacer medium layer (2)； Spacer medium layer (2), the first conductive type semiconductor body contact zone (4) and the second conductive type semiconductor emitter region (3) it is upper Surface is connected with emitter metal (1).
2. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Split Electrode (81) is along The depth that two conductive type semiconductor drift region (9) top layers extend is more than the depth that gate electrode (71) extends so that Split Electrode (81) semi-surrounding gate electrode (71) and its setting of the gate dielectric layer (72) of side, lead between Split Electrode (81) and gate electrode (71) It crosses gate dielectric layer (72) to be connected, Split Electrode (81) and the first conductive type semiconductor body contact zone (4), the first conduction type half It is connected by Split Electrode dielectric layer (82) between conductor base area (5), Split Electrode (81) is connected with emitter metal (1).
3. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Gate electrode (71) is along second The depth that conductive type semiconductor drift region (9) top layer extends is equal to the depth that Split Electrode (81) extends, and Split Electrode (81) part is located at below gate electrode (71), and another part is located at device top layer and is situated between by grid between gate electrode (71) Matter layer (72) is connected, and the gate electrode (71) is less than the width that Split Electrode 81 extends, division along the width that device top layer extends Pass through division between electrode (81) and the first conductive type semiconductor body contact zone (4), the first conductive type semiconductor base area (5) Electrode dielectric (82) is connected, and Split Electrode (81) is connected with emitter metal (1).
4. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Second conduction type Semiconductor emission area (3) and the first conductive type semiconductor body contact zone (4) are located at the first conductive type semiconductor base area (5) top Layer center, and the Split Electrode 81 is located at 71 lower section of gate electrode, the first conductive type semiconductor base area (5) and gate electrode (71) it is connected by gate dielectric layer (72) between.
5. a kind of trench gate charge storage type IGBT according to claim 4, it is characterised in that：With the second conduction type half Conductor emitter region (3) by gate dielectric layer (72) be connected gate electrode (71) thickness be more than not with the second conductive type semiconductor The thickness of the connected gate electrode (71) of emitter region (3).
6. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：In division trench gate structure And/or the bottom of groove collector structure also has the first conductive type semiconductor layer；First conductive type semiconductor layer It extends laterally in the second conductive type semiconductor drift region (9) below the second conductive type semiconductor charge storage layer (6).
7. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：First conduction type Also there is N-type region in semiconductor collecting zone (13), form RC-IGBT structures.
8. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：First conduction type Also there is the resistance of the second conductive type semiconductor field between semiconductor collecting zone (13) and the second conductive type semiconductor drift region (9) Only layer (12) form FS IGBT structures.
9. such as the preparation method of claim 1 to 8 any one of them trench gate charge storage type IGBT, which is characterized in that extremely Include the following steps less：
Step 1：Make the second conductive type semiconductor drift region (9)；
Step 2：By pre-oxidation, photoetching, etching, ion implanting and high-temperature annealing process, floated in the second conductive type semiconductor The front for moving area (9) makes the second conductive type semiconductor charge storage layer (6) and is located at the second conductive type semiconductor charge The first conductive type semiconductor base area (5) of accumulation layer (6) top layer；
Step 3：By photoetching, etching, thermal oxide, depositing technics, on the second conductive type semiconductor charge storage layer (6) Etching forms first groove, and the depth of the first groove is more than the junction depth of the second conductive type semiconductor charge storage layer (6)； Split Electrode dielectric layer (82) is formed in first groove inner wall, then deposition of electrode material forms Split Electrode in the trench (81)；
Step 4：By photoetching, etching, thermal oxide, depositing technics, etched on the second conductive type semiconductor drift region (9) Second groove is formed, the depth of the second groove is less than the junction depth of the second conductive type semiconductor charge storage layer (6), and First groove is consistent along the direction that device top layer extends with second groove；Gate dielectric layer (72) is formed in second groove inner wall, so The gate dielectric layer (72) of the deposition of electrode material formation gate electrode (71) in second groove afterwards, the gate electrode (71) and its side And Split Electrode (81) and its Split Electrode dielectric layer (82) of side form division trench gate structure；
Step 5：By photoetching, etching, ion implanting and high-temperature annealing process, in the first conductive type semiconductor base area (5) Top layer makes mutual indepedent and the first conductive type semiconductor body contact zone (4) being set up in parallel and the second conductive type semiconductor Emitter region (3)；Second conductive type semiconductor emitter region (3) the prolonging in the first conductive type semiconductor base area (5) top layer It stretches depth and is less than the first conductive type semiconductor base area (5) prolonging in the second conductive type semiconductor charge storage layer (6) top layer Stretch depth, the second conductive type semiconductor emitter region (3) be arranged close to gate electrode (71) and by gate dielectric layer (72) with Gate electrode (71) is connected；
Step 6：By photoetching, etching and depositing technics, is formed and be isolated in the upper surface of gate electrode (71) and gate dielectric layer (72) Dielectric layer (2)；
Step 7：Surface deposition metal, by photoetching, etching technics in spacer medium layer (2), the first conductive type semiconductor body Contact zone (4) and the upper surface of the second conductive type semiconductor emitter region (3) form emitter metal (1)；
Step 8：Semiconductor devices is overturn, the thickness of semiconductor is thinned, by ion implanting and high-temperature annealing process, second Conductive type semiconductor drift region (9) back side injects the first conductive type impurity and forms the first conductive type semiconductor collecting zone (13)；
Step 9：The back side deposits metal, and collector electrode metal (14) is formed on the first conductive type semiconductor collecting zone (13)；Extremely Trench gate charge storage type IGBT device is made in this.
10. according to a kind of trench gate charge storage type IGBT of claim 1 to 9 any one of them, it is characterised in that：First leads Electric type semiconductor is P-type semiconductor, and the second conductive type semiconductor is N-type semiconductor；Or first conductive type semiconductor For N-type semiconductor, the second conductive type semiconductor is P-type semiconductor.
CN201810113820.XA 2018-02-05 2018-02-05 Trench gate charge storage type IGBT and manufacturing method thereof Active CN108321196B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810113820.XA CN108321196B (en) 2018-02-05 2018-02-05 Trench gate charge storage type IGBT and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810113820.XA CN108321196B (en) 2018-02-05 2018-02-05 Trench gate charge storage type IGBT and manufacturing method thereof

Publications (2)

Publication Number Publication Date
CN108321196A true CN108321196A (en) 2018-07-24
CN108321196B CN108321196B (en) 2020-05-01

Family

ID=62901908

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810113820.XA Active CN108321196B (en) 2018-02-05 2018-02-05 Trench gate charge storage type IGBT and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN108321196B (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109103186A (en) * 2018-08-14 2018-12-28 电子科技大学 A kind of integrated hetero-junctions freewheeling diode silicon carbide tank gate MOSFET
CN109166916A (en) * 2018-08-29 2019-01-08 电子科技大学 A kind of insulated gate bipolar transistor and preparation method thereof
CN109192771A (en) * 2018-08-29 2019-01-11 电子科技大学 A kind of charge storage type insulated gate bipolar transistor and preparation method thereof
CN109346509A (en) * 2018-08-29 2019-02-15 电子科技大学 A kind of charge storage type insulated gate bipolar transistor and preparation method thereof
CN109860171A (en) * 2019-01-31 2019-06-07 电子科技大学 The ambipolar SiC semiconductor power device of the reversed freewheeling diode of integrated high-speed
CN111129132A (en) * 2018-10-30 2020-05-08 株洲中车时代电气股份有限公司 IGBT device
CN112750893A (en) * 2021-01-07 2021-05-04 无锡紫光微电子有限公司 Low-conduction-voltage-drop carrier storage type FS-IGBT and manufacturing method thereof
CN112786695A (en) * 2019-11-08 2021-05-11 株洲中车时代电气股份有限公司 Split gate trench power semiconductor device
WO2021232801A1 (en) * 2020-05-18 2021-11-25 华润微电子（重庆）有限公司 Igbt device and manufacturing method therefor
CN113990921A (en) * 2021-10-18 2022-01-28 深圳市威兆半导体有限公司 Semiconductor vertical device and method for producing the same
CN113990923A (en) * 2021-10-20 2022-01-28 电子科技大学 Silicon carbide double-groove MOSFET (Metal-oxide-semiconductor field Effect transistor) integrated with trench diode
CN114582965A (en) * 2022-05-06 2022-06-03 南京微盟电子有限公司 Low-switching-loss power device structure and manufacturing method thereof
CN114709258A (en) * 2022-06-07 2022-07-05 深圳市威兆半导体有限公司 Double-channel MOSFET device and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299172A (en) * 2010-06-23 2011-12-28 三菱电机株式会社 Power semiconductor device
CN105428405A (en) * 2014-09-17 2016-03-23 富士电机株式会社 Trench Insulated Gate Bipolar Transistor And Manufacturing Method Thereof
CN105932042A (en) * 2016-04-26 2016-09-07 电子科技大学 Double-split groove gate charge storage type IGBT and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299172A (en) * 2010-06-23 2011-12-28 三菱电机株式会社 Power semiconductor device
CN105428405A (en) * 2014-09-17 2016-03-23 富士电机株式会社 Trench Insulated Gate Bipolar Transistor And Manufacturing Method Thereof
CN105932042A (en) * 2016-04-26 2016-09-07 电子科技大学 Double-split groove gate charge storage type IGBT and manufacturing method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
张金平,ETAL: "IGBT新技术及发展趋势", 《大功率变流技术》 *

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109103186B (en) * 2018-08-14 2022-10-11 电子科技大学 Integrated heterojunction freewheeling diode carborundum grooved gate MOSFET
CN109103186A (en) * 2018-08-14 2018-12-28 电子科技大学 A kind of integrated hetero-junctions freewheeling diode silicon carbide tank gate MOSFET
CN109166916A (en) * 2018-08-29 2019-01-08 电子科技大学 A kind of insulated gate bipolar transistor and preparation method thereof
CN109192771A (en) * 2018-08-29 2019-01-11 电子科技大学 A kind of charge storage type insulated gate bipolar transistor and preparation method thereof
CN109346509A (en) * 2018-08-29 2019-02-15 电子科技大学 A kind of charge storage type insulated gate bipolar transistor and preparation method thereof
CN109346509B (en) * 2018-08-29 2020-06-16 电子科技大学 Charge storage type insulated gate bipolar transistor and preparation method thereof
CN109192771B (en) * 2018-08-29 2020-06-30 电子科技大学 Charge storage type insulated gate bipolar transistor and preparation method thereof
CN109166916B (en) * 2018-08-29 2020-11-13 电子科技大学 Insulated gate bipolar transistor and preparation method thereof
CN111129132A (en) * 2018-10-30 2020-05-08 株洲中车时代电气股份有限公司 IGBT device
CN111129132B (en) * 2018-10-30 2023-09-08 株洲中车时代半导体有限公司 IGBT device
CN109860171A (en) * 2019-01-31 2019-06-07 电子科技大学 The ambipolar SiC semiconductor power device of the reversed freewheeling diode of integrated high-speed
CN112786695A (en) * 2019-11-08 2021-05-11 株洲中车时代电气股份有限公司 Split gate trench power semiconductor device
CN112786695B (en) * 2019-11-08 2022-05-03 株洲中车时代电气股份有限公司 Split gate trench power semiconductor device
WO2021088156A1 (en) * 2019-11-08 2021-05-14 株洲中车时代电气股份有限公司 Power semiconductor device
WO2021232801A1 (en) * 2020-05-18 2021-11-25 华润微电子（重庆）有限公司 Igbt device and manufacturing method therefor
CN112750893A (en) * 2021-01-07 2021-05-04 无锡紫光微电子有限公司 Low-conduction-voltage-drop carrier storage type FS-IGBT and manufacturing method thereof
CN113990921A (en) * 2021-10-18 2022-01-28 深圳市威兆半导体有限公司 Semiconductor vertical device and method for producing the same
CN113990921B (en) * 2021-10-18 2023-12-08 深圳市威兆半导体股份有限公司 Semiconductor vertical device and method for producing the same
CN113990923A (en) * 2021-10-20 2022-01-28 电子科技大学 Silicon carbide double-groove MOSFET (Metal-oxide-semiconductor field Effect transistor) integrated with trench diode
CN113990923B (en) * 2021-10-20 2023-04-04 电子科技大学 Silicon carbide double-groove MOSFET (Metal-oxide-semiconductor field Effect transistor) integrated with trench diode
CN114582965A (en) * 2022-05-06 2022-06-03 南京微盟电子有限公司 Low-switching-loss power device structure and manufacturing method thereof
CN114709258A (en) * 2022-06-07 2022-07-05 深圳市威兆半导体有限公司 Double-channel MOSFET device and manufacturing method thereof
CN114709258B (en) * 2022-06-07 2022-08-30 深圳市威兆半导体股份有限公司 Double-channel MOSFET device and manufacturing method thereof

Also Published As

Publication number Publication date
CN108321196B (en) 2020-05-01

Similar Documents

Publication Publication Date Title
CN108321196A (en) A kind of trench gate charge storage type IGBT and preparation method thereof
CN107623027B (en) Trench gate charge storage type insulated gate bipolar transistor and manufacturing method thereof
CN107799582B (en) Trench gate charge storage type insulated gate bipolar transistor and manufacturing method thereof
CN107731897B (en) Trench gate charge storage type IGBT and manufacturing method thereof
CN105932042B (en) A kind of pair of division trench gate charge storage type IGBT and its manufacturing method
CN107785415B (en) SOI-RC-LIGBT device and preparation method thereof
CN105742346B (en) Double division trench gate charge storage type RC-IGBT and its manufacturing method
CN105789290B (en) A kind of trench gate IGBT device and its manufacturing method
CN108461537B (en) A kind of trench gate charge storage type IGBT and preparation method thereof
CN105932055B (en) A kind of planar gate IGBT and preparation method thereof
CN107768436A (en) A kind of trench gate electric charge memory type IGBT and its manufacture method
CN107731899B (en) Trench gate charge storage type IGBT device with clamping structure and manufacturing method thereof
CN105870180B (en) Double division trench gate charge storage type RC-IGBT and its manufacturing method
CN107808899A (en) Lateral power with hybrid conductive pattern and preparation method thereof
CN108231878B (en) Bidirectional trench gate charge storage type IGBT and manufacturing method thereof
CN105789291B (en) A kind of double division trench gate charge storage type IGBT and its manufacturing method
CN110504310A (en) A kind of RET IGBT and preparation method thereof with automatic biasing PMOS
CN107799588A (en) A kind of reverse blocking IGBT and its manufacture method
CN107731898A (en) A kind of CSTBT devices and its manufacture method
CN108321193B (en) trench gate charge storage type IGBT and manufacturing method thereof
CN106997899A (en) A kind of IGBT device and preparation method thereof
CN113838917B (en) Three-dimensional separation gate groove charge storage type IGBT and manufacturing method thereof
CN103872097A (en) Power semiconductor device and method for manufacturing the same
JP2020532109A (en) IGBT power device
CN110473917B (en) Transverse IGBT and manufacturing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant