CN107924964B - 发光面板及制备此类发光面板的方法 - Google Patents
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Abstract
本发明提供一种发光面板,所述发光面板包括:‑包括电连接件的衬底(68);‑固定到所述衬底(68)并且连接到所述电连接件以便进行驱动的微芯片(16)的阵列,每个微芯片包括以下结构的叠堆:○基于形成于硅体积中的晶体管的控制电路(20),所述电路连接到所述衬底连接件;○以及固定到所述控制电路并且连接到所述控制电路上以便进行控制的微型LED(18)。
Description
技术领域
本发明涉及发光面板,具体地涉及例如计算机、智能电话、电视机、平板电脑或图像投影仪的显示面板。
本发明更具体地涉及基于无机微型发光二极管(“微型LED”)的发光面板,其中所述微型LED具体地基于氮化镓(“GaN”)或基于衍生材料。
背景技术
示意性地,发光面板包括由控制电路阵列(或“有源阵列”)单个控制的发光元件或像素的阵列。每个控制电路包括用于驱动其相关像素的一个或多个作为开关操作的晶体管,并且最常见地包括用于在面板显示器的两次刷新之间保持像素偏置的电容器。
迄今为止,仅两种技术能够形成具有大尺寸和长寿命的发光面板,即基于液晶的技术(“LCD”)和基于等离子体的技术(“等离子体”显示面板)。然而,这两种技术均存在许多缺点,例如LCD存在电源效率和方向性问题,等离子体显示面板存在功率消耗和烧屏问题。
因此,开发出具体地基于有机光电二极管(或“OLED”)的替代技术,但无法提供令人满意的结果。实际上,基于OLED的显示器表现出闪耀问题并且寿命太短,从而将其使用限于被认为具有较短寿命的装置(特别是智能电话)。
与此同时,无论设想哪种发光技术(LCD、等离子体、OLED等),控制电路均采用被称为“TFT”(“薄膜晶体管”)的薄膜沉积技术来制造。因此,控制电路的电子部件(具体地讲为一个或多个晶体管、电容器、电气迹线)通过连续沉积材料的薄膜以及通过使用光刻掩模限定其部件(电极、半导体层、介电层、迹线等)来形成。例如,各自仅包括一个晶体管和一个电容器的LCD的控制电路的制造需要使用5至9个光刻掩模。因此,采用这种技术制造的控制电路的成本非常高。另外,采用传统TFT技术制造大尺寸有源阵列显著增加了屏幕的成本,因为能够将薄膜沉积到大表面区域上的设备的成本很高。这正是估计只有少数有能力投资高成本设备的市场运营商现在能够承担其成本的原因所在。
发明内容
本发明旨在提供一种制造发光面板的方法,该方法基于除LCD、等离子体和OLED技术以外的发光技术并且能够以较低成本形成发光面板。
为此,本发明旨在提供一种制造发光面板的方法,该方法包括:
-制造第一衬底,该第一衬底包括:
ο用于形成无机半导体微型LED的半导体层叠堆;以及
ο用于微型LED的电连接件的阵列,
以使得电连接件布置在第一衬底的第一表面上的方式来执行第一衬底的制造;
-在独立于第一衬底的第二硅衬底上制造用于控制基于晶体管的微型LED的电路的阵列,该制造被执行使得:
ο用于控制微型LED的第一连接件布置在第二衬底的第一表面上;
ο以及用于驱动发光面板的第二连接件布置在第二衬底的第二表面上;
-将第一衬底的第一表面和第二衬底的第一表面置于彼此之上并且将所述表面彼此固定,以使微型LED的电连接件与控制电路的第一电连接件实现电连接,从而获得包括电子微芯片阵列的第三衬底,其中每个电子微芯片由微型LED的叠堆和控制电路的叠堆形成;
-制造微芯片转移结构,该微芯片转移结构包括:
ο转移衬底;
ο以及微芯片阵列,每个微芯片仅通过该微芯片的微型LED固定到转移衬底,并且通过围绕微芯片在第三衬底中形成沟槽实现个体化;
-制造独立于转移结构的第四衬底,该第四衬底包括用于提供信号以驱动发光面板的电连接件,所述连接件布置在第四衬底的第一表面上;以及
-将转移结构置于第四衬底的第一表面上,将微芯片固定到第四衬底的第一表面以将控制电路的第二连接件连接到第四衬底的电连接件,并且将微芯片与转移衬底分离。
换句话讲,由此形成的发光面板包括无机微型LED的阵列,从而具有长于OLED的寿命。每个微型LED包括不含任何电子或电气部件的表面,与使其液晶被有源阵列部分遮蔽的LCD面板不同,与使其等离子体单元被电极部分遮蔽的等离子体面板也不同。这特别解释了TFT技术在制造LCD和等离子体显示面板方面的用途,因为该技术能够制造具有极小厚度的有源阵列或电极,从而几乎不存在干扰。
由于根据本发明的微型LED的布局,因此可以不采用该昂贵的技术进行制造。因此,本发明的有源阵列有利地根据微电子领域的常规技术形成,例如众所周知的ASIC电路,其中晶体管直接形成于硅晶片的本体中而非通过连续沉积材料层来形成。因此这样可以形成具有至少等于电子芯片制造领域中常用晶片(例如,用于制造ASIC电路的晶片)的尺寸的发光面板,或甚至由多个晶片形成面板。本发明还能够在有源阵列中实现用于控制微型LED的任何类型的电子线路图。本发明的有源阵列可具体地根据现有技术的线路图形成,因此每个微型LED的控制方式与单个控制晶体管、电容器等的现有技术中的方式相同,从而保留此类控制的优势(响应性、显示质量等)。然而,与制造已经互连的晶体管的昂贵TFT技术不同,本发明的有源阵列的晶体管在其制造之后、保持在适当位置之后通过无源阵列的导电迹线互连。
另外,本发明实现衬底的彼此叠置。现在,可通过微电子领域中的常规机器来放置衬底。
从而最终利用无机微型LED技术获得具有低成本和大表面积(如果需要的话)的发光面板。
根据一个实施方案,微芯片转移结构的制造包括:
-将第三衬底置于并暂时结合到转移衬底上;
-然后在转移衬底下方围绕微芯片形成沟槽。
换句话讲,本发明有利地通过处理衬底使用放置方式。
作为变型:
-第一衬底的制造包括制造生长衬底并通过形成微型LED的外延半导体层生长,该生长衬底形成微芯片转移结构的衬底;
-微芯片转移结构的制造包括在转移衬底下方围绕微芯片形成沟槽;
-微芯片与转移衬底的分离包括在微芯片的转移衬底的垂直方向上激光照射转移衬底以实现微芯片与转移衬底的分离。
因此,在此变型中,生长衬底发挥处理衬底的作用,从而省去了制造/放置步骤。
根据一个实施方案:
-转移结构的微芯片阵列具有第一重复间距;
-第四衬底的电连接件布置在具有大于第一重复间距的第二重复间距的阵列中;
-放置转移结构,将微芯片固定到第四衬底的第一表面,以及微芯片与转移衬底的分离,包括:
ο将转移结构置于第四衬底的第一位置处;
ο将至少一个第一微芯片固定到第一位置处;
ο通过使转移结构和第四衬底相对于彼此偏移第二重复间距,将转移结构置于第四衬底的第二位置处;
ο以及将至少一个第二微芯片固定到第二位置处。
换句话讲,该方法能够制造具有与发光面板的期望最终间距无关的高密度微芯片,从而提高制造效率。然后以期望的发光面板的像素间距放置微芯片。
根据一个实施方案,第二衬底上控制电路的制造根据ASIC制造技术来执行,该技术能够实现高效率并且在单位表面积上获得高密度部件,同时为电子微型LED控制线路图的设计提供很大的自由度(晶体管、电容器、电连接件的数量等)。另外,该技术不像配备能够制造大型有源TFT阵列的机器那样需要大量投资。
根据一个实施方案,第四衬底仅包括电连接件。因此,可以制成单件的发光面板中的唯一元件不包括有源元件(例如,晶体管)。这样,即使具有较大表面积,其成本也相对较低。
根据一个实施方案,形成第一衬底的微型LED的叠堆由III-V半导体制成,具体地基于镓,具体地由氮化镓(GaN)制成,和/或由磷化镓(GaP)制成,和/或由氮化铟镓(InGaN)制成,和/或由氮化铝镓(AlGaN)制成,和/或由砷化铟镓(InGaAs)制成,和/或由砷化铝镓(AlGaAs)制成,和/或由磷砷化镓(GaAsP)制成。此类半导体材料能够制造发红光的微型LED(例如,GaAsP;InGaP)、发蓝光的微型LED(例如,包含介于10%和20%之间的In的InGaN)和发绿光的微型LED(例如,包含多于20%的In、GaP、AlGaP的InGaN)。因此可以形成自身发出发光面板所需波长的光的发光元件,从而无需当前使用的滤色器。
具体地讲,为制造发光图像显示面板,从而使每个图像点包括三个发光元件(红色、绿色和蓝色各一个),该方法能够独立地形成三个微芯片阵列,每种颜色一个,并且可以在发光面板的所需位置处将其随后置于第四衬底上。作为变型,对于在其上制造具有给定颜色微型LED的每个生长衬底,放置具有控制电子器件的硅衬底,之后按前述方式放置由此获得的不同颜色的微芯片。
本发明还旨在提供一种发光面板,该发光面板包括:
-包括电连接件的衬底;
-固定到衬底并且连接到电连接件以便进行驱动的微芯片的阵列,每个微芯片包括以下结构的叠堆:
ο基于形成于硅体积中的晶体管的有源控制电路,所述电路连接到衬底的电连接件;
ο以及固定到控制电路并且连接到其上以便进行控制的微型LED。
换句话讲,根据本发明的发光面板能够形成更亮的显示器,其产生朗伯发射(由此不存在视角问题),具有更出色的功率效率,并且可能位于透明衬底上。
根据一个实施方案,微型LED由III-V半导体制成,具体地基于镓,具体地由氮化镓(GaN)制成,和/或由磷化镓(GaP)制成,和/或由氮化铟镓(InGaN)制成,和/或由氮化铝镓(AlGaN)制成,和/或由砷化铟镓(InGaAs)制成,和/或由砷化铝镓(AlGaAs)制成,和/或由磷砷化镓(GaAsP)制成,和/或由磷化铝铟镓(InGaAlP)制成。
附图说明
结合附图阅读仅作为示例提供的以下具体实施方式将更好地理解本发明,其中相同的附图标号表示相同或类似的元件,并且其中:
-图1为根据本发明的发光面板的简化透视图;
-图2为根据本发明的面板结构中包括的微芯片的简化剖视图;
-图3为示出微型LED及其控制电路的电气接线图;
-图4为示出根据本发明的互连衬底的连接件的电气接线图;
-图5A至图5J示出根据本发明的制造发光面板的方法的第一实施方案;以及
-图6A至6I示出根据本发明的制造发光面板的方法的第二实施方案。
具体实施方式
在下文中,术语“下部”和“上部”是指附图中所示元件的相对布局。
参见图1至图3,根据本发明的一个实施方案的发光面板10例如用于(计算机、智能电话、电视机、平板电脑等的)显示屏或用于图像投影仪,包括:
-无源电连接衬底12,即仅包括电导体,例如电触点和迹线,以提供面板控制信号DATA和SCAN以及用于提供电源电压Vp和Vn;以及
-发光微芯片16的阵列14,其固定到无源衬底12并且连接到其电连接器,该微芯片在空间上布置成例如用于图像显示。
每个微芯片16在上部部分包括无机半导体微型LED 18,并且在固定到上部部分的下部部分包括形成于硅块中的有源控制电路20。具体地讲,控制电路并非根据TFT技术形成。
更具体地讲,微型LED 18包括至少一个同质结或一个异质结,例如由上部P型(或N型)半导体层22和下部N型(或相应地为P型)半导体层24形成的PN结,以及用于通过叠堆注入电流的两个电触点26、28,以产生光。有利地,微型LED 18由III-V半导体制成,具体地基于镓,具体地由氮化镓(GaN)制成,和/或由磷化镓(GaP)制成,和/或由氮化铟镓(InGaN)制成,和/或由氮化铝镓(AlGaN)制成,和/或由砷化铝镓(AlGaAs)制成,和/或由砷化铟镓(InGaAs)制成,和/或由磷砷化镓(GaAsP)制成。此类半导体材料能够制造发红光的微型LED(例如,AlGaAs、GaAsP、InGaAlP)、发蓝光的微型LED(例如,InGaN)和发绿光的微型LED(例如,GaN、GaP、AlGaP)。当然,微型LED 18的结构不能减少到两个N层和P层的叠堆,例如由GaN制成,并且可采用任何已知的形状,例如“平面”结构architecture、“MESA”型结构、基于纳米线的结构(诸如文献WO 2012/035243和/或WO 2012/156620等所述)。
通过微芯片14还提供了触点转移30以使微型LED 18的电触点26中的一者电连接到布置在控制电路20的下表面34上的电触点32。触点转移30例如为“TSV”型(“硅通孔”)并且为此包括从触点26至表面34横过微芯片的孔,其中该孔的孔壁涂覆有电绝缘体层例如介电层并且填充有导电材料例如金属。微型LED 18的其它触点28例如布置在微型LED 18的下表面36上,处于与控制电路20的上表面的交界处。
控制电路20包括用于根据控制信号DATA和SCAN单个控制微型LED 18的电子部件(一个或多个晶体管、一个或多个电容器、一个或多个电阻器等)。此类单个控制能够对每个微型LED主动寻址。例如,参见图3,控制电路20包括:
-第一PMOS晶体管38,其漏极连接到微芯片14的输出触点40以接收用于设置微型LED 18的状态(例如,开或关)的信号DATA(数据),其栅极连接到微芯片14的输出触点42以接收用于启用更新或不更新微型LED 18的状态的信号SCAN(扫描);
-第二NMOS晶体管44,其栅极连接到第一PMOS晶体管38的源极,其漏极连接到LED微芯片的输出触点46以用于施加第二电源电压Vp,其源极连接到微型LED 18的触点28。因此,第二晶体管44允许连接微型LED 18并且在触点32与28之间施加电压差Vp-Vn,从而将电流注入微型LED 18;以及
-连接在第二晶体管44的栅极与漏极之间的电容器48,用于在两次刷新之间保持微型LED 18的状态。
图4示出上述面板的连接和控制图,图中的面板包括:由3行和3列微芯片16组成的阵列14;连接到逐行刷新的阵列14的电路50的连接衬底12;用于控制由电路50所选择行中的微型LED的照明状态的电路52;以及电压源Vp和Vs。
根据本发明的制造发光面板(例如,诸如上述面板)的第一实施方案,现在将结合图5A至图5I进行描述。
该方法首先在硅衬底60上制造有源控制电路20的阵列,例如根据现有领域中众所周知的ASIC(“专用集成电路”)制造技术(图5A)。
电路20间隔开至少距离Δ,该距离经过选择,用于围绕每个电路20形成沟槽以能够随后实现它们的个体化。例如,距离Δ根据沟槽制造工艺的准确度进行选择,从而允许采用所述工艺的电路20具有最大密度。
独立于控制电路20的阵列的制造,该方法包括制造第二衬底61,该第二衬底包括用于形成微型LED 18的阵列的半导体层的叠堆以及电触点的叠堆。制造用于形成微型LED的半导体层的叠堆(例如,两个GaN层,分别为P型和N型)例如通过生长衬底62(例如,由蓝宝石或硅制成)上的外延形成,这在现有领域中是众所周知的(图5B)。例如,微型LED 18采用如文献Journal of Crystal Growth(《晶体生长杂志》)第268卷(2004年)第527-530页所述的技术制造。
参见图5C,然后将控制电路20的阵列和微型LED 18的阵列彼此叠置并且彼此固定,例如,通过直接异质结合或通过使用焊料凸块的“倒装芯片”型混合以及热压和/或通过使用中空微管实现,诸如文献WO 2013/001225或文献FR 2 928 033中所述的那些。从而执行阵列的互连,使每个微型LED的连接触点28与相关联控制电路的晶体管44的对应终端相连接。然后形成TSV型触点转移30,以将微型LED的每个触点26转移至控制电路的自由表面。然后移除生长衬底62,例如就蓝宝石衬底而言通过激光剥离实现,或者就硅衬底而言通过机械抛光和KOH化学蚀刻实现。
这样由微型LED的阵列叠堆和控制电路的阵列叠堆形成的第三衬底63转移至所谓“处理”衬底64(例如由硅制成),通过所谓“暂时”结合实现,从而允许例如通过树脂(具体地为Brewer的“HT-10.10”树脂)便于后续移除(图5D)。
该方法对每个微芯片14进行个性化处理,具体方式是在处理衬底64下方围绕每个微芯片蚀刻沟槽66,例如使用Cl2通过ICP(“电感耦合等离子体”:RIE模式,提供取向性更好的蚀刻)实现RIE(“反应离子蚀刻”)(图5E)。
独立地,在前述步骤中,该方法包括制造第四无源衬底68,该第四无源衬底具有面板所需的尺寸并且包括用于在每个控制电路20的下表面34上提供的触点32、40、42和46的电连接件的电连接件的网络,例如,在其表面上形成具有由氧化铟锡(或“ITO”)制成的电迹线的玻璃板。
然后将通过其微型LED 18附接到处理衬底64的微芯片14置于衬底68上,并且固定以使控制电路的电连接件电连接到衬底68的电连接件,例如使用直接异质结合或“倒装芯片”混合实现,如前文所述(图5F)。然后通过加热例如至最高300℃,使微芯片14与处理衬底64分离。
由于处理衬底64上的微芯片14的间距(采用当前制造技术可达到约数十微米,例如30μm)可能大于发光面板的微芯片阵列的间距(当前为约数百微米,例如在15微米至1毫米的范围内),因此该方法例如包括将微芯片的一部分置于无源衬底68上(图5G),然后将具有剩余微芯片的处理衬底偏移发光面板的间距,放置微芯片的另一部分(图5H、图5I),依此类推,直至完成发光面板的制造(图5J)。
在该第一实施方案中,使用处理衬底将微芯片14置于无源连接衬底68上。使用通过暂时结合粘附到微芯片14的处理衬底64具有能够移除任何生长衬底的优势。然而,它需要制造步骤和附加的放置步骤。
根据本发明方法的第二实施方案,如图6A至图6I所示,在第一衬底和第二衬底60,61彼此互连之后不移除生长衬底62,如5C中所示,而是用作处理衬底,从而能够省去制造步骤和放置步骤,并且便于阵列68上的微芯片14的对准。然后通过使用局部激光剥离将微芯片14与生长衬底62分离(图6F),诸如美国专利6071795中所述(即,使用脉冲248nm KrF激光器,并且使微型LED暴露在介于100mJ/cm2和600mJ/cm2之间的能量中)。对于微型LED,透镜可以使激光束聚焦在蓝宝石与GaN之间的界面上。
对于应用于制造发光面板以显示彩色图像的制造方法的上述实施方案,可首先放置对应于蓝色像素的微芯片开始,放置适用蓝色的互连件,然后可添加互连件以放置绿色像素,然后可添加互连件以放置红色像素。
此外,微芯片14与互连衬底68之间的互连件可为铜微管或微柱(所谓的“微凸块”技术)或铜连接垫以在垫之间实现直接结合(例如,异质或热压)。
描述了具体控制电路,具体地包括对每个微芯片引入四个电连接件的控制电路。当然,可设想任何类型的有源控制电路。具体地讲,可在ASIC制造方法中提供最后一个互连层以便具有平坦表面。具体地讲,在硅中制造晶体管的方法之后,所得的表面可为非平面的。为便于有源硅阵列与微型LED阵列(例如,由GaN制成)之间的互连,优选的是置于彼此之上的表面为平坦的。为实现这一点,通过沉积介电绝缘体(例如SiO2)、进行蚀刻、使蚀刻图案出现在连接件的层上、沉积铜以填充蚀刻孔并且采用CMP(“化学机械抛光”)抛光以具有平坦表面,由此形成有源阵列上的最后一层。此类技术通常被称为“镶嵌”。
Claims (7)
1.一种制造发光面板(10)的方法,所述方法包括:
-制造第一衬底(61),所述第一衬底包括:
用于形成无机半导体微型LED(18)的半导体层叠堆;以及
用于所述微型LED的电连接件(26,28)的阵列,
以使得所述电连接件(26,28)布置在所述第一衬底的第一表面(36)上的方式来执行所述第一衬底的所述制造;
-在独立于所述第一衬底(61)的第二硅衬底(60)上制造用于控制基于晶体管的所述微型LED(18)的控制 电路(20)的阵列,所述制造被执行使得:
用于控制所述微型LED的第一电连接件布置在所述第二硅衬底的第一表面(34)上;
以及用于驱动所述发光面板的第二电连接件(32,42,46)布置在所述第二硅衬底的第二表面上;
-将所述第一衬底(61)的所述第一表面和所述第二硅衬底(60 )的所述第一表面置于彼此之上并且将所述表面彼此固定,以使所述微型LED的所述电连接件与控制电路的所述第一电连接件实现电连接,从而获得包括电子微芯片(16)的阵列的第三衬底,每个所述电子微芯片由微型LED(18)的叠堆和控制电路(20)的叠堆形成;
-制造微芯片转移结构(16,64),所述微芯片转移结构包括:
转移衬底(64);
以及所述电子微芯片(16)的阵列,每个微芯片仅通过所述微芯片的微型LED固定到所述转移衬底,并且通过围绕所述微芯片在所述第三衬底中形成沟槽(66)实现个体化;
-制造独立于所述转移结构的第四衬底(68),所述第四衬底包括用于提供信号以驱动所述发光面板的电连接件,所述电连接件布置在所述第四衬底的第一表面上;
-将所述转移结构置于所述第四衬底的所述第一表面上,将所述电子微芯片固定到所述第四衬底的所述第一表面以将所述控制电路的所述第二电连接件与所述第四衬底的所述电连接件连接,并且将所述电子微芯片与所述转移衬底分离。
2.根据权利要求1所述的制造发光面板(10)的方法,其中所述微芯片转移结构(16,64)的所述制造包括:
-将所述第三衬底置于并暂时结合到所述转移衬底(64)上;
-然后在所述转移衬底下方围绕所述电子微芯片形成所述沟槽(66)。
3.根据权利要求1所述的制造发光面板(10)的方法,其中:
-所述第一衬底的所述制造包括制造生长衬底(62)并通过形成所述微型LED(18)的外延半导体层生长,所述生长衬底形成所述微芯片转移结构的所述衬底;
-所述电子微芯片转移结构的所述制造包括在所述转移衬底下方围绕所述微芯片形成所述沟槽(66);
-所述电子微芯片与所述转移衬底的所述分离包括在所述微芯片上的所述转移衬底的垂直方向上激光照射所述转移衬底以实现所述电子微芯片与所述转移衬底的分离。
4.根据权利要求1、2或3所述的制造发光面板(10)的方法,其中:
-所述转移结构的所述电子微芯片(16)的阵列表现出第一重复间距;
-所述第四衬底(68)的所述电连接件布置在具有大于所述第一重复间距的第二重复间距的阵列中;
-所述转移结构(16,64)的所述转移,所述电子微芯片固定到所述第四衬底(68)的所述第一表面,以及所述电子微芯片(16)与所述转移衬底的所述分离,包括:
将所述转移结构置于所述第四衬底的第一位置处;
将至少一个第一微芯片固定到所述第一位置处;
通过使所述转移结构和所述第四衬底相对于彼此偏移所述第二重复间距,将所述转移结构置于所述第四衬底的第二位置处;
以及将至少一个第二微芯片固定到所述第二位置处。
5.根据权利要求1、2或3所述的制造发光面板(10)的方法,其中所述第二硅衬底上的所述控制电路(20)根据ASIC制造技术制造。
6.根据权利要求1、2或3所述的制造发光面板(10)的方法,其中所述第四衬底(68)仅包括电连接件。
7.根据权利要求1、2或3所述的制造发光面板(10)的方法,其中形成所述第一衬底的所述微型LED(18)的所述叠堆由氮化镓制成,并且/或者由氮化铟镓制成,并且/或者由氮化铝镓制成。
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FR3005788B1 (fr) | 2013-05-14 | 2016-10-21 | Commissariat Energie Atomique | Dispositif optoelectronique et son procede de fabrication |
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2015
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2016
- 2016-11-15 WO PCT/FR2016/052957 patent/WO2017089676A1/fr active Application Filing
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EP3381060A1 (fr) | 2018-10-03 |
KR102560977B1 (ko) | 2023-07-27 |
FR3044467B1 (fr) | 2018-08-10 |
TWI710103B (zh) | 2020-11-11 |
KR20180088366A (ko) | 2018-08-03 |
US10685945B2 (en) | 2020-06-16 |
TW201729396A (zh) | 2017-08-16 |
WO2017089676A1 (fr) | 2017-06-01 |
JP2022025143A (ja) | 2022-02-09 |
JP7003032B2 (ja) | 2022-01-20 |
EP3381060B1 (fr) | 2019-10-23 |
JP2018538554A (ja) | 2018-12-27 |
CN107924964A (zh) | 2018-04-17 |
US20180247922A1 (en) | 2018-08-30 |
FR3044467A1 (fr) | 2017-06-02 |
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