CN107785690B - 结合组件 - Google Patents

结合组件 Download PDF

Info

Publication number
CN107785690B
CN107785690B CN201710716884.4A CN201710716884A CN107785690B CN 107785690 B CN107785690 B CN 107785690B CN 201710716884 A CN201710716884 A CN 201710716884A CN 107785690 B CN107785690 B CN 107785690B
Authority
CN
China
Prior art keywords
substrate
electrode
electrodes
disposed
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710716884.4A
Other languages
English (en)
Other versions
CN107785690A (zh
Inventor
闵真植
孙恩喆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Display Co Ltd
Original Assignee
Samsung Display Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Display Co Ltd filed Critical Samsung Display Co Ltd
Publication of CN107785690A publication Critical patent/CN107785690A/zh
Application granted granted Critical
Publication of CN107785690B publication Critical patent/CN107785690B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50—Fixed connections
    • H01R12/59—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures
    • H01R12/62—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50—Fixed connections
    • H01R12/59—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures
    • H01R12/65—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures characterised by the terminal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0277—Bendability or stretchability details
    • H05K1/028—Bending or folding regions of flexible printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits
    • H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13458—Terminal pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05611—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05613—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05616—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05639—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
    • H01L2224/1132—Screen printing, i.e. using a stencil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1141—Manufacturing methods by blanket deposition of the material of the bump connector in liquid form
    • H01L2224/11422—Manufacturing methods by blanket deposition of the material of the bump connector in liquid form by dipping, e.g. in a solder bath
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H01L2224/13013—Shape in top view being rectangular or square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H01L2224/13014—Shape in top view being circular or elliptic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13113—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13116—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
    • H01L2224/1413—Square or rectangular array
    • H01L2224/14131—Square or rectangular array being uniform, i.e. having a uniform pitch across the array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
    • H01L2224/1413—Square or rectangular array
    • H01L2224/14134—Square or rectangular array covering only portions of the surface to be connected
    • H01L2224/14136—Covering only the central area of the surface to be connected, i.e. central arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29311—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29313—Bismuth [Bi] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29301—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29316—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/81139—Guiding structures on the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8114—Guiding structures outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/81141—Guiding structures both on and outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
    • H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/83139—Guiding structures on the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8314—Guiding structures outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/83141—Guiding structures both on and outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/8322—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/83224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83868—Infrared [IR] curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83871—Visible light curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83874—Ultraviolet [UV] curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9211—Parallel connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/147—Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10128—Display
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Combinations Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

公开了一种结合组件，该结合组件包括：第一电子部件，其包括第一基板和以距离第一基板的表面的第一高度设置在按压区域中的多个第一电极；第二电子部件，其包括第二基板和以距离第二基板的表面的第二高度设置的多个第二电极，第二电极与对应的第一电极重叠以面向对应的第一电极；导电结合层，其设置在彼此重叠的第一电极与第二电极之间以结合第一电极和第二电极；以及至少一个间隔件，其设置在第一基板与第二基板之间以与按压区域重叠，至少一个间隔件具有大于通过对第一高度和第二高度求和而获得的值的厚度。

Description

结合组件
相关申请的交叉引用
本申请要求于2016年8月26日提交的第10-2016-0109217号韩国专利申请的优先权和权益，该韩国专利申请出于所有目的通过引用并入本文，如同在本文中对其进行全面阐述一样。
技术领域
示例性实施方式涉及结合组件以及包括该结合组件的显示装置。
背景技术
许多电子部件被用于诸如显示装置、智能电话、平板电脑、电视机和监视器的电子产品，并且期望开发出能够将电子部件系统化以实现其相互之间有组织的且优化的功能的电子封装技术。
电子封装技术可以用于保护构成产品的每个部件以及产品本身不受外部环境的影响。电子封装技术还可以用于向必要的元件供电，可以提供平滑的电信号路径，以及可以用来耗散在信号处理操作中产生的热量。
各种电子封装技术被用来将各种部件配置在产品的有限空间中。为了将模块彼此连接，需要印刷电路板之间或者印刷电路板与诸如集成电路芯片的电子部件之间的连接技术。此外，重要的是获得并维持部件之间的连接可靠性。
在本背景技术部分中公开的上述信息仅用于增强对本发明构思的背景的理解，并且因此，其可以包含不形成在本国对本领域普通技术人员已知的现有技术的信息。
发明内容
示例性实施方式提供了能够具有改进的连接可靠性的结合组件和使用该结合组件的显示装置。
另外的方面将在下面的详细描述中阐述，并且将部分地从公开内容中显而易见，或者可以通过本发明构思的实践来习得。
示例性实施方式公开了一种结合组件，其包括：第一电子部件，其包括第一基板和以距离第一基板的表面的第一高度设置在按压区域中的多个第一电极；第二电子部件，其包括第二基板和以距离第二基板的表面的第二高度设置的多个第二电极，第二电子部件设置在第一电子部件上，使得第二电极与对应的第一电极重叠并且面向对应的第一电极；导电结合层，其设置在第一电极与第二电极之间，并且配置为结合第一电极和第二电极；以及至少一个间隔件，其设置在第一基板与第二基板之间以与按压区域重叠，至少一个间隔件具有大于第一高度和第二高度之和的厚度。
至少一个间隔件可以包括彼此分离的多个间隔件。
间隔件可以与按压区域的四个边缘重叠。
多个间隔件可以与按压区域的四个侧部重叠。
相邻的间隔件之间的距离可以大于相邻的第一电极或相邻的第二电极之间的距离。
至少一个间隔件可以附接、印刷或沉积在第一基板和第二基板中的至少一个上。
间隔件可以具有约200℃或更高的熔点。
结合组件还可以包括设置在第一基板与第二基板之间的各向异性导电层，并且各向异性导电层可以包含焊料颗粒。
结合组件还可以包括设置在第一基板与第二基板之间的非导电层。
至少一个间隔件可以围绕第一电极和第二电极。
结合组件还可以包括设置成在按压区域中不与按压区域的边缘重叠的至少一个间隔件。
第一电子部件和第二电子部件中的至少一个可以是柔性印刷电路板。
示例性实施方式还公开了一种显示装置，其包括显示面板和连接到显示面板的结合组件，其中结合组件包括：第一柔性印刷电路板，其包括第一基板和以距离第一基板的表面的第一高度设置在按压区域中的多个第一电极；第二柔性印刷电路板，其包括第二基板和以距离第二基板的表面的第二高度设置的多个第二电极，第二柔性印刷电路板设置在第一柔性印刷电路板上，使得第二电极与对应的第一电极重叠并且面向对应的第一电极；导电结合层，其设置在第一电极与第二电极之间，并且配置为结合第一电极和第二电极；以及至少一个间隔件，其设置在第一基板与第二基板之间以与按压区域重叠，至少一个间隔件具有大于第一高度和第二高度之和的厚度。
根据示例性实施方式，在使用诸如焊料的导电结合层结合的组件以及包括该组件的显示装置中，能够减小连接电极之间的电阻，并且降低在相邻电极之间产生短路的风险。
上述一般描述和以下详细描述是示例性和解释性的，并且旨在提供对所要求保护的主题的进一步的解释。
附图说明
被包括以提供对本发明构思的进一步理解并且被并入本说明书并构成本说明书的一部分的附图示出了本发明构思的示例性实施方式，并且与描述一起用于解释发明构思的原理。
图1是示意性地示出根据本发明的示例性实施方式的结合组件的立体图。
图2是示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。
图3是根据示例性实施方式的沿着图2中的线III-III'截取的剖视图。
图4是根据示例性实施方式的沿着图2中的线IV-IV'截取的剖视图。
图5是示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。
图6是根据示例性实施方式的沿着图5中的线VI-VI'截取的剖视图。
图7是根据示例性实施方式的沿着图5中的线VII-VII'截取的剖视图。
图8是示出制造图3中的结合组件的方法的过程剖视图。
图9是示出制造图5中的结合组件的方法的过程剖视图。
图10是根据示例性实施方式的沿着图2中的线III-III'截取的剖视图。
图11是示出制造图10中的结合组件的方法的过程剖视图。
图12是根据示例性实施方式的沿着图2中的线III-III'截取的剖视图。
图13是示出制造图11中的结合组件的方法的过程剖视图。
图14是示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。
图15是示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。
图16示意性地示出了根据示例性实施方式的结合组件。
具体实施方式
在以下描述中，为了解释的目的，阐述了众多特定细节以提供对多种示例性实施方式的透彻理解。然而，显而易见的是，可以在没有这些特定细节或具有一个或多个等效布置的情况下实践各种示例性实施方式。在其他情况下，以框图形式示出公知的结构和装置，以避免不必要地模糊各种示例性实施方式。
在附图中，为了清楚和描述的目的，层、膜、面板、区域等的尺寸和相对尺寸可能被夸大。此外，相同的附图标记表示相同的元件。
当元件或层被称为在另一元件或层“上”、“连接到”或“联接到”另一元件或层时，其可以直接在另一元件或层上、直接连接或直接联接到另一元件或层，或者可以存在中间元件或中间层。然而，当元件或层被称为“直接”在另一元件或层“上”、“直接连接到”或“直接联接到”另一元件或层时，不存在中间元件或中间层。为了本公开的目的，“X、Y和Z中的至少一个”和“选自由X、Y和Z组成的组的至少一个”可以解释为仅X、仅Y、仅Z、或者X、Y和Z中的两个或更多个的任意组合，诸如，例如，XYZ、XYY、YZ和ZZ。贯穿全文，相同的附图标记指代相同的元件。如本文使用的，术语“和/或”包括相关列出项目中的一个或多个的任何和所有组合。
尽管术语第一、第二等可以在本文中用于描述各种元件、部件、区域、层和/或区段，但这些元件、部件、区域、层和/或区段不应受这些术语的限制。这些术语用于将一个元件、部件、区域、层和/或区段与另一个元件、部件、区域、层和/或区段区分开。因此，在不脱离本公开的教导的情况下，可以将下面讨论的第一元件、第一部件、第一区域、第一层和/或第一区段称为第二元件、第二部件、第二区域、第二层和/或第二区段。
诸如“之下”、“下方”、“下部”、“上方”、“上部”等的空间相关术语可以在本文中用于描述的目的，并且从而描述如附图中所示的一个元件或特征与另一个元件(多个元件)或特征(多个特征)的关系。除了在附图中描绘的取向之外，空间相关术语旨在涵盖设备在使用、操作和/或制造中的不同取向。例如，如果附图中的设备翻转，那么描述为在其他元件或特征“下方”或“之下”的元件被定向为在其他元件或特征“上方”。因此，示例性术语“下方”可以包含上方和下方两种取向。此外，设备可以被另外定向(例如，旋转90度或处于其他取向)，并且因此，本文所使用的空间相关描述语被相应地解释。
本文所使用的术语是出于描述特定实施方式的目的而并不旨在限制。如本文所用的，除非上下文明确地另外指出，否则单数形式“一(a)”、“一(an)”和“所述(the)”旨在同样包括复数形式。此外，当在本说明书中使用时，术语“包括”、“包括有”、“包含”和/或“包含有”表示所陈述的特征、整体、步骤、操作、元件、部件和/或它们的组的存在，但是不排除一个或多个其他特征、整体、步骤、操作、元件、部件和/或它们的组的存在或添加。
本文参考作为理想化示例性实施方式和/或中间结构的示意图的剖视图来描述多种示例性实施方式。因此，由于例如制造技术和/或公差而导致的图示的形状变化是将被预期的。因此，本文公开的示例性实施方式不应被解释为限于区域的具体示出的形状，而是包括由于例如制造而导致的形状上的偏差。附图中所示的区域本质上是示意性的，并且它们的形状并不旨在示出装置的区域的实际形状，并且不旨在是限制性的。
除非另有限定，否则本文使用的所有术语(包括技术术语和科学术语)都具有与由本公开所属领域的普通技术人员的通常理解相同的含义。诸如常用词典中定义的术语的术语应被解释为具有与其在相关领域的语境中的含义一致的含义，并且将不以理想化或过度正式的意义来解释，除非本文明确地如此限定。
将参考附图描述根据本发明的示例性实施方式的结合组件。
图1示意性地示出了根据本发明的示例性实施方式的结合组件，并且图2是示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。图3是根据示例性实施方式的沿着图2中的线III-III'截取的剖视图，并且图4是根据示例性实施方式的沿着图2中的线IV-IV'截取的剖视图。
参考图1，根据本示例性实施方式的结合组件包括彼此结合的第一电子部件10和第二电子部件20。当第一电子部件10和第二电子部件20彼此结合时，其特定按压区域PA首先被结合机的按压工具PT按压。当被按压工具PT按压时，第一电子部件10或第二电子部件20的按压区域PA接触按压工具PT的按压表面，以使得第一电子部件10或第二电子部件20被按压工具PT直接按压。因此，按压区域PA具有与按压工具PT的按压表面的平面形状对应的形状，该形状可以是基本上矩形的。第一电子部件10和第二电子部件20通过压力和加热而被实际结合的结合区域对应于按压区域PA，但是它们的尺寸可以彼此不同。
第一电子部件10可以是印刷电路板(PCB)，并且第二电子部件20也可以是PCB。第一电子部件10和第二电子部件20都可以是柔性PCB，或者第一电子部件10可以是刚性PCB，并且第二电子部件20可以是柔性印刷电路板。第一电子部件10和第二电子部件20中的至少一个可以是不同于印刷电路板的电子部件。例如，第二电子部件20可以是安装在第一电子部件10上的集成电路芯片，其可以是柔性或刚性的印刷电路板或显示面板。第一电子部件10和第二电子部件20可以是可包括电极并且可以通过加热和压力彼此结合的任何电子部件。
图2示出了包括按压区域PA的第一电子部件10和第二电子部件20的平面形状，并且图3和图4示出了其剖视图。
参考图2和图3，第一电子部件10包括第一基板11和设置在第一基板11上的第一电极12，并且第二电子部件20包括第二基板21和设置在第二基板21上的第二电极22。
当第一电子部件10是印刷电路板时，第一基板11可以是塑料板或膜。当第一电子部件10是集成电路芯片时，第一基板11可以是硅基板。类似地，当第二电子部件20是印刷电路板时，第二基板21可以是塑料板或膜。当第二电子部件20是集成电路芯片时，第二基板21可以是硅基板。第一电极12和第二电极22分别形成为以预定高度h1和h2从第一基板11和第二基板21的表面突出。第一电极12的高度h1可以与第二电极22的高度h2基本上相同或不同。第一电极12和第二电极22设置在按压区域PA内。因此，由第一电极12限制的区域可以位于按压区域PA内，并且由第二电极22限制的区域可以位于按压区域PA内。
在本文中，基板11和21的表面不仅表示塑料板、膜等的表面，而且还表示形成在塑料板、膜等的表面上的暴露于外部的绝缘层等的表面。因此，基板11和21的表面可以表示未设置有电极12和22的表面部分。
第一电极12和第二电极22用作分别与不同电子部件连接以传送或接收信号的外部端口。这类电极可以被不同地称为焊盘、焊盘电极、电极焊盘、端子电极、电极端子或凸块。第一电极12和第二电极22可以与形成在第一电子部件10和第二电子部件20中的布线(未示出)连接。
设置为面向彼此的第一电极12和第二电极22被示出为彼此完全相同地重叠为单个电极。然而，第一电极12和第二电极22可以彼此不对准，并且可以具有不同的尺寸和/或形状。第一电极12和第二电极22中的每一个可以具有多种平面形状，诸如多边形、圆形和椭圆形以及四边形。例如，如图2所示，第一电极12和第二电极22可以设置成两行。然而，第一电极12和第二电极22可以设置成一行或三行或更多行，并且第一电极12的数量可以不同于第二电极22的数量。
导电结合层30设置在第一电极12与第二电极22之间。导电结合层30用于将第一电极12与第二电极22结合并电连接。导电结合层30可以由焊料形成，该焊料为用于结合两种金属的合金。在下文中，焊料将被描述为导电结合层30的材料。导电结合层30可以通过利用与压力一起生成的热量来熔化焊料并且然后使其硬化而形成。第一电极12和第二电极22使用冶金结合通过导电结合层30彼此连接，而不是通过物理点接触来彼此连接，其中，物理点接触通过在树脂的表面上涂覆金属层而获得的导电球来实现。
可以用于形成导电结合层30的焊料可以由具有低于第一电极12和第二电极22的熔点的熔点以及与第一电极12和第二电极22的粘合性的任何材料形成。例如，焊料可以由锡-铅(Sn-Pb)合金、锡-铋(Sn-Bi)合金和锡-银-铜(Sn-Ag-Cu)合金形成，并且可以具有约200℃或更低或者约300℃或更低的熔点。在附图中，导电结合层30被示出为设置在第一电极12和第二电极22的相对的表面之间，但也可以设置在第一电极12和第二电极22的侧表面中。导电结合层30可以不连续地或连续地形成在面向彼此设置的第一电极12与第二电极22之间。
间隔件50在第一电极12和第二电极22附近设置在按压区域PA的边缘处。间隔件50设置成在第一电子部件10和第二电子部件20之间(具体地，在第一基板11和第二基板21之间)与按压区域PA的边缘重叠。当第一基板11和第二基板21被按压工具PT按压时，间隔件50设置成与被按压的表面的边缘重叠，并且用于将第一基板11和第二基板21彼此分离间隔件50的厚度“t”。间隔件50的厚度t可以大于通过将第一电极12的高度h1与第二电极22的高度h2求和而获得的值。因此，在面向彼此设置的第一电极12与第二电极22之间可以获得间隙t-h1-h2。然而，当间隔件50的厚度t太厚时，面向彼此的第一电极12和第二电极22可能无法彼此结合。因此，间隔件50的厚度t可以小于通过将导电结合层30的厚度与第一电极12的高度h1和第二电极22的高度h2相加而获得的值。
如在此示出的，间隔件50可以具有四边形平面形状，或者可以具有多种平面形状，诸如多边形、圆形和椭圆形平面形状。设置在按压区域PA的边缘处的间隔件50具有基本上相同的尺寸，并且相邻间隔件50之间的距离d2可以基本上相同或者可以不同。
间隔件50可以由这样的材料形成，该材料不被在执行结合时所施加的热量熔化或改变。例如，间隔件50可以由熔点在约200℃或更高、250℃或更高、或者300℃或更高的范围内的材料形成。间隔件50可以预先形成并且可以附接到第一基板11和/或第二基板21，或者可以通过印刷、蒸发等直接形成在第一基板11和/或第二基板21上。间隔件50可以与第一电极12和第二电极22分离，以使得它们不与第一电极12和第二电极22重叠。
即使将第一基板11和第二基板21以及按压工具PT的按压表面设计成平坦的，它们也可能不被制成是完全平坦的。因此，当第一基板11和第二基板21被按压工具PT按压时，第一基板11和第二基板21中的一个可能在按压区域PA中被无意地按压得更远。在更远地被压缩的区域中，导电结合层30的需要设置在面向彼此的第一基板11与第二基板21之间的焊料可能被推动为与相邻的电极接触，从而产生短路，或者增加第一基板11与第二基板21之间的接触电阻。在本示例性实施方式中，间隔件50设置成与按压区域PA的边缘重叠。因此，即使由于第一基板11、第二基板21、按压工具PT的按压表面等的不完美的平坦度而过度按压任意部分，也可以防止第一基板11和第二基板21被按压成使得它们之间的距离等于或小于间隔件50的厚度t。当间隔件50的厚度t大于第一电极12和第二电极22的高度h1和h2的和时，可以确保第一电极12与第二电极22之间的间隙，而不管它们是否被过度按压。因此，具有预定厚度的导电结合层30保留在间隙中。因此，导电结合层30可以用于稳定地结合第一电极12和第二电极22，从而减少与相邻电极发生短路的可能性。
当间隔件50设置在按压区域PA的所有四个边缘处时，按压工具PT的按压表面的四个边缘由间隔件50支承。因此，能够防止按压工具PT向任一侧产生倾斜压力。类似地，即使当间隔件50被设置成与按压区域PA的所有四个边缘重叠时，也能够防止按压工具PT向任一侧产生倾斜压力。因此，在防止由于过度按压或非均匀压力而导致的短路产生或接触电阻增加的同时，总体地且更均匀地调节第一基板11与第二基板21之间的距离是可能的。因此，能够减少设置在按压区域PA中的电极12和22的电极对之间的导电结合层30的数量和厚度的变化。
粘合层40也设置在第一基板11与第二基板21之间。粘合层40可以填充第一基板11与第二基板21之间的未被第一电极12和第二电极22以及导电结合层30占据的空间。粘合层40可以设置在不连续的导电结合层30之间，其中，不连续的导电结合层30设置在面向彼此的第一电极12与第二电极22之间。换句话说，粘合层40可以与导电结合层30一起设置在第一电极12与第二电极22之间。粘合层40用于结合第一电子部件10和第二电子部件20，以增大它们之间的粘合力。粘合层40可以设置成围绕第一电极12和第二电极22以及导电结合层30，以有助于防止这些层氧化。
焊料颗粒31包含在相邻的第一电极12之间以及相邻的第二电极22之间的粘合层40中。焊料颗粒31是在粘合层40中所包含的焊料颗粒中的不构成位于第一电极12与第二电极22之间的导电结合层30的焊料颗粒。因此，焊料颗粒31由与导电结合层30的材料相同的材料形成。焊料颗粒31可以具有球形形状，但是可以改变焊料颗粒31的形状或者它们可以聚集。粘合层40和焊料颗粒31主要设置在按压区域PA中。然而，如图4所示，粘合层40和焊料颗粒31可以设置在相邻的间隔件50之间，并且还可以设置在按压区域PA中。
在下文中，将基于与前述示例性实施方式的不同来描述根据本发明的示例性实施方式的结合组件。
图5是示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。图6是根据示例性实施方式的沿着图5中的线VI-VI'截取的剖视图。图7是根据示例性实施方式的沿着图5中的线VII-VII'截取的剖视图。
参考图5，如在图2的前述示例性实施方式中一样，第一电极12和第二电极22设置在按压区域PA中，并且间隔件50设置在第一电极12和第二电极22的周围。然而，与图2的示例性实施方式不同(在图2中，间隔件50设置在按压区域PA的边缘处)，间隔件50设置在按压区域PA内。即，间隔件50设置成与按压区域PA重叠。例如，如图5中所示，间隔件50可设置成与按压区域PA的四个侧部重叠。因此，当第一基板11和第二基板21被按压工具PT按压时，它们之间的距离可以分离开间隔件50的厚度t，并且能够防止由按压工具PT导致的向任一侧的倾斜压力。与所示出的示例性实施方式不同，一些间隔件50可以设置成与按压区域PA的至少一个边缘重叠。
参考图6和图7，包含焊料颗粒31的粘合层40设置在间隔件50与第一电极12和第二电极22之间以及相邻的间隔件50之间。粘合层40也可以设置在间隔件50的外周中。因此，粘合层40可以设置成完全围绕相应的间隔件50，并且因此，可以在间隔件50周围增加第一电子部件10与第二电子部件20之间的结合力。
到目前为止，已经基于根据本发明的示例性实施方式的结合组件的结构性质描述了根据本发明的示例性实施方式的结合组件。在下文中，将参考图8和图9来描述结合组件的制造方法。
图8是示出制造图3中的结合组件的方法的过程剖视图。
参考图8，将第一电子部件10的第一电极12设置成在结合机的支承板(未示出)等中面向顶部。在图8中，可以将第一电子部件10的第一电极12以高度h1形成在第一基板11上。在第一基板11的与对应于按压工具PT的按压表面PS的按压区域PA重叠的部分处形成或附接具有厚度t的间隔件50。
接下来，在第一电子部件10上设置各向异性导电层ACF，其中，在各向异性导电层ACF中，焊料颗粒31分散在树脂中。例如，可以将各向异性导电层ACF设置成与第一电极12重叠，而不与间隔件50重叠。为此，可以将具有附接至其的离型纸(release paper)的各向异性导电层切割成预定尺寸，并且随后可以将离型纸从其去除，并且它们可以用作各向异性导电层ACF。可以使用诸如环氧树脂、丙烯酸树脂、聚酯树脂、双马来酰亚胺树脂和氰酸酯树脂的热固性树脂作为各向异性导电层ACF中的树脂，并且各向异性导电层ACF中的树脂可以处于半固化状态。树脂可以是光固化树脂。焊料颗粒31可以具有约50μm或更小的直径，或者在约1μm至约25μm的范围内的直径。焊料颗粒31可以由包含锡(Sn)、铅(Pb)、铋(Bi)、银(Ag)或铜(Cu)的合金形成，但是合金不限于此。
接着，将第二电子部件20的第二电极22设置在各向异性导电层ACF上，以使得各向异性导电层ACF插置在第一电子部件10与第二电子部件20之间。第二电子部件20的第二电极22可以以高度h2形成在第二基板21上。接下来，在通过按压工具PT对按压区域PA进行按压的同时对其进行加热时，可以熔化设置在彼此重叠的第一电极12与第二电极22之间的各向异性导电层ACF的焊料颗粒31，因此它们的形式可以在第一电极12与第二电极22之间改变，或者相邻的焊料颗粒可以在它们的形式被改变的同时彼此附接或分散，以及焊料颗粒中的一些可能流出到第一电极12和第二电极22的外周。即使这样，因为第一电极12与第二电极22之间可由于设置在第一基板11与第二基板21之间的间隔件50而存在间隙(t-h1-h2)，所以熔化的焊料颗粒可以保留在第一电极12与第二电极22之间，并且熔化的焊料颗粒连接到需要与其绝缘的相邻的电极12和22的可能性降低。
在按压区域PA的压力和加热下，各向异性导电层ACF中的树脂填充在相邻的电极12和22之间形成的空间，并且通过热量等被固化。剩余的树脂也与在第一电极12与第二电极22之间熔化的焊料颗粒一起固化。在填充以预定间隔分开形成的按压区域PA的空间之后剩下的树脂在按压区域PA被按压时流到按压区域PA的外部。在这种情况下，参考图2，可以将间隔件50以预定距离d2分开设置，以使得树脂平滑地流动。相邻的间隔件50之间的距离d2可以与相邻的第一电极12或第二电极22之间的距离d1基本上相同或比相邻的第一电极12或第二电极22之间的距离d1大。当距离d2小于距离d1时，电极12与22之间的树脂的流速可能不同于间隔件50之间的树脂的流速，从而使粘合层40的均匀性劣化，并且因此，结合可能劣化。具有基本上相同尺寸的间隔件50也有利于获得树脂的流动均匀性。未设置在第一电极12与第二电极22之间的焊料颗粒31可以被部分熔化，并且因此改变或保持其原始形状(例如，球形)。
例如，可以使用可加热的按压工具PT来加热按压区域PA。可替代地，可以通过将激光等直接照射到各向异性导电层ACF来执行加热，或者可以通过使用超声波的振动在各向异性导电层ACF中自动执行加热。在使各向异性导电层ACF中的树脂固化时，可以在处于压力下的同时照射诸如紫外线的光。
最后，在第一电极12与第二电极22之间熔化的焊料颗粒31被硬化为导电结合层30，导电结合层30具有例如与被熔化之前的焊料颗粒31相比的扁平形式、其中相邻焊料颗粒彼此附接的形式、或其混合形式，以结合第一电极12和第二电极22。固化的树脂用作附接第一电子部件10和第二电子部件20的粘合层40。如上所述，例如，间隔件50在初始步骤处(即，在第一电子部件10和第二电子部件20的结合之前)设置在第一基板11上。然而，间隔件50可以设置在第二基板21上。可替代地，间隔件50中的一些可以设置在第一基板11上，并且另一些可以设置在第二基板21上。
图9是示出制造图5中的结合组件的方法的过程剖视图。
除了各向异性导电层ACF的尺寸等之外，图9的示例性实施方式大体上与图8的示例性实施方式相同。具体地，在图9的示例性实施方式中，各向异性导电层ACF被设置成与第一电极12和间隔件50重叠。为此，可以将具有附接至其的离型纸的各向异性导电层切割成预定尺寸，以能够从中去除离型纸，并且可以将该各向异性导电层用作各向异性导电层ACF，或者其中焊料颗粒31分散在树脂中的各向异性导电层ACF可以直接形成在第一电子部件10上。
通过按压工具PT进行按压的按压区域PA可以具有对应于各向异性导电层ACF的尺寸。当按压区域PA小于各向异性导电层ACF时，保持在间隔件50上的各向异性导电层ACF不被按压，并且因此可能保持在间隔件50上，并且各向异性导电层ACF的位于按压区域PA的外周处的树脂可能保持在非固化状态。这是因为间隔件50可以在其中所示的初始阶段处设置在第一基板11上。可替代地，间隔件50可以设置在第二基板21上，或者可以设置在第一基板11和第二基板21上。
如上所述，包含焊料颗粒31的各向异性导电层ACF可以用于通过结合第一电子部件10和第二电子部件20来形成结合组件，但是也可以使用其他方法。在下文中，将参考图10和图11以及图12和图13基于与前述示例性实施方式的不同来描述根据示例性实施方式的其他方法。
图10是根据示例性实施方式的沿着图2中的线III-III'截取的剖视图，并且图11是示出制造图10中的结合组件的方法的过程剖视图。
参考图10，如图3的示例性实施方式中一样，第一电子部件10和第二电子部件20通过导电结合层30和粘合层40而彼此结合。然而，不同之处在于焊料颗粒不包含在粘合层40中。此外，导电结合层30在第一电极12与第二电极22之间形成为连续的，例如形成为块状。这种结合结构例如可以通过使用图11所示的制造方法来形成。
参考图11，将其中第一电极12以高度h1形成在第一基板11上的第一电子部件10设置在支承板等中。在第一电极12中的每个上形成焊料涂层32。焊料涂层32可以通过使用多种方法来形成，诸如在第一电极12上印刷焊料或者将第一电极12浸入焊料溶液中。
接下来，在第一电子部件10上设置可以由诸如不含焊料颗粒或导电颗粒的树脂的粘合剂形成的非导电层NCF。将其中第二电极22以高度h2形成在第二基板21上的第二电子部件20设置在非导电层NCF上，以使得第二电极22面向非导电层NCF。具有厚度t的间隔件50形成或附接在第二基板21的面向第一电子部件10的表面中。
接下来，当通过按压工具PT对按压区域PA进行按压以被加热时，设置在彼此重叠的第一电极12与第二电极22之间的焊料涂层32被熔化并且随后硬化，以形成结合第一电极12和第二电极22的导电结合层30。形成在每个第一电极12上的焊料涂层32的量可以是分散的，并且在加热和压力施加中，彼此重叠的第一电极12与第二电极22之间的焊料涂层32的全部或几乎全部可以流到第一电极12和第二电极22的外周。在这种情况下，过量的焊料涂层32可能流到这种程度，即，从形成过量焊料涂层32的部分接触与其相邻的电极12和22。根据本发明的示例性实施方式，通过具有厚度t的间隔件50的作用，可在彼此重叠的第一电极12与第二电极22之间形成的间隙可以接收熔化的焊料涂层32中的一些，从而降低短路的风险。
如上所述，例如，间隔件50在初始步骤处设置在第二基板21上。然而，间隔件50可以设置在第一基板11上或者设置在第一基板11和第二基板21上。焊料涂层32可以设置在第二电极22上而不是设置在第一电极12上，或者可以设置在第一电极12和第二电极22两者上。与非导电层NCF的树脂相关的特征可以与前述各向异性导电层ACF中的树脂的特征相同，并且将省略其说明。
图12是根据示例性实施方式的沿着图2中的线III-III'截取的剖视图，并且图13是示出制造图11中的结合组件的方法的过程剖视图。
图12的示例性实施方式与图10的示例性实施方式的不同之处在于，在第一电子部件10与第二电子部件20之间不形成粘合层。两个电子部件10和20的结合可以通过导电结合层30来执行。因此，参考图13，当执行第一电子部件10与第二电子部件20之间的结合时，在它们之间不形成非导电层NCF，并且第二电子部件20直接设置在第一电子部件10上。图13示出焊料涂层32形成在第一电极12和第二电极22两者上，并且间隔件50形成在第一基板11和第二基板21两者上。可替代地，焊料涂层32可以仅仅形成在第一电极12或第二电极22上，并且间隔件50可以仅仅形成在第一基板11或第二基板21上。
图14和图15是分别示出根据示例性实施方式的由图1中的单点链线表示的区域的俯视图。
参考图14，不同于图2的示例性实施方式(其中，间隔件50以距离d2分开设置)，一个间隔件50设置成围绕第一电极12和第二电极22并且与按压区域PA的边缘重叠。这种间隔件设置可以应用于不使用粘合层的情况，例如，如在图12和图13的示例性实施方式中。这是因为，尽管间隔件50完全围绕按压区域PA，但是诸如树脂的粘合剂不需要流到按压区域PA的外部。
参考图15，间隔件50可以以多种尺寸和形状来进行设置。例如，如在此所示的，间隔件50可以设置成如岛状地与按压区域PA的边缘重叠，或者可以设置成跨按压区域PA的两个侧边。间隔件50a可以设置在按压区域PA中彼此相邻的电极12与22之间，并且间隔件50b可以设置成从按压区域PA的边缘到相邻的电极12与22之间。特别是当按压区域PA为广阔区域时，可以使用间隔件50a和50b。
到目前为止，已经描述了其中两个电子部件结合的结合组件以及用于制造结合组件的示例性实施方式。现在将描述作为应用这种结合组件的详细电子装置的示例的显示装置。
图16示意性地示出了根据本发明的示例性实施方式的结合组件。
参考图16，根据本发明的示例性实施方式的显示装置包括显示面板300和与显示面板300连接的柔性印刷电路板100和200。显示面板300可以是有机发光装置面板或液晶面板，但不限于此。
显示面板300包括用于显示图像的显示区域DA和位于显示区域DA外部的非显示区域NA，其中，用于生成和/或发送施加到显示区域DA和/或布线的各种信号的元件和布线设置在非显示区域NA中。在图16中，尽管显示面板300的仅一个侧边缘区域(例如，下部区域)被示出为非显示区域NA，但是显示面板300的其它侧边缘区域(例如，左边缘和右边缘和/或上边缘)可以是非显示区域NA。显示区域DA被显示为四边形，但是它可以是圆形、椭圆形或多边形的。
像素PX例如以矩阵形式设置在显示面板300的显示区域DA中。此外，在显示区域DA中设置有诸如栅极线(未示出)、数据线(未示出)等的信号线。栅极线基本上在第一方向D1(例如，行方向)上延伸，并且数据线基本上在与第一方向D1相交的第二方向D2(例如，列方向)上延伸。每个像素PX可以连接到栅极线和数据线，以从这些线接收栅极信号和数据信号。在有机发光装置的情况下，可以在显示区域DA中设置驱动电压线(未示出)，其中，驱动电压线基本上例如在第二方向D2上延伸，以向像素PX传输驱动电压。
用于从显示面板300的外部接收信号的电极所在的焊盘部分PP1位于显示面板300的非显示区域NA中。柔性印刷电路板200的一端被连接到焊盘部分PP1。柔性印刷电路板200的另一端可以与柔性印刷电路板100的焊盘部分PP2连接，并且柔性印刷电路板100可以与例如外部刚性印刷电路板连接，以用于传送诸如图像数据的信号。
用于产生和/或处理用于驱动显示面板300的各种信号的驱动器可以设置在显示面板300的非显示区域NA、柔性印刷电路板200或外部印刷电路板中。驱动器可以包括用于将数据信号施加到数据线的数据驱动器、用于向栅极线施加栅极信号的栅极驱动器以及用于控制数据驱动器和栅极驱动器的信号控制器。
如在此所示的，数据驱动器可以以集成电路芯片400的形式安装在柔性印刷电路板200中，并且可以以带载封装(TCP)的形式与焊盘部分PP2连接。尽管未示出，但是数据驱动器可以以集成电路芯片的形式安装在显示区域DA与焊盘部分PP1之间的非显示区域NA中。栅极驱动器可以集成在显示面板300的左边缘和/或右边缘的非显示区域(未示出)中，或者可以设置为集成电路芯片。信号控制器可以形成在诸如数据驱动器的集成电路芯片400中，或者可以设置为单独的集成电路芯片。
例如，第一电子部件10和第二电子部件20可以分别对应于上述的显示装置的柔性印刷电路板100和200，并且柔性印刷电路板100和200可以对应于前述结合组件。第一电子部件10和第二电子部件20的各个特征及其结合特征的所有描述可以同样应用于柔性印刷电路板100和200，并且因此将省略其冗余的描述。第一电子部件10和第二电子部件20也可以分别对应于显示面板300和柔性印刷电路板200，或者柔性印刷电路板200和集成电路芯片400。第一电子部件10和第二电子部件20的按压区域PA可以分别对应于焊盘部分PP1和PP2。
虽然本文已描述了某些示例性实施方式和实现方式，但是其他实施方式和修改将根据此描述而显而易见。因此，本发明构思不限于这类实施方式，而是限于所提出的权利要求的更广泛的范围和各种明显的修改和等同布置。

Claims (11)

1.一种结合组件，包括：
第一电子部件，包括第一基板和多个第一电极，其中，多个所述第一电极以距离所述第一基板的表面的第一高度设置在按压区域中；
第二电子部件，包括第二基板和多个第二电极，其中，多个所述第二电极以距离所述第二基板的表面的第二高度设置，所述第二电子部件设置在所述第一电子部件上，使得所述第二电极与对应的第一电极重叠并且面向所述对应的第一电极；
导电结合层，设置在所述第一电极与所述第二电极之间，并且配置为结合所述第一电极和所述第二电极；以及
至少一个间隔件，设置在所述第一基板与所述第二基板之间以与所述按压区域重叠，所述至少一个间隔件具有大于所述第一高度和所述第二高度的总和的厚度，
其中，所述按压区域具有四个侧部，并且所述至少一个间隔件在所述四个侧部的每个侧部处为彼此分离的多个间隔件。
2.如权利要求1所述的结合组件，其中，所述间隔件与所述按压区域的四个边缘重叠。
3.如权利要求1所述的结合组件，其中，所述间隔件与所述按压区域的所述四个侧部重叠。
4.如权利要求1所述的结合组件，其中，相邻的所述间隔件之间的距离大于相邻的所述第一电极或相邻的所述第二电极之间的距离。
5.如权利要求1所述的结合组件，其中，所述至少一个间隔件被附接、印刷或沉积在所述第一基板和所述第二基板中的至少一个上。
6.如权利要求1所述的结合组件，其中，所述间隔件具有200℃或更高的熔点。
7.如权利要求1所述的结合组件，还包括设置在所述第一基板与所述第二基板之间的各向异性导电层，
其中，所述各向异性导电层包含焊料颗粒。
8.如权利要求1所述的结合组件，还包括设置在所述第一基板与所述第二基板之间的非导电层。
9.如权利要求1所述的结合组件，其中，所述至少一个间隔件围绕所述第一电极和所述第二电极。
10.如权利要求1所述的结合组件，还包括设置成在所述按压区域中不与所述按压区域的边缘重叠的至少一个间隔件。
11.如权利要求1所述的结合组件，其中，所述第一电子部件和所述第二电子部件中的至少一个包括柔性印刷电路板。
CN201710716884.4A 2016-08-26 2017-08-21 结合组件 Active CN107785690B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020160109217A KR20180024099A (ko) 2016-08-26 2016-08-26 접합 조립체 및 이를 포함하는 표시 장치
KR10-2016-0109217 2016-08-26

Publications (2)

Publication Number Publication Date
CN107785690A CN107785690A (zh) 2018-03-09
CN107785690B true CN107785690B (zh) 2021-03-09

Family

ID=61244216

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710716884.4A Active CN107785690B (zh) 2016-08-26 2017-08-21 结合组件

Country Status (3)

Country Link
US (1) US10178769B2 (zh)
KR (1) KR20180024099A (zh)
CN (1) CN107785690B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7046351B2 (ja) 2018-01-31 2022-04-04 三国電子有限会社 接続構造体の作製方法
JP7160302B2 (ja) 2018-01-31 2022-10-25 三国電子有限会社 接続構造体および接続構造体の作製方法
JP7185252B2 (ja) 2018-01-31 2022-12-07 三国電子有限会社 接続構造体の作製方法
US11139282B2 (en) * 2018-07-26 2021-10-05 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor package structure and method for manufacturing the same
KR102535108B1 (ko) * 2018-09-03 2023-05-24 한국전자통신연구원 레이저 접합 방법
CN109411376B (zh) * 2018-11-02 2020-11-13 武汉天马微电子有限公司 一种显示面板制造方法和显示面板
CN111385969A (zh) * 2018-12-29 2020-07-07 余姚舜宇智能光学技术有限公司 一种线路板间的压合连接结构、压合连接方法
KR102583826B1 (ko) * 2019-05-24 2023-10-06 한국전자통신연구원 레이저 접합 방법
KR20210005350A (ko) * 2019-07-03 2021-01-14 삼성디스플레이 주식회사 표시 장치 및 표시 장치 제조 방법
KR20210108526A (ko) 2020-02-25 2021-09-03 삼성디스플레이 주식회사 표시 장치
CN112771665B (zh) * 2020-04-16 2024-05-24 华为数字能源技术有限公司 封装结构、电动车辆和电子装置
KR20210152631A (ko) 2020-06-08 2021-12-16 삼성디스플레이 주식회사 인쇄 회로 필름, 표시 장치, 및 인쇄 회로 필름의 제조 방법
GB2601325B (en) * 2020-11-25 2023-12-13 Pragmatic Semiconductor Ltd Support structures for flexible electronic circuits
CN114501792B (zh) * 2021-07-09 2023-07-21 荣耀终端有限公司 一种电路板组件及电子设备
KR20230046708A (ko) * 2021-09-30 2023-04-06 삼성전자주식회사 열경화성 본딩 시트를 포함하는 전자 장치

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100306115B1 (ko) 1998-12-31 2002-03-25 구자홍 회로기판의부품혼재실장공법
JP3696512B2 (ja) * 2001-02-13 2005-09-21 シャープ株式会社 表示素子駆動装置およびそれを用いた表示装置
US7916263B2 (en) * 2004-12-02 2011-03-29 Semiconductor Energy Laboratory Co., Ltd. Display device
KR100650728B1 (ko) 2004-12-24 2006-11-27 주식회사 하이닉스반도체 스택 패키지 및 그 제조방법
JP2010034504A (ja) * 2008-07-02 2010-02-12 Panasonic Corp 基板間の接続方法、フリップチップ実装体及び基板間接続構造
JP5277068B2 (ja) * 2008-07-14 2013-08-28 パナソニック株式会社 基板間の接続方法、フリップチップ実装体及び基板間接続構造
KR101025620B1 (ko) * 2009-07-13 2011-03-30 한국과학기술원 초음파 접합용 이방성 전도성 접착제 및 이를 이용한 전자부품 간 접속방법
TW201117336A (en) * 2009-11-05 2011-05-16 Raydium Semiconductor Corp Electronic chip and substrate providing insulation protection between conducting nodes
WO2013125086A1 (ja) * 2012-02-24 2013-08-29 日立化成株式会社 半導体用接着剤、フラックス剤、半導体装置の製造方法及び半導体装置
JP6365841B2 (ja) * 2012-05-10 2018-08-01 パナソニックＩｐマネジメント株式会社 実装構造体とその製造方法
JP2014103183A (ja) 2012-11-19 2014-06-05 Mitsubishi Electric Corp 電子回路、その製造方法、および電子部品
JP5681327B2 (ja) * 2013-01-17 2015-03-04 積水化学工業株式会社 電子部品用硬化性異方性導電材料、接続構造体及び接続構造体の製造方法
KR20150084329A (ko) 2014-01-13 2015-07-22 엘지전자 주식회사 솔더 페이스트 및 이를 사용한 접합 구조
JP2016224589A (ja) * 2015-05-28 2016-12-28 アルプス電気株式会社 接続装置
US9653425B2 (en) * 2015-08-26 2017-05-16 Apple Inc. Anisotropic conductive film structures

Also Published As

Publication number Publication date
US20180063956A1 (en) 2018-03-01
US10178769B2 (en) 2019-01-08
KR20180024099A (ko) 2018-03-08
CN107785690A (zh) 2018-03-09

Similar Documents

Publication Publication Date Title
CN107785690B (zh) 结合组件
US11049842B2 (en) Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body and anisotropic conductive film
KR101857331B1 (ko) 이방성 도전 필름, 이방성 도전 필름의 제조 방법, 접속체의 제조 방법 및 접속 방법
KR101025620B1 (ko) 초음파 접합용 이방성 전도성 접착제 및 이를 이용한 전자부품 간 접속방법
KR101666214B1 (ko) 이방성 도전 필름, 이의 제조 방법 및 이를 포함하는 표시 장치
US9960138B2 (en) Connection body
US10175544B2 (en) Connection body, method for manufacturing a connection body, connecting method and anisotropic conductive adhesive agent
CN106415937B (zh) 连接体及连接体的制造方法
KR20070119530A (ko) Ｉｃ 칩 실장 패키지, 및 이것을 사용한 화상 표시 장치
WO2014034102A1 (ja) 表示装置及びその製造方法
CN103748977A (zh) 部件安装印刷电路基板及其制造方法
JP7096210B2 (ja) 接続体、接続体の製造方法、電子部品の接続方法、及び電子部品
US9999123B2 (en) Connection structure of circuit member, connection method, and connection material
JP2017175093A (ja) 電子部品、接続体、電子部品の設計方法
JP7369756B2 (ja) 接続体及び接続体の製造方法
JP2009191185A (ja) 導電性接着フィルム、導電性接着フィルムの製造方法、導電性接着フィルムを用いた電子機器、導電性接着フィルムを用いた電子機器の製造方法
KR101025623B1 (ko) 코어쉘 구조의 초음파 접합용 이방성 전도성 접착제 및 이를 이용한 전자부품간 접속방법
JP2008218758A (ja) 電子回路実装構造体
KR100807352B1 (ko) 전극 패드 상에 다수 개의 돌기부들을 구비하는 전극, 이를 구비하는 부품 실장 구조를 갖는 전자기기 및 전자기기의 부품 실장 방법
JP2005259924A (ja) 半導体装置、半導体装置の実装構造およびそれを備える電子機器ならびに表示装置
JP2002244146A (ja) 不透明基板を具えたフラットパネルディスプレイの内部連接方法とそれにより形成される装置
JP7122084B2 (ja) フレキシブル回路基板、接続体、接続体の製造方法、フレキシブル回路基板の設計方法
KR20230134656A (ko) 이방성 도전 필름 및 이를 포함하는 표시 장치
JP2001185581A (ja) 半導体装置の製造方法
KR20110131972A (ko) 전자 부품 조립체 및 그의 형성 방법

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant