CN107766273B

CN107766273B - Method for realizing data interaction between boards by two-line coding and decoding and localbus mutual conversion

Info

Publication number: CN107766273B
Application number: CN201711097690.7A
Authority: CN
Inventors: 蒋连凤
Original assignee: Anhui Wantong Post And Telecommunications Co ltd
Current assignee: Anhui Wantong Post And Telecommunications Co ltd
Priority date: 2017-11-09
Filing date: 2017-11-09
Publication date: 2020-07-31
Anticipated expiration: 2037-11-09
Also published as: CN107766273A

Abstract

The invention provides a method for realizing data interaction between two-line coding and decoding and localbus mutual conversion, which is particularly suitable for mutual conversion between electronic equipment and a localbus bus so as to complete access of a CPU-free single board by a CPU-free single board, and compared with the prior art, the method has the following beneficial effects: compared with the prior art, the efficiency and space of accessing the register by the SMI bus are greatly improved. When the two-wire bus format accesses the address larger than 16-Bit register, the two-wire bus format can not only trigger one-time address writing operation less than SMI bus protocol, but also improve the access efficiency; and the accessible register address space is larger and is not limited by the 16-Bit address space.

Description

Method for realizing data interaction between boards by two-line coding and decoding and localbus mutual conversion

Technical Field

The invention discloses a method for realizing data interaction between boards by mutual conversion of two-line coding and decoding and localbus, relates to the field of cost saving of electronic equipment, and particularly relates to a method for realizing large-amount data interaction between two programmable logic devices of a cross board by only using the two-line coding and decoding and the localbus.

Background

Today, low-end communication equipment is rapidly developed, competition of manufacturers of the communication equipment is more and more intense, under the condition that functions meet requirements, the price is the most intuitive embodiment of the competition, and the market is won by who has the price advantage. So in every process of product design, a cost-saving concept is indispensable.

The traditional method for accessing the local board localbus equipment by the single board in the communication equipment is realized by placing a CPU on the local board, and the CPU directly sends signals such as address, data, chip selection, read-write enable and the like, so that the localbus access can be carried out only by following the bus read-write time sequence of the CPU, the processing is simpler, but the cost of the equipment is increased by placing a CPU. Some interface card local board localbus functions are realized by coding and decoding two to eight lines sent by other single boards (main control) with CPU through a backboard. Under the condition, the single board with the CPU can convert various serial bus protocols into localbus protocols through the programmable logic device, then the single board without the CPU is connected to the single board with the backboard connector, and then the programmable logic device without the single board with the CPU completes the conversion of various serial bus protocols into the localbus protocols. Currently, the commonly used and relatively simple serial bus protocols include SPI, I2C, SMI, and the like. The SPI bus is a 3-wire protocol, and if the number of pins of a connector between two single boards is small, using more pins will increase one more connector device, increasing the equipment cost. The I2C and SMI have advantages in the number of the single slave buses, and are both two-wire serial buses, but the I2C protocol is more complex in coding and decoding and occupies more logic resources. The SMI protocol is simple, the coding and decoding occupy a small number of logic resources, but the defects are that the reading and writing of a register with a 16-bit address can be completed only by operating a bus twice, the access efficiency is low, and the address space of the register can only reach 64K and cannot be expanded continuously.

In summary, the following steps: the problem that the cost of equipment is increased due to the use of a CPU in the prior art is solved, and the problem that the address space of an access register is limited in an SMI bus protocol of a two-wire serial port protocol behind the CPU is eliminated. Therefore, current bus protocols do not enable access to address spaces above 64K.

Disclosure of Invention

Aiming at the defects in the prior art, the invention aims to provide a method for realizing data interaction between boards by mutual conversion between two-line coding and decoding and localbus, so as to solve the problems in the background technology.

In order to achieve the purpose, the invention is realized by the following technical scheme: a method for realizing data interaction between two-line coding and decoding and a localbus bus is an improvement on an SMI bus protocol, and is particularly suitable for the mutual conversion between an electronic device and a localbus bus so as to complete the access of a single board with a CPU to a single board without the CPU.

Further, the number of preambles m and the number of bits n of the register address are variable;

when the number of register address bits n <16, the number of preamble bits m >16 (there is a possibility of all 1's for data of 16-Bit);

when the number of register address bits n > -16, the number of preamble bits m > n +1(1 in 1-Bit turn around write 10 and n-Bit register address make up a possibility of n + 1);

the start code and the operation code, the conversion code and the idle, etc. may be reversed by 0 and 1 in the case where the values of m and n satisfy the above characteristics.

The invention has the beneficial effects that: compared with the existing method for realizing data interaction between boards by mutual conversion between two-line coding and decoding and localbus, the method for realizing data interaction between boards greatly improves the efficiency and space of accessing the register by the SMI bus. When the two-wire bus format accesses the address larger than 16-Bit register, the two-wire bus format can not only trigger one-time address writing operation less than SMI bus protocol, but also improve the access efficiency; and the accessible register address space is larger and is not limited by the 16-Bit address space.

Drawings

Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:

FIG. 1 is a method for converting a single board with a CPU provided by the present invention into a two-wire protocol of the present invention

FIG. 2 is a method for converting two-wire protocol to localbus of the present invention provided with a single board without CPU;

Detailed Description

In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with the specific embodiments.

The invention provides a technical scheme that: a method for realizing data interaction between two-line coding and decoding and a localbus bus is particularly suitable for the data interaction between an electronic device and a localbus bus so as to complete the access of a single board with a CPU to a single board without the CPU.

As an embodiment of the present invention: the invention provides a method for realizing the conversion of localbus to two-wire coding on a programmable logic device with a CPU single board and then realizing the conversion of two-wire decoding to localbus on the programmable logic device without the CPU single board, which is particularly suitable for electronic equipment assembled by a plurality of printed circuit boards, and solves the problems of low SMI access efficiency and limited access space on the basis of an SMI bus, and the technical scheme of the invention is as follows:

the serial data format of the invention is:

the two-line coding of the present invention needs to be in a one-to-one correspondence when in use. The improvements of this two-wire encoding over the SMI bus are: the number of bits n of the register address is variable, and when the required register space in the board is large, the two-line coding can be used for randomly expanding the number of the address bits of the register. When the number n of bits of the register address changes during use, the number m of bits of the preamble also changes accordingly. When the number of register address bits n <16, the number of preamble bits m >16 (there is a possibility of all 1's for data of 16-Bit); when the number of register address bits n > -16, the number of preamble bits m > n +1(1 in 1-Bit turn around Write 10 and n-Bit register address make up n +1 possibilities). The m-Bit lead code and the n-Bit register address must meet the above conditions to correctly find the start code 01, otherwise, the start Bit cannot be judged, and the single board connected with the start Bit cannot complete the two-line decoding process. And for reliability, the number of the lead codes can be increased by 2-Bit on the basis of satisfying the requirement.

As an embodiment of the present invention: specifically, fig. 1 shows a method for implementing conversion from localbus to the two-wire protocol in a programmable logic device on a single board with a CPU in an electronic device.

Firstly, executing 101, and after a system is powered on, assigning initial values to a register and a counter which are used, wherein the initial values are set to be all 0;

then executing 102, assigning a value to an operation code register Reg _ opcode [1:0], setting Reg _ opcode [1:0] to 10 if reading operation is required, and setting Reg _ opcode [1:0] to 01 if writing operation is required; inputting an address register Reg _ addr [ n-1:0] into an address to be accessed; if a write operation is performed, Reg _ wr _ data [15:0] needs to be written to a value.

Then 103, the Reg _ open is read and written into the switch position 1 to trigger one read and write operation.

And executing 104, sending the preamble 1 of the m-Bit, and opening a counter of the m, wherein every time the counter counts 1Bit, a 1 is input to the data line of the two-wire protocol according to the clock edge. 105, when the counter is full, the next step is carried out, and when the counter is not full, the counting and shifting are continued to output one bit.

When the counter of 105 is full, 106 is executed, taking two beats on a common two clock edge, sending out 0 and 1, respectively.

After the start Bit is sent, 107 is executed, the { Reg _ opcode [1:0], Reg _ addr [ n-1:0] } operation code and the address are combined into an n +2-Bit register, an n +2 counter is opened, and each time the counter is shifted, the data is shifted out of 1Bit from the high Bit. When the counter indicated at 108 is full, then the n +2-Bit shift is complete; if not, the counting is continued, and the shifting is continued.

When the counter of 108 is full, the flow simultaneously enters 109 and 112, when the flow enters 109 and the operation code Reg _ opcode [1:0] is judged to be 01, namely writing is carried out, the 2-Bit conversion code 10 is transmitted according to the frame format, after the transmission is finished, the flow enters 110 to carry out parallel-serial operation on Reg _ wr _ data [15:0], and the counter of 16 is opened to start the high-Bit shift output. The counter outputs 1-Bit for each counted Bit. The loop continues when the counter is not full, and ends when the counter is full 115 sending the Idle code and setting Reg _ open to 0.

When the input 112 judges that the operation code Reg _ opcode [1:0] ═ 10, namely reading, the 2-Bit conversion code Z0 is sent according to the frame format, after the sending is completed, the input 113 carries out serial-to-parallel operation on Reg _ rd _ data [15:0], and a counter of 16 is opened to start the input from the low-Bit shift. The counter inputs 1-Bit for each counted Bit. The loop continues when the counter is not full, and ends when the counter is full 115 sending the Idle code and setting Reg _ open to 0.

Finally, 115 may go to 103 to wait for 1 to be set for Reg _ open, waiting for the next read/write operation to be triggered.

As an embodiment of the present invention: fig. 2 shows a method for implementing two-wire protocol to localbus conversion in a programmable logic device on a board without a CPU in an electronic device.

Firstly, executing s101, after the system is powered on, assigning initial values such as full ffff to used registers, and assigning initial values 0 to registers such as counters and operation codes;

then execution proceeds to s102, which takes data from the low of Reg _ start _ datain [ m-1:0] using the edge beat data of the clock in two-line encoding, and sets the start register Reg _ start to 0.

Executing s103, judging whether Reg _ start _ datain [ m-1:0] is only Reg _ start _ datain [0] being 0, if all other bits are 1, indicating that one read-write operation needs to be performed, entering s104, setting Reg _ start to 1, otherwise entering s102 to continue shift input.

When detecting that Reg _ start is 1, s105 is executed to continue shifting the start Bit and opcode of the input 3-Bit, the register address of n-Bit, and open the counter of n + 3. The counter shifts by 1Bit data every time it counts one Bit.

Executing s106, detecting whether the counter is full, if not, continuing to count, and continuing to shift for input; if satisfied, execution s107 assigns the move-in opcode to Reg _ opcode [1:0], and the move-in address to Reg _ addr [ n-1:0 ].

And executing s108 and s112 simultaneously, judging the value of Reg _ opcode [1:0], and preparing to move in the 16-Bit data when judging that Reg _ opcode [1:0] ═ 01, namely writing. Then, s109 is executed to start shift reception and serial data to parallel data to Reg _ datain [15:0], and to open 16 counters, which shift in 1-Bit data serially every time they count one Bit. When the counter of S110 is not full, the counting is continued, when the counter is full, S111 is executed, cs and wr signals of localbus are set to 0, the received data is written into the corresponding register address, S115 is executed, each bit of Reg _ start _ data [ m:0] in S102 is set to 1, and the next read-write operation is waited.

S112 is executed, and when Reg _ opcode [1:0] is determined to be 10, i.e., read, cs and rd are set to 0, and the 16-Bit data of the corresponding address register is fetched into the shift register Reg _ dataout [15:0 ]. Then s113 is executed to parallel-serial output Reg _ dataout [15:0] from the high Bit and open the counter of 16, which shifts out the 1-Bit data serially every time it counts one Bit. When the counter of S114 is not full, the counting is continued, when the counter is full, the execution of S115 is finished, and each bit of Reg _ start _ data [ m:0] in S102 is set to 1, and the next read-write operation is waited.

While there have been shown and described what are at present considered the fundamental principles and essential features of the invention and its advantages, it will be apparent to those skilled in the art that the invention is not limited to the details of the foregoing exemplary embodiments, but is capable of other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. A method for realizing data interaction between boards by mutual conversion of two-line coding and decoding and localbus is characterized in that: the method is suitable for mutual conversion between the electronic equipment and a localbus bus so as to complete access of a single board with a CPU to a single board without the CPU;

the number of the lead codes m and the bit number n of the register address are variable;

when the number n of register address bits is less than 16, all 1's of the data of lead code Bit number m >16, 16-Bit exist;

when the number of register address bits n > =16, leading code Bit number m > n +1, 1 in turn around Write =10 of 1-Bit and the register address of n-Bit constitute the possibility of n + 1;

the start code and the operation code, the conversion code and the idle are inverted by 0 and 1 in the case where the m and n values satisfy the above characteristics.