CN109582623B - Expansion board circuit capable of realizing cascade connection of multiple expansion boards of different types - Google Patents
Expansion board circuit capable of realizing cascade connection of multiple expansion boards of different types Download PDFInfo
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- CN109582623B CN109582623B CN201811389535.7A CN201811389535A CN109582623B CN 109582623 B CN109582623 B CN 109582623B CN 201811389535 A CN201811389535 A CN 201811389535A CN 109582623 B CN109582623 B CN 109582623B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
Abstract
The invention relates to an expansion board circuit capable of realizing cascade connection of a plurality of expansion boards of different types, which comprises a plurality of expansion boards which are cascaded in series, wherein an input slot of a first expansion board is connected with an expansion board slot reserved by a terminal, an input slot of a next expansion board is connected with an output slot of a previous expansion board, and the like; the extension board includes: the expansion board address coding and decoding circuit is responsible for coding and decoding the board address of the expansion board; the functional logic circuit realizes the logic function of the expansion board; the board type coding circuit is used for partitioning different expansion boards; an input slot; an output slot; IIC extends GPIO chip. The invention can save a lot of hardware resources; active devices do not need to be added to each expansion board, and software development cost is reduced; the number and the types of the expansion boards can be detected on line, so that the expansion can be performed at will without informing the number and the types of the software plug-in expansion boards in advance; when a plurality of expansion boards of the same type are expanded, the expansion boards can be automatically distinguished without adding hardware for distinguishing.
Description
Technical Field
The invention relates to the technical field of expansion board circuit design, in particular to an expansion board circuit capable of realizing cascade connection of a plurality of different types of expansion boards.
Background
For the design of a common expansion board, different design ideas are adopted according to different cascading modes. In the parallel mode, a certain number of expansion board slots are reserved, each slot needs at least one GPIO as a board selection function, the number of expansion boards is limited by the number of reserved slots, generally, the function of the corresponding expansion board on each slot is unique, and the function cannot be expanded randomly, and furthermore, as the number of expansion boards increases, the CPU hardware resources occupied by the expansion board interfaces are more and more. In the serial mode, an active device such as an MCU/FPGA is usually added on each expansion board, all the expansion boards are cascaded in a manner similar to an RS485 bus, different types of expansion boards need to develop different application programs, and the software and hardware costs are increased. In addition, when two or more expansion boards of the same type are hooked, because the software and hardware of the expansion boards are completely consistent, in order to distinguish the expansion boards, a manual coding circuit is required to be added, manual coding is carried out according to the number of the expansion boards connected into the same type, otherwise, the expansion boards of the same type generate address conflict, the workload is increased, and the risk of address conflict problem caused by consistent coding is increased.
Disclosure of Invention
The invention aims to provide an expansion board circuit which can realize cascade connection of a plurality of expansion boards of different types and aims to solve the problems that the expansion quantity is limited in a parallel mode and the occupation of hardware resources is large when a common expansion board is designed, the cost of software and hardware is high in a serial mode, manual coding needs to be added to a plurality of expansion boards of the same type, and programs need to be written additionally on each expansion board.
In order to achieve the purpose, the invention adopts the following technical scheme: an expansion board circuit capable of realizing cascade connection of a plurality of expansion boards of different types comprises a plurality of expansion boards which are cascaded in series, wherein an input slot of a first expansion board is connected with an expansion board slot reserved in a terminal, an input slot of a next expansion board is connected with an output slot of a previous expansion board, and the like; the extension board includes:
the expansion board address coding and decoding circuit is responsible for coding and decoding the board address of the expansion board, when the expansion board is inserted, the circuit automatically sets a board address for the expansion board, decodes an address line sent by a terminal CPU and compares the address line with the board address to enable a buffer of the board type coding circuit;
the functional logic circuit is used for realizing the logic function of the expansion board and realizing different logic functions according to different types of the expansion board;
and the board type coding circuit is used for partitioning different expansion boards, and the terminal implements corresponding operation control on the expansion boards according to the types of the expansion boards.
An input slot connected to an output slot of a previous expansion board or an expansion board slot of a terminal, and receiving a CPU _ FUN [0: N1] signal, an IIC bus signal, an SPI bus signal, address lines CPU _ A [0: N ] and board address lines XA [0: N ];
an output slot connected with the input slot of the next expansion board for transmitting the CPU _ FUN [0: N1] signal, IIC bus signal, SPI bus signal, address line CPU _ A [0: N ] and board address line XA [0: N ] to the next expansion board;
the IIC extended GPIO chips judge the number of external extended boards of the terminal by scanning the number of devices of the IIC extended GPIO chips of the type mounted on the IIC bus; and on the other hand, the extended GPIO of the chip and the SPI bus are used together to realize a functional circuit of the expansion board.
An IIC bus signal from a CPU on the terminal is connected to an IIC extended GPIO chip of an extension board through an input slot and is connected to an IIC extended GPIO chip of the next extension board through an output slot, and the number of the extension boards is calculated by scanning the address of the IIC extended GPIO chip mounted on an IIC bus through the CPU.
The board address from the last expansion board is added by an adder to be used as the board address of the expansion board, on one hand, the board address of the expansion board controls the device address of the IIC expansion GPIO chip, namely the coding of the IIC expansion GPIO chip device address through a multiplexer of an expansion board address coding and decoding circuit, on the other hand, the board address of the expansion board is compared with the address line from the CPU, and when the board address of the expansion board is the same, an expansion board type buffer of a board type coding circuit is enabled, namely the board type of the expansion board is read.
According to the technical scheme, the beneficial effects of the invention are as follows: the invention can save a lot of hardware resources; active devices do not need to be added to each expansion board, and software development cost is reduced; the number and the types of the expansion boards can be detected on line, so that the expansion can be performed at will without informing the number and the types of the software plug-in expansion boards in advance; when a plurality of expansion boards of the same type are expanded, the expansion boards can be automatically distinguished without adding hardware for distinguishing.
Drawings
FIG. 1 is a block diagram of an expansion board according to the present invention;
fig. 2 is a schematic diagram of a cascade of a plurality of expansion boards.
Detailed Description
As shown in fig. 1 and 2, an expansion board circuit capable of implementing cascade connection of a plurality of expansion boards of different types includes a plurality of expansion boards cascaded in series, an input slot of a first expansion board is connected with an expansion board slot reserved in a terminal, an input slot of a next expansion board is connected with an output slot of a previous expansion board, and so on; the extension board includes:
the expansion board address coding and decoding circuit is responsible for coding and decoding the board address of the expansion board, when the expansion board is inserted, the circuit automatically sets a board address for the expansion board, decodes an address line sent by a terminal CPU and compares the address line with the board address to enable a buffer of the board type coding circuit;
the functional logic circuit is used for realizing the logic function of the expansion board and realizing different logic functions according to different types of the expansion board;
and the board type coding circuit is used for partitioning different expansion boards, and the terminal implements corresponding operation control on the expansion boards according to the types of the expansion boards.
An input slot connected to an output slot of a previous expansion board or an expansion board slot of a terminal, and receiving a CPU _ FUN [0: N1] signal, an IIC bus signal, an SPI bus signal, address lines CPU _ A [0: N ] and board address lines XA [0: N ];
an output slot connected with the input slot of the next expansion board for transmitting the CPU _ FUN [0: N1] signal, IIC bus signal, SPI bus signal, address line CPU _ A [0: N ] and board address line XA [0: N ] to the next expansion board;
the IIC extended GPIO chips judge the number of external extended boards of the terminal by scanning the number of devices of the IIC extended GPIO chips of the type mounted on the IIC bus; and on the other hand, the extended GPIO of the chip and the SPI bus are used together to realize a functional circuit of the expansion board.
As shown in fig. 1 and 2, an IIC bus signal from a CPU on a terminal is connected to an IIC extended GPIO chip of an expansion board through an input slot and is connected to an IIC extended GPIO chip of a next expansion board through an output slot, and the CPU calculates the number of expansion boards by scanning the address of the IIC extended GPIO chip mounted on the IIC bus, i.e., how many expansion boards are mounted.
As shown in the figures 1 and 2, the board address A [0: N ] from the previous expansion board is added by an adder to be used as the board address of the expansion board, on one hand, the board address of the expansion board controls the device address of the IIC extended GPIO chip, namely the coding of the IIC extended GPIO chip device address through a multi-path selection circuit, on the other hand, the board address is compared with the address line CPU _ A [0: N ] from the CPU, and when the board addresses are the same, the expansion board type buffer is enabled, namely the board type of the expansion board is read.
In the embodiment of the invention, firstly, an IIC extended GPIO chip with various address codes capable of meeting the requirement of expanding the number is selected, for example, when a design capable of expanding 64 expansion boards at maximum is set, an IIC extended GPIO chip with 64 address codes is selected. Plate address line A [0: N]、XA[0:N]And CPU _ A [0: N]Should also be set to A [0:5] respectively]、XA[0:5]And CPU _ A [0:5]](2664) can satisfy 64 kinds of codes, and 64 expansion boards are taken as examples in the following.
1: when the expansion board is connected, the adder composed of logic devices automatically adds 1 to A [0:5] and then turns it into XA [0:5] which is sent to the output terminal and multiplexer, the output terminal connects the group of data output to the next expansion board as its A [0:5] signal; and an XA [0:5] entering the multiplexer, and recoding an address line of the IIC extended GPIO through the multiplexer so that the device addresses of the IIC extended GPIO chips on each accessed extension board are different. When the terminal works, all the device address codes of the IIC extended GPIO chip are scanned in sequence, and the corresponding board address XA [0:5] of the access expansion board and the number of the access expansion boards are obtained according to the scanned slave device address of the IIC device.
2: according to XA [0:5] scanned to access expansion board]CPU _ A [0:5]]Arranged in turn with XA [0:5] of each expansion board read]In agreement, the comparator on the corresponding expansion board will enable the buffer at this time, so that the board type code on the expansion board will be sent to the read board type signal line CPU _ FUN [0: N1 of CPU through the buffer]In the above, the reading of the expansion board type is completed. CPU _ FUN [0: N1]Width is set according to the type of expansion board, e.g., CPU _ FUN [0: 3)]Can be combined into 2416 types of expansion boards.
3: the IIC bus controls GPIO on an IIC extension GPIO chip on an extension board of the IIC bus to be matched with the SPI bus to realize various functional circuits. When the serial port is expanded, the SPI and the SPI expand UART chip carry out data exchange, and the IO port of the IIC expand GPIO is used as control signals of chip selection, interruption, reset and the like of the SPI expand UART chip.
The invention designs an interface capable of expanding 64 16 expansion boards, the occupied CPU hardware resources are only one path IIC, one path SPI and 10 GPIOs, wherein 6 GPIOs are used as CPU _ A [0:5], the remaining 4 GPIOs are used as CPU _ FUN [0:3], and the GPIOs do not need to be matched with a GPIO as a board selection signal for each expansion board in a parallel mode, thereby wasting the GPIO resources of the CPU; and the programming of active devices of each expansion board in a traditional serial mode is not needed, and the programming of daughter boards of different types of expansion boards is added.
The invention can realize the cascade connection of a plurality of expansion boards, for example, a plurality of multi-channel signal input expansion boards, multi-channel signal output expansion boards, Ethernet expansion boards, RS232/R485 expansion boards, analog input expansion boards and other types of expansion boards are accessed; the cascade mode of the invention adopts a series mode, namely only one card slot of the expansion board of the product is needed, and a considerable number of card slots are reserved unlike the parallel cascade mode.
The invention adopts the automatic coding technology of the expansion boards, and under the condition of a plurality of expansion boards of the same type, board numbers which need to be manually set do not need to be added on the expansion boards of the same type for distinguishing, such as a dial switch, a jumper wire cap and the like; the address of the board can be automatically distributed after the expansion board is accessed, the type of the expansion board and the corresponding expansion board operated can be obtained according to the address of the expansion board, and the occupied hardware resource cannot increase along with the increase of the number of the expansion boards.
Claims (2)
1. The utility model provides an extension board circuit that can realize that polylith different grade type extension board cascades which characterized in that: the system comprises a plurality of expansion boards which are cascaded in series, wherein an input slot of a first expansion board is connected with an expansion board slot reserved in a terminal, an input slot of a next expansion board is connected with an output slot of a previous expansion board, and the like; the extension board includes:
the expansion board address coding and decoding circuit is responsible for coding and decoding the board address of the expansion board, when the expansion board is inserted, the circuit automatically sets a board address for the expansion board, decodes an address line sent by a terminal CPU and compares the address line with the board address to enable a buffer of the board type coding circuit; the board address from the last expansion board is added by an adder to be used as the board address of the expansion board, on one hand, the board address of the expansion board controls the device address of the IIC expansion GPIO chip, namely the coding of the IIC expansion GPIO chip device address through a multiplexer of an expansion board address coding and decoding circuit, on the other hand, the board address is compared with an address line from a CPU, and when the board address is the same as the address line from the CPU, an expansion board type buffer of a board type coding circuit is enabled, namely the board type of the expansion board is read;
the functional logic circuit is used for realizing the logic function of the expansion board and realizing different logic functions according to different types of the expansion board;
the board type coding circuit is used for partitioning different expansion boards, and the terminal implements corresponding operation control on the expansion boards according to the types of the expansion boards
An input slot connected to an output slot of a previous expansion board or an expansion board slot of a terminal, and receiving a CPU _ FUN [0: N1] signal, an IIC bus signal, an SPI bus signal, address lines CPU _ A [0: N ] and board address lines XA [0: N ];
an output slot connected with the input slot of the next expansion board for transmitting the CPU _ FUN [0: N1] signal, IIC bus signal, SPI bus signal, address line CPU _ A [0: N ] and board address line XA [0: N ] to the next expansion board;
the IIC extended GPIO chips judge the number of external extended boards of the terminal by scanning the number of devices of the IIC extended GPIO chips of the type mounted on the IIC bus; and on the other hand, the extended GPIO of the chip and the SPI bus are used together to realize a functional circuit of the expansion board.
2. An expansion board circuit capable of realizing cascade connection of a plurality of different types of expansion boards according to claim 1, wherein: an IIC bus signal from a CPU on the terminal is connected to an IIC extended GPIO chip of an extension board through an input slot and is connected to an IIC extended GPIO chip of the next extension board through an output slot, and the number of the extension boards is calculated by scanning the address of the IIC extended GPIO chip mounted on an IIC bus through the CPU.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811389535.7A CN109582623B (en) | 2018-11-21 | 2018-11-21 | Expansion board circuit capable of realizing cascade connection of multiple expansion boards of different types |
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| CN201811389535.7A CN109582623B (en) | 2018-11-21 | 2018-11-21 | Expansion board circuit capable of realizing cascade connection of multiple expansion boards of different types |
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| CN109582623B true CN109582623B (en) | 2022-02-18 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112051758B (en) * | 2019-06-06 | 2023-12-15 | 广东省大金创新电子有限公司 | IO expansion chip |
| CN110868289A (en) * | 2019-11-13 | 2020-03-06 | 深圳前海智安信息科技有限公司 | Cipher machine system capable of expanding distributed computation and control response method thereof |
| CN110806719B (en) * | 2019-12-04 | 2021-08-27 | 深圳市英威腾电气股份有限公司 | PLC system and control method thereof |
| CN114333281B (en) * | 2022-01-05 | 2023-04-25 | 北京广利核系统工程有限公司 | Signal transmission link of analog control signal |
| CN116541335B (en) * | 2023-07-05 | 2023-09-19 | 安擎计算机信息股份有限公司 | Method for distributing serial addresses and electronic equipment |
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| EP2006776A1 (en) * | 2007-06-13 | 2008-12-24 | Sunix Co., Ltd. | Modularized channel technology with expansion of different IO output interfaces |
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