CN107766273A - Two line encoding and decoding and localbus mutually turn to realize the method for data interaction between plate - Google Patents
Two line encoding and decoding and localbus mutually turn to realize the method for data interaction between plate Download PDFInfo
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- CN107766273A CN107766273A CN201711097690.7A CN201711097690A CN107766273A CN 107766273 A CN107766273 A CN 107766273A CN 201711097690 A CN201711097690 A CN 201711097690A CN 107766273 A CN107766273 A CN 107766273A
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- Prior art keywords
- localbus
- bit
- cpu
- turn
- present
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
Abstract
The present invention provides a kind of two lines encoding and decoding and localbus and mutually turned to realize the method for data interaction between plate, it is particularly adapted to the mutual of localbus buses turn in electronic equipment, to complete CPU veneers to the access without CPU veneers, compared with prior art, the present invention has following beneficial effect：Very big improvement is obtained for compared to the efficiency of more existing SMI bus access register and space.The two-wire bus form of the present invention can not only accomplish when accessing and being more than 16 Bit register address it is fewer than SMI bus protocols trigger write address and operate, improve access efficiency；And the register address space that can be accessed is bigger, without being limited by 16 Bit address spaces.
Description
Technical field
The present invention is that a kind of two lines encoding and decoding and localbus mutually turn, to realize the method for data interaction between plate, to be related to electronics
The field of equipment cost saving, more specifically, be it is a kind of between two PLDs of straddle only use two lines
Encoding and decoding mutually transfer the method for realizing that mass data interacts with localbus.
Background technology
In today that low side communication equipment develops rapidly, each communications equipment manufacturer competition is more and more fierce, in function all
Meet in the case of requiring, it is exactly price that competition, which most intuitively embodies, and who occupies price advantage, and who has just won market.So
During each of product design, cost-effective theory is essential.
The more traditional method of access of the veneer to this plate localbus equipment is exactly to be put in this plate in communication apparatus at present
A piece of CPU is put to realize, CPU has directly sent out address, data, piece choosing, reads and writes enabled grade for signal, so carrying out localbus visits
As long as following CPU bus read-write sequence when asking, deal with fairly simple, but equipment can be increased by placing a piece of CPU
Cost.Some interface card this plate localbus functions are that other are brought with CPU veneers (master control) by backboard with this equipment
Two to eight lines carry out encoding and decoding realizations.In this case can be completed with CPU veneers by PLD
Localbus turns various serial bus protocols, then by back panel connector to without CPU veneers, then by without CPU veneers
PLD completes various serial bus protocols and turns localbus agreements.Conventional and fairly simple universal serial bus at present
Agreement has SPI, I2C, SMI etc..Spi bus is 3 wire protocols, if the pin number of connector is fewer between two veneers,
One connector apparatus of more increases can be caused using a pin more, increase equipment cost.Singly from I2C and SMI in bus number
It can take advantage, all be two line serial bus, but the decoding of I2C protocol codes is more complicated, the logical resource of occupancy is also more.
SMI agreements are then fairly simple, and the logical resource that encoding and decoding take is few but shortcoming is that the register for reading and writing a 16bit address needs
Operating two secondary bus could be into completion, and access efficiency is relatively low, and register address space can only achieve 64K, it is impossible to continues
Extension.
In summary：The problem of causing equipment cost increase using CPU there is one side in the prior art, on the one hand
It is to remove in the representative SMI bus protocols of two line serial port protocols to exist after CPU to access the problem of register address space is limited.Cause
This, just current bus protocol can not realize the access of more than 64K address spaces.
The content of the invention
In view of the deficienciess of the prior art, mutually turn with localbus it is an object of the present invention to provide a kind of two line encoding and decoding with
The method for realizing data interaction between plate, to solve the problems mentioned in the above background technology.
To achieve these goals, the present invention is to realize by the following technical solutions：A kind of two line encoding and decoding with
Localbus mutually turns to realize the method for data interaction between plate, the i.e. improvement to SMI bus protocols, especially suitable for electronic equipment
In with localbus buses mutually turn, to complete CPU veneers to the access without CPU veneers.
Further, the digit n of lead code m number and register address is variable；
As register address digit n<When 16, leading code bit number m>16 (complete 1 possibility being present in 16-Bit data)；
As register address digit n>When=16, leading code bit number m>N+1 (1-Bit turn aroundWrite=10
In 1 with the possibility of n-Bit register address composition n+1 1)；
0 and 1 can be carried out to initial code and command code, hand over word and idle etc. in the case where m and n values meet features above
Upset.
Beneficial effects of the present invention：The line encoding and decoding of one kind two of the present invention and localbus mutually turn to realize data friendship between plate
Mutual method, very big improvement is obtained for compared to the efficiency of more existing SMI bus access register and space.The two of the present invention
Line bus format can not only accomplish that trigger fewer than SMI bus protocols once writes ground when accessing and being more than 16-Bit register address
Location operates, and improves access efficiency；And the register address space that can be accessed is bigger, without being limited by 16-Bit address spaces
System.
Brief description of the drawings
The detailed description made by reading with reference to the following drawings to non-limiting example, further feature of the invention,
Objects and advantages will become more apparent upon：
Fig. 1 is the method that band CPU veneers localbus provided by the invention turns two wire protocols of the invention
Fig. 2 is the method provided by the invention for turning localbus without CPU veneers two wire protocols of the invention；
Embodiment
To be easy to understand the technical means, the inventive features, the objects and the advantages of the present invention, with reference to
Embodiment, the present invention is expanded on further.
The present invention provides a kind of technical scheme：A kind of two line encoding and decoding and localbus mutually turn to realize data interaction between plate
Method, be particularly adapted in electronic equipment with localbus buses mutually turn, to have completed CPU veneers to without CPU veneers
Access.
As one embodiment of the present of invention：The present invention provides a kind of on the PLD for carrying CPU veneers
Realize that localbus turns two-line coding, then realize that the decoding of two lines turns on the PLD without CPU veneers
Localbus method, this method is especially suitable in the electronic equipment assembled by polylith printed circuit board, and the present invention is
The problem of SMI access efficiencies are low and addressing space is limited is improved on the basis of SMI buses, technical scheme is such as
Under：
The present invention serial data format be：
The two-line coding of the present invention needs to be one-to-one relation when in use.This two-line coding is relative to SMI buses
Improved place exists：The digit n of register address is variable, and this can be used when the register space needed in plate is larger
Two-line coding arbitrary extension register address digit.When in use when the digit n changes of register address, the digit of lead code
M also wants respective change.As register address digit n<When 16, leading code bit number m>16 (16-Bit data exist complete 1 can
Can)；As register address digit n>When=16, leading code bit number m>N+1 is (in 1-Bit turn around Write=10
1 and n-Bit register address composition n+1 individual 1 possibility).M-Bit lead codes and n-Bit register address have to meet
Conditions above could correctly find initial code 01, otherwise cannot judge start bit, and the veneer being mated with cannot just complete two
Line decoding process.And for reliability, the number of lead code is met can again to add a 2-Bit on the basis of demand above
It is best.
As one embodiment of the present of invention：Specifically, Fig. 1 be in the electronic device a certain piece with CPU veneers can
Realize that localbus turns the method for two wire protocols of the invention in programmed logic device.
It is first carried out 101, after system electrification, assigns initial value to the register and counter used, initial value is arranged to
Full 0；
Then 102 are performed, to operation register Reg_opcode [1:0] assignment, the Reg_ if read operation to be carried out
opcode[1:0] 10 are put, the Reg_opcode [1 if write operation to be carried out:0] 1 is set to 0；Address register Reg_addr [n-
1:0] address to be accessed is inputted；If write operation is carried out, it is necessary to Reg_wr_data [15:0] write-in value.
Then 103 are performed, Reg_open is read and write the position of the switch 1, triggers a read-write operation.
104 are performed, sends m-Bit lead code 1, and opens m counter, counter often counts 1, the number of two wire protocols
According to inputting one 1 on line outward according to clock edge.When 105 counter is full, then carry out in next step, when counter is discontented then after
It is continuous to count one bit of displacement output.
When 105 counter is full, then 106 are performed, one, which shares two clock edges, plays two bats, sends out 0 and 1 respectively.
After start bit transmission terminates, 107 are performed, { Reg_opcode [1:0],Reg_addr[n-1:0] } command code and
Address combination and opens n+2 counter, often meter displacement, data is removed from a high position to n+2-Bit register
1bit.When the counter of 108 instructions is full, then n+2-Bit displacements are completed；If less than also continuing to count, continue to shift.
When 108 counter is full, flow judges command code Reg_opcode simultaneously into 109 and 112 when entering 109
[1:0]==01 when, as write, according to frame format send 2-Bit hand over word 10, after being sent completely, into 110 Reg_
wr_data[15:0] carry out and turn string operation, and open 16 counter, start to export from high bit shift.Counter often counts one
Position output 1-Bit.Continue cycling through when counter is discontented with, when counter is full, then terminate, Idle codes, and handle are sent into 115
Reg_open is set to 0.
Judge command code Reg_opcode [1 when entering 112:0]==10 when, as read, according to frame format send 2-Bit
Hand over word Z0, after being sent completely, into 113 Reg_rd_data [15:0] carry out string to turn and operate, and open 16 counting
Device, start to shift input from low level.Counter often counts an input 1-Bit.Continued cycling through when counter is discontented with, work as counter
Man Shi, then terminate, send Idle codes into 115, and Reg_open is set to 0
Finally from 115 can go to 103 wait Reg_open put 1, wait read-write operation next time to be triggered.
As one embodiment of the present of invention：Fig. 2 be in the electronic device a certain piece patrolled without programmable on CPU veneers
Collect and realize that two wire protocols of the invention turn localbus method in device.
It is first carried out s101, after system electrification, full ffff of initial value etc., counter, command code is assigned to the register used
Initial value 0 is assigned Deng register；
Then s102 is performed, data are beaten using the edge of clock in two-line coding, data from Reg_start_datain
[m-1:0] low level is moved into, and originating register Reg_start is set to 0
S103 is performed, judges Reg_start_datain [m-1:0] whether there was only Reg_start_datain [0]=0, its
When his position is all 1, illustrate that once read-write operation will be carried out, then enter s104, Reg_start is put 1, otherwise into s102
Continue displacement input.
When detecting Reg_start==1, s105 is performed, continues displacement input 3-Bit start bit and command code, n-
Bit register address, and open n+3 counter.Counter often counts one, then shifts 1Bit data.
S106 is performed, it is full whether detection counter is counted, and then continues to count if no, continues displacement input；Meter is full then to be performed
Immigration command code is assigned to Reg_opcode [1 by s107:0], move into address assignment and give Reg_addr [n-1:0].
S108 and s112 are performed simultaneously, judges Reg_opcode [1:0] value, when judging Reg_opcode [1:0]==
When 01, as write, prepare to move into 16-Bit data.Then s109 is performed, starts displacement and receives and carry out serial data turn parallel
Data are to Reg_datain [15:0], and 16 counter is opened, counter often counts one, then serially moves into 1-Bit data.When
S110 counter less than when, continue to count, when counter is full, then performs S111, localbus cs and wr signals are put
0, the data received are write corresponding register address, then performs S115 and terminates, and the Reg_start_ in s102
datain[m:0] each bit puts the read-write operation of 1. waits next time.
S112 is performed, judges Reg_opcode [1:0]==10 when, as read, cs and rd set to 0, appropriate address is posted
The 16-Bit data of storage get shift register Reg_dataout [15:0].Then s113 is performed, Reg_dataout
[15:0] carry out and turn string to export from high bit shift, and open 16 counter, counter often counts one, then serially removes 1-
Bit data.When S114 counter less than when, continue to count, when counter is full, then performs S115 and terminate, and in s102
Reg_start_datain [m:0] each bit puts the read-write operation of 1. waits next time.
The general principle and principal character and advantages of the present invention of the present invention has been shown and described above, for this area skill
For art personnel, it is clear that the invention is not restricted to the details of above-mentioned one exemplary embodiment, and without departing substantially from the present invention spirit or
In the case of essential characteristic, the present invention can be realized in other specific forms.Which point therefore, no matter from the point of view of, all should incite somebody to action
Embodiment regards exemplary as, and be it is nonrestrictive, the scope of the present invention by appended claims rather than on state
Bright restriction, it is intended that all changes fallen in the implication and scope of the equivalency of claim are included in the present invention
It is interior.
Moreover, it will be appreciated that although the present specification is described in terms of embodiments, not each embodiment is only wrapped
Containing an independent technical scheme, this narrating mode of specification is only that those skilled in the art should for clarity
Using specification as an entirety, the technical solutions in the various embodiments may also be suitably combined, forms those skilled in the art
It is appreciated that other embodiment.
Claims (2)
1. a kind of two lines encoding and decoding and localbus mutually turn to realize the method for data interaction between plate, it is characterised in that：It is especially suitable
It should turn in electronic equipment with the mutual of localbus buses, to complete CPU veneers to the access without CPU veneers.
2. a kind of two lines encoding and decoding according to claim 1 and localbus mutually turn to realize the side of data interaction between plate
Method, it is characterised in that：Lead code m number and the digit n of register address are variable；
As register address digit n<When 16, leading code bit number m>16 (complete 1 possibility being present in 16-Bit data)；
As register address digit n>When=16, leading code bit number m>N+1 is (in 1-Bit turn around Write=10
1 and n-Bit register address composition n+1 individual 1 possibility)；
Initial code and command code, the progress such as hand over word and idle 0 and 1 are turned in the case where m and n values meet features above
Turn.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711097690.7A CN107766273B (en) | 2017-11-09 | 2017-11-09 | Method for realizing data interaction between boards by two-line coding and decoding and localbus mutual conversion |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711097690.7A CN107766273B (en) | 2017-11-09 | 2017-11-09 | Method for realizing data interaction between boards by two-line coding and decoding and localbus mutual conversion |
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| Publication Number | Publication Date |
|---|---|
| CN107766273A true CN107766273A (en) | 2018-03-06 |
| CN107766273B CN107766273B (en) | 2020-07-31 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201711097690.7A Active CN107766273B (en) | 2017-11-09 | 2017-11-09 | Method for realizing data interaction between boards by two-line coding and decoding and localbus mutual conversion |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112540944A (en) * | 2020-12-15 | 2021-03-23 | 安徽皖通邮电股份有限公司 | Parallel bus protocol and method for realizing data interaction between boards based on protocol |
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| CN1848103A (en) * | 2005-04-12 | 2006-10-18 | 华为技术有限公司 | Method and system for realizing central control of central control unit to single board |
| CN102346501A (en) * | 2010-07-30 | 2012-02-08 | 中兴通讯股份有限公司 | Equipment with unified machine frame management framework and management control method thereof |
| US20140164647A1 (en) * | 2012-12-07 | 2014-06-12 | Broadcom Corporation | Management Data Input/Output (MDIO) Protocol Including Checksum Mode |
| CN106445846A (en) * | 2015-08-11 | 2017-02-22 | 中兴通讯股份有限公司 | System and method for realizing reading and writing of single-board information |
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2017
- 2017-11-09 CN CN201711097690.7A patent/CN107766273B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1848103A (en) * | 2005-04-12 | 2006-10-18 | 华为技术有限公司 | Method and system for realizing central control of central control unit to single board |
| CN102346501A (en) * | 2010-07-30 | 2012-02-08 | 中兴通讯股份有限公司 | Equipment with unified machine frame management framework and management control method thereof |
| US20140164647A1 (en) * | 2012-12-07 | 2014-06-12 | Broadcom Corporation | Management Data Input/Output (MDIO) Protocol Including Checksum Mode |
| CN106445846A (en) * | 2015-08-11 | 2017-02-22 | 中兴通讯股份有限公司 | System and method for realizing reading and writing of single-board information |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112540944A (en) * | 2020-12-15 | 2021-03-23 | 安徽皖通邮电股份有限公司 | Parallel bus protocol and method for realizing data interaction between boards based on protocol |
| CN112540944B (en) * | 2020-12-15 | 2022-11-25 | 安徽皖通邮电股份有限公司 | Parallel bus protocol and method for realizing data interaction between boards based on protocol |
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| CN107766273B (en) | 2020-07-31 |
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