CN107527886B - 用于稳定的电连接的集成电路及其制造方法 - Google Patents
用于稳定的电连接的集成电路及其制造方法 Download PDFInfo
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- CN107527886B CN107527886B CN201710446523.2A CN201710446523A CN107527886B CN 107527886 B CN107527886 B CN 107527886B CN 201710446523 A CN201710446523 A CN 201710446523A CN 107527886 B CN107527886 B CN 107527886B
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Abstract
公开了集成电路及其制造方法,该集成电路包括基底、焊盘电极和钝化层,其中,焊盘电极设置在基底上,钝化层设置在焊盘电极上并且包括有机绝缘材料。集成电路还包括凸块电极,该凸块电极设置在钝化层上并且通过接触孔连接到焊盘电极。钝化层包括绝缘部和凸块部,其中,绝缘部具有第一厚度并且覆盖焊盘电极的相邻边缘区域和基底的至少一部分,凸块部具有大于第一厚度的第二厚度并且覆盖焊盘电极的中心部分。
Description
相关申请的交叉引用
本申请要求于2016年6月15日在韩国知识产权局提交的第10-2016-0074441号韩国专利申请的优先权,该韩国专利申请的公开内容通过引用以其整体并入本文中。
技术领域
本发明构思的一个或多个示例性实施方式涉及集成电路,并且更具体地,涉及用于稳定的电连接的集成电路及其制造方法。
背景技术
显示装置可以包括基底、多个信号线以及设置在基底上与显示区域相邻的薄膜晶体管。此外,用于生成用来驱动显示装置的各种信号的集成电路(IC)可以设置在基底的区域中。显示装置的焊盘部电连接到设置在基底上的信号线。为了将基底的焊盘部电连接到IC的输出电极,将各向异性导电膜(ACF)设置在基底与IC的基底之间。
各向异性导电膜(ACF)可以包括多个导电粒子,并且导电粒子的尺寸随着显示装置的分辨率变大而减小。在这种情况下,为了防止导电性降低,可以增加导电粒子的数量。然而,随着导电粒子的数量增加,可能出现由导电粒子的聚集而造成的短路故障。此外,导电粒子的分布可能是不规则的,因此,基底的焊盘部之间可能出现电阻差。
发明内容
根据本发明构思的示例性实施方式,集成电路包括基底、焊盘电极和钝化层,其中,焊盘电极设置在基底上,钝化层设置在焊盘电极上并且包括有机绝缘材料。集成电路还包括凸块电极,该凸块电极设置在钝化层上并且通过接触孔连接到焊盘电极。钝化层包括绝缘部和凸块部,其中,绝缘部具有第一厚度并且覆盖焊盘电极的相邻边缘区域和基底的至少一部分,凸块部具有大于第一厚度的第二厚度并且覆盖焊盘电极的中心部分。
在本发明构思的示例性实施方式中,钝化层的凸块部设置在焊盘电极上。
在本发明构思的示例性实施方式中,钝化层的凸块部具有半圆形截面。
在本发明构思的示例性实施方式中,钝化层包括光敏有机材料。
在本发明构思的示例性实施方式中,钝化层包括基于聚酰亚胺、聚苯并恶唑、丙烯酸、苯酚、硅酮、硅酮改性聚酰亚胺或环氧树脂的聚合物材料。
在本发明构思的示例性实施方式中,接触孔设置在钝化层的绝缘部中。
在本发明构思的示例性实施方式中,焊盘电极包括多个层。
在本发明构思的示例性实施方式中,集成电路还包括设置在凸块电极的上表面上的突起。
在本发明构思的示例性实施方式中,钝化层还包括非导电粒子。
在本发明构思的示例性实施方式中,钝化层包括多个凸块部,以及焊盘电极与至少两个凸块部重叠。
根据本发明构思的示例性实施方式,用于制造集成电路的方法包括:在基底上形成焊盘电极;以及在焊盘电极和基底上形成有机绝缘材料层。用于制造集成电路的方法还包括:将有机绝缘材料层图案化以形成包括绝缘部和凸块部的钝化层,其中该绝缘部具有第一厚度并且覆盖焊盘电极的边缘区域和基底的至少一部分,该凸块部具有大于第一厚度的第二厚度并且覆盖焊盘电极的大体上的中心部分。用于制造集成电路的方法另外包括:在钝化层上形成凸块电极,并且该凸块电极连接到焊盘电极。
在本发明构思的示例性实施方式中,在使有机绝缘材料层图案化中使用狭缝掩模或半色调掩模。
在本发明构思的示例性实施方式中,用于制造集成电路的方法还包括:在形成钝化层之后,将钝化层固化。
在本发明构思的示例性实施方式中,用于制造集成电路的方法还包括:在钝化层上形成金属籽晶层。用于制造集成电路的方法另外包括:在金属籽晶层上形成包括开口区域的光刻胶图案;以及使用电镀法使设置在开口区域内的金属籽晶层生长。用于制造集成电路的方法还包括:去除光刻胶图案;以及对金属籽晶层进行蚀刻,以去除除金属籽晶层生长的部分之外的部分,并形成凸块电极。
在本发明构思的示例性实施方式中,用于制造集成电路的方法还包括:在钝化层的绝缘部中形成接触孔,并且接触孔与焊盘电极的至少一部分重叠。凸块电极通过接触孔连接到焊盘电极。
在本发明构思的示例性实施方式中,钝化层的凸块部设置在焊盘电极上。
在本发明构思的示例性实施方式中,钝化层的凸块部具有半圆形截面。
在本发明构思的示例性实施方式中,有机绝缘材料层包括基于聚酰亚胺、聚苯并恶唑、丙烯酸、苯酚、硅酮、硅酮改性聚酰亚胺或环氧树脂的聚合物材料。
在本发明构思的示例性实施方式中,有机绝缘材料层包括非导电粒子,以及突起形成在凸块电极的上表面上。
在本发明构思的示例性实施方式中,钝化层包括多个凸块部,以及焊盘电极与多个凸块部中的至少两个重叠。
根据本发明构思的示例性实施方式,集成电路包括基底、焊盘电极和钝化层,其中,焊盘电极设置在基底上,钝化层设置在焊盘电极上并且包括有机绝缘材料和凸块部。集成电路还包括设置在钝化层上与凸块部的形状相符并且通过接触孔连接到焊盘电极的凸块电极。凸块电极的宽度小于焊盘电极的宽度。
在本发明构思的示例性实施方式中,钝化层还包括绝缘部,该绝缘部具有从基底延伸的第一高度。凸块部具有从基底延伸的比第一高度大的第二高度。
在本发明构思的示例性实施方式中,钝化层的凸块部具有拱形截面。
附图说明
通过参考附图详细描述本发明构思的示例性实施方式,本发明构思的上述和其它特征将变得更显而易见,在附图中:
图1示出根据本发明构思示例性实施方式的显示装置的立体图;
图2示出根据本发明构思示例性实施方式的显示装置的集成电路(IC)的平面图;
图3示出根据本发明构思示例性实施方式的集成电路(IC)的焊盘的平面图;
图4示出根据本发明构思示例性实施方式的集成电路(IC)相对于图3的线IV-IV'和IV'-IV”的剖视图;
图5、图6、图7、图8、图9、图10和图11是相继地示出根据本发明构思示例性实施方式的用于制造集成电路(IC)的若干个步骤的剖视图;
图12示出根据本发明构思示例性实施方式的集成电路(IC)的剖视图;以及
图13示出根据本发明构思示例性实施方式的集成电路(IC)的平面图。
具体实施方式
下文将参考附图更全面地描述本发明构思的示例性实施方式。
为了清楚地描述本发明构思的示例性实施方式,省略与描述不相关的元件和特征,并且类似或相同的附图标记可以指代全部说明书和附图中的类似或相同的元件或特征。
在附图中,为清晰起见,可能夸大层、膜、面板、区域等的厚度。此外,为了更好地理解并且易于描述,可能夸大一些层和区域的厚度。
将理解的是,当诸如层、膜、区域或基底的元件被称为在另一元件“上”时,其可以直接在该另一元件上或者还可以存在中间元件。此外,在说明书中,词语“在……上”或“在……上方”是指置于目标部分上或下方,而不一定是指基于重力方向置于目标部分的上侧上。
现在将参考图1描述根据本发明构思示例性实施方式的显示装置。
图1示出根据本发明构思示例性实施方式的显示装置的立体图。
如图1中所示,显示装置可以包括布线基底100、面向布线基底100的封装基底200以及集成电路(IC)400。
布线基底100可以包括用于显示视觉图像的显示区域和与显示区域相邻的用于将信号传输到显示区域的外围区域。显示区域可以占据布线基底100的区域的大部分,以及外围区域可以与显示区域的第一边缘相邻。然而,本发明构思的示例性实施方式不限于此,以及显示区域和外围区域的布置可以以多种方式改变。例如,外围区域可以部分地围绕显示区域的周界。例如,外围区域可以围绕显示区域,使得外围区域绕显示区域形成L形。
封装基底200可以设置在布线基底100上使得封装基底200覆盖布线基底100的显示区域,以及集成电路(IC)400设置在布线基底100的外围区域中。封装基底200和集成电路(IC)400覆盖布线基底100的不同部分,使得它们彼此不重叠。封装基底200比布线基底100小,并且集成电路(IC)400比布线基底100小。
此外,非导电膜(NCF)设置在集成电路(IC)400与布线基底100之间。非导电膜致使集成电路(IC)400与布线基底100之间粘附。非导电膜(NCF)由非导电材料制成。
根据本发明构思示例性实施方式的显示装置可以包括液晶显示器或有机发光装置。
现在将参考图2描述根据本发明构思示例性实施方式的显示装置的集成电路(IC)。
图2示出根据本发明构思示例性实施方式的显示装置的集成电路(IC)的平面图。
如图2中所示,根据本发明构思示例性实施方式的显示装置的集成电路(IC)400包括基底410和设置在基底410上的多个焊盘405。
多个焊盘405中的第一组焊盘可以连接到设置在布线基底100上的栅极焊盘部,以及多个焊盘405中的第二组焊盘可以连接到设置在布线基底100上的数据焊盘部。此外,第一组焊盘405可以传输栅极信号,以及第二组焊盘405可以传输数据信号。多个焊盘405中的每个焊盘可以具有四边形形状。焊盘405的第一部分可以设置在基底410的中央,该第一部分在竖直方向上延伸,以及焊盘405的第二部分和第三部分可以分别设置在焊盘405的第一部分的左侧和右侧,并且可以相对于竖直方向倾斜。在这种情况下,焊盘405的第二部分和焊盘405的第三部分各自具有恒定斜率,但本发明构思的示例性实施方式不限于此。例如,随着设置在基底410上的焊盘405变得离焊盘405的第一部分更远,斜率可以变大。
现在将参考图3和图4描述根据本发明构思示例性实施方式的集成电路(IC)。
图3示出根据本发明构思示例性实施方式的IC的焊盘405的平面图,以及图4示出根据本发明构思示例性实施方式的集成电路(IC)相对于图3的线IV-IV'和IV'-IV”的剖视图。
如图3和图4中所示,集成电路(IC)包括基底410、设置在基底410上的焊盘电极420、设置在焊盘电极420上的钝化层430,以及设置在钝化层430上的凸块电极440。
焊盘电极420由金属材料制成。焊盘电极420可以是单个层或多个层。例如,焊盘电极420可以包括设置在基底410上的第一焊盘电极层422和设置在第一焊盘电极层422上的第二焊盘电极层424。第一焊盘电极层422和第二焊盘电极层424可以由不同材料制成。例如,第一焊盘电极层422可以由钛(Ti)制成,以及第二焊盘电极层424可以由金(Au)制成。
焊盘电极420的平面形状可以是四边形,以及可以是多边形(例如,矩形形状)。焊盘电极420可以在一个方向上比在另一方向上延伸得长。例如,焊盘电极420的长度可以大于焊盘电极420的宽度。
钝化层430可以由具有光敏性的聚合物材料制成。例如,钝化层430包括诸如聚酰亚胺、聚苯并恶唑、丙烯酸、苯酚、硅酮、硅酮改性聚酰亚胺或环氧树脂的聚合物材料,以及包括光敏有机材料。
钝化层430可以设置在焊盘电极420上,使得其覆盖基底410和焊盘电极420。钝化层430包括绝缘部432和凸块部434,各自具有彼此不同的厚度。绝缘部432和凸块部434整体地形成。
绝缘部432可以覆盖焊盘电极420和基底410的一部分。例如,绝缘部432可以覆盖焊盘电极420的相邻边缘区域。作为另外的示例,绝缘部432可以覆盖焊盘电极420的上表面的一部分,以及覆盖焊盘电极420的侧表面,其中焊盘电极420的侧表面在与基底410垂直的方向上延伸并且连接到焊盘电极420的上表面。绝缘部432可以设置在焊盘电极420的相邻边缘区域和基底410上。绝缘部432具有第一厚度t1。绝缘部432可以具有大体上恒定的厚度。
凸块部434覆盖焊盘电极420的中心部分。凸块部434可以设置在焊盘电极420上。凸块部434具有第二厚度t2,并且第二厚度t2大于第一厚度t1。凸块部434可以不具有恒定的厚度。凸块部434的中心部分具有可以是最大的第二厚度t2,并且凸块部434可以随着其从中心部分到边缘部分而逐渐变薄。凸块部434在剖视图中可以具有半圆形形状。在本发明构思的示例性实施方式中,凸块部434可以具有拱形形状。
与焊盘电极420的至少一部分重叠的接触孔435设置在钝化层430的绝缘部432中。一个接触孔435设置在焊盘电极420的第一端上,以及另一接触孔435设置在焊盘电极420的与第一端相对的第二端上。此外,凸块部434可以设置在两个接触孔435之间。此外,所形成的接触孔435的数量和接触孔435的位置可以以多种方式修改。
凸块电极440通过接触孔435连接到焊盘电极420。凸块电极440设置在钝化层430和焊盘电极420上。
凸块电极440的平面形状与焊盘电极420的平面形状类似。凸块电极440的平面形状可以是四边形。例如,凸块电极440的平面形状可以是多边形(例如,矩形形状)。凸块电极440可以在一个方向上比在另一方向上延伸得长。凸块电极440可以比焊盘电极420小。
凸块电极440可以由金属材料制成。例如,其可以由金(Au)、铜(Cu)、银(Ag)、铂(Pt)、钯(Pd)、镍(Ni)和/或铝(Al)制成。凸块电极440可以具有单个层或多个层。例如,当凸块电极440配置成具有多个层时,其可以形成为堆叠有由钛(Ti)、钛-钨(TiW)和/或铬(Cr)制成的下层和由金(Au)、铜(Cu)、银(Ag)、铂(Pt)、钯(Pd)、镍(Ni)和/或铝(Al)制成的上层。然而,本发明构思的示例性实施方式不限于此。
凸块电极440电连接到焊盘电极420,因而其从焊盘电极420接收信号。当IC(例如,图1的400)连接到布线基底(例如,图1的100)时,凸块电极440将由焊盘电极420提供的信号传输到布线基底(例如,图1的100)。当IC(例如,图1的400)和布线基底(例如,图1的100)被加压时,设置在凸块电极440下方的钝化层430的凸块部434可以被按下和释放以防止设置在IC(例如,图1的400)与布线基底(例如,图1的100)之间的非导电膜被提起,从而维持IC(例如,图1的400)与布线基底(例如,图1的100)之间的恒定间隙。焊盘405上的凸块部434可以与另一焊盘405上的相邻凸块部434具有恒定距离,因而可以防止相邻焊盘405之间的短路故障。在本发明构思的示例性实施方式中,凸块部434可以具有大体上恒定的长度和宽度(例如,直径);然而,本发明构思的示例性实施方式不限于此。设置在凸块部434上的凸块电极440与布线基底(例如,图1的100)表面接触,从而防止多个焊盘部之间产生电阻差。
现在将参考图5至图11描述根据本发明构思示例性实施方式的用于制造集成电路(IC)的方法。
图5至图11是相继地示出根据本发明构思示例性实施方式的用于制造IC的若干个步骤的剖视图。
如图5中所示,将金属材料沉积在基底410上,并进行图案化以形成焊盘电极420。焊盘电极420可以具有多个层或者仅仅单个层。当将多种金属材料相继地沉积在基底410上并同时进行图案化以形成焊盘电极420时,焊盘电极420可以具有多个层。例如,可以将钛(Ti)和金(Au)相继地沉积在基底410上并且可以进行图案化以形成焊盘电极420。焊盘电极420可以包括设置在基底410上的第一焊盘电极层422和设置在第一焊盘电极层422上的第二焊盘电极层424。
如图6中所示,可以将光敏聚合物材料涂覆至基底410和焊盘电极420,以形成有机绝缘材料层500。有机绝缘材料层500可以包括诸如聚酰亚胺、聚苯并恶唑、丙烯酸、苯酚、硅酮、硅酮改性聚酰亚胺和/或环氧树脂的聚合物材料。
将掩模600设置成与有机绝缘材料层500对应,并且执行曝光工艺。
掩模600可以是例如狭缝掩模或半色调掩模。掩模600包括非透射部(NR)、半透射部(HR)和透射部(TR)。当掩模600是狭缝掩模时,半透射部(HR)可以具有狭缝形状。
光不传输到有机绝缘材料层500的与掩模600的非透射部(NR)对应的部分。一部分光传输到有机绝缘材料层500的与掩模600的半透射部(HR)对应的部分。足够的光传输到有机绝缘材料层500的与掩模600的透射部(TR)对应的部分,以便在使用负性光刻胶时使光敏材料硬化以防止被去除,或者在使用正性光刻胶时使光敏材料弱化以便去除。
当有机绝缘材料层500通过曝光工艺显影并图案化时,形成钝化层430,如图7中所示。在本发明构思的示例性实施方式中,有机绝缘材料层500可以由负性光敏材料制成。当有机绝缘材料层500由负性光敏材料制成时,未暴露于光的部分被去除,暴露于一部分光的部分变薄,以及暴露于足够的光来使光敏材料硬化以防止被去除或蚀刻的部分保留。然而,本发明构思的示例性实施方式不限于此。例如,有机绝缘材料层500可以由正性光敏材料制成。当有机绝缘材料层500由正性光敏材料制成时,正性光敏材料的暴露于足够的光以便去除或蚀刻光敏材料的部分被去除,暴露于一部分光的部分变薄,以及未暴露于光的部分保留。因此,可以使用掩模600的不同设计。
有机绝缘材料层500变薄的部分成为钝化层430的绝缘部432。有机绝缘材料层500的剩余部分成为钝化层430的凸块部434。钝化层430的绝缘部432和凸块部434在相同工艺期间同时形成,并且它们整体地形成。去除了有机绝缘材料层500的部分成为暴露焊盘电极420的至少一部分的接触孔435。
绝缘部432覆盖焊盘电极420的边缘区域和基底410的至少一部分。绝缘部432可以设置在焊盘电极420的边缘区域和基底410上。绝缘部432具有第一厚度t1。绝缘部432可以具有大体上恒定的厚度。
凸块部434覆盖焊盘电极420的中心部分。凸块部434可以设置在焊盘电极420上。凸块部434具有第二厚度t2,并且第二厚度t2大于第一厚度t1。
接触孔435暴露焊盘电极420的至少一部分。
如图8中所示,执行用于将钝化层430固化的工艺。当提供了钝化层430时,可以将紫外线或热量施加于该钝化层以将钝化层430固化。在这种情况下,钝化层430的凸块部434的形状可以改变,并且凸块部434的截面形状可以变成半圆形。因此,凸块部434可不具有恒定的厚度。例如,凸块部434的中心部分具有最大的第二厚度t2,并且凸块部434可以随着其从中心部分到凸块部434的边缘部分而逐渐变薄。
如图9中所示,将金属籽晶层700设置在钝化层430上。
将光敏有机材料设置在金属籽晶层700上并进行图案化以形成光刻胶图案800。光刻胶图案800包括开口区域810。
如图10中所示,使用电镀法生长设置在光刻胶图案800的开口区域810中的金属籽晶层700。因此,设置在光刻胶图案800下方的金属籽晶层700的厚度不改变。此外,设置在光刻胶图案800的开口区域810内的金属籽晶层700变厚。
如图11中所示,去除光刻胶图案800。
对金属籽晶层700进行蚀刻以去除除金属籽晶层700生长的部分之外的部分,并形成凸块电极440。将设置在光刻胶图案800下方的金属籽晶层700去除。设置在光刻胶图案800的开口区域810内的金属籽晶层700生长并变厚,使得其可被蚀刻到预定厚度并且其剩余部分形成凸块电极440。
凸块电极440通过接触孔435连接到焊盘电极420。凸块电极440从焊盘电极420接收预定信号,并且将该预定信号传输到布线基底(例如,图1的100)。
现在将参考图12描述根据本发明构思示例性实施方式的集成电路(IC)。
可以假设图12中示出的IC的大多数元件和特征与图1到图4中示出的IC的相应元件相似。在本发明构思的示例性实施方式中,钝化层可以包括非导电粒子。
图12示出根据本发明构思示例性实施方式的IC的剖视图。
如图12中所示,IC包括基底410、设置在基底410上的焊盘电极420、设置在焊盘电极420上的钝化层430以及设置在钝化层430上的凸块电极440。
钝化层430可以由光敏聚合物材料制成,并且还可以包括非导电粒子437。非导电粒子437可以具有类似于珠子的形状。
突起445设置在凸块电极440的上表面上,该凸块电极440设置在钝化层430上。
包括非导电粒子437的有机绝缘材料层500(例如,如图6中所示)设置在基底410和焊盘电极420上,并且被图案化以形成钝化层430的绝缘部432和凸块部434。突起445可以由于钝化层430的非导电粒子437而形成在凸块电极440的上表面上。可以省略设置在凸块电极440的上表面上的突起445。
在本发明构思的示例性实施方式中,当IC和布线基底被加压时,由于非导电粒子437,可能出现凹陷。因此,可以根据是否发现凹陷而容易地确定IC和布线基底是否被正确加压。
在布线基底的焊盘部的上表面上可以自然地生成氧化层。在本发明构思的示例性实施方式中,当IC和布线基底被加压时,IC可以在凸块电极440的突起445穿透氧化层的同时稳定地接近布线基底的焊盘部的电极。
现在将参考图13描述根据本发明构思的示例性实施方式的IC。
可以假设图13中示出且下文未描述的IC的元件和特征与图1到图4中示出的IC的相应元件相似。在本发明构思的示例性实施方式中,一个焊盘405可以包括多个凸块部。
图13示出根据本发明构思示例性实施方式的IC的平面图。
如图13中所示,IC包括基底410、设置在基底410上的焊盘电极420、设置在焊盘电极420上的钝化层430以及设置在钝化层430上的凸块电极440。
钝化层430包括绝缘部432和凸块部434。
钝化层430的凸块部434可以包括第一凸块部434a和第二凸块部434b。第一凸块部434a和第二凸块部434b与相同的焊盘电极420重叠。然而,示例性实施方式不限于此,并且一个焊盘电极420可以与至少三个或更多个凸块部重叠。
接触孔435设置在钝化层430的绝缘部432中。一个接触孔435设置成与第一凸块部434a的第一端相邻,一个接触孔435设置成与第二凸块部434b的第二端相邻以及一个接触孔435设置在第一凸块部434a与第二凸块部434b之间,其中第二凸块部434b的第二端与第二凸块部434b的第一端相对。例如,一个接触孔435可以设置在第一凸块部434a的第二端与第二凸块部434b的第一端之间,其中第一凸块部434a的第二端与第一凸块部434a的第一端相对。然而,所形成的接触孔435的数量和接触孔435的位置可以以多种方式改变。
凸块电极440覆盖第一凸块部434a和第二凸块部434b。第一凸块部434a和第二凸块部434b与相同的凸块电极440重叠。例如,一个凸块电极440可以与两个凸块部(即,第一凸块部434a和第二凸块部434b)重叠。然而,本发明构思的示例性实施方式不限于此,并且一个凸块电极440可以与至少三个或更多个凸块部重叠。
本发明构思的示例性实施方式示出使集成电路(IC)的电连接稳定的工作。
虽然已参考本发明构思的示例性实施方式具体示出并描述了本发明构思,但对本领域普通技术人员将明显的是,在不背离如所附权利要求书限定的本发明构思的精神和范围的情况下,可以对本发明构思在形式和细节上作出多种改变。
Claims (10)
1.集成电路,包括:
基底;
焊盘电极,设置在所述基底上;
钝化层,设置在所述焊盘电极上并且包括有机绝缘材料,其中,所述钝化层包括绝缘部和凸块部,所述绝缘部具有第一厚度并且覆盖所述焊盘电极的相邻边缘区域和所述基底的至少一部分,所述凸块部具有大于所述第一厚度的第二厚度并且覆盖所述焊盘电极的中心部分;以及
凸块电极,在所述焊盘电极的中心区域设置在所述凸块部上以及在所述焊盘电极的端部区域设置在所述绝缘部上,并且通过所述绝缘部的设置在所述焊盘电极的所述端部区域的接触孔连接到所述焊盘电极。
2.根据权利要求1所述的集成电路,其中,所述钝化层的所述凸块部设置在所述焊盘电极上。
3.根据权利要求1所述的集成电路,其中,所述钝化层的所述凸块部具有半圆形截面。
4.根据权利要求1所述的集成电路,其中:
所述钝化层包括光敏有机材料,以及
所述钝化层包括基于聚酰亚胺、聚苯并恶唑、丙烯酸、苯酚、硅酮、硅酮改性聚酰亚胺或环氧树脂的聚合物材料。
5.用于制造集成电路的方法,包括:
在基底上形成焊盘电极;
在所述焊盘电极和所述基底上形成有机绝缘材料层;
将所述有机绝缘材料层图案化以形成包括绝缘部和凸块部的钝化层,所述绝缘部具有第一厚度并且覆盖所述焊盘电极的边缘区域和所述基底的至少一部分,所述凸块部具有大于所述第一厚度的第二厚度并且覆盖所述焊盘电极的中心部分;以及
在所述钝化层上形成凸块电极,并且所述凸块电极在所述焊盘电极的中心区域设置在所述凸块部上以及在所述焊盘电极的端部区域设置在所述绝缘部上,并且通过所述绝缘部的设置在所述焊盘电极的所述端部区域的接触孔连接到所述焊盘电极。
6.根据权利要求5所述的方法,还包括:
在所述钝化层上形成金属籽晶层;
在所述金属籽晶层上形成包括开口区域的光刻胶图案;
使用电镀法使设置在所述开口区域内的所述金属籽晶层生长;
去除所述光刻胶图案;以及
对所述金属籽晶层进行蚀刻,以去除除所述金属籽晶层生长的部分之外的部分,并形成所述凸块电极。
7.根据权利要求5所述的方法,还包括:
在所述钝化层的绝缘部中形成所述接触孔,并且所述接触孔与所述焊盘电极的至少一部分重叠;
其中所述凸块电极通过所述接触孔连接到所述焊盘电极。
8.根据权利要求5所述的方法,其中,所述钝化层的所述凸块部设置在所述焊盘电极上。
9.根据权利要求5所述的方法,其中,
所述有机绝缘材料层包括非导电粒子,以及
在所述凸块电极的上表面上形成突起。
10.根据权利要求5所述的方法,其中:
所述钝化层包括多个所述凸块部,以及
所述焊盘电极与所述多个所述凸块部中的至少两个重叠。
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2016
- 2016-06-15 KR KR1020160074441A patent/KR102624624B1/ko active IP Right Grant
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- 2017-06-06 US US15/615,123 patent/US10153193B2/en active Active
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US10153193B2 (en) | 2018-12-11 |
US20170365503A1 (en) | 2017-12-21 |
CN107527886A (zh) | 2017-12-29 |
KR20170141840A (ko) | 2017-12-27 |
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