CN107452734A - 半导体器件 - Google Patents

半导体器件 Download PDF

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Publication number
CN107452734A
CN107452734A CN201710330480.1A CN201710330480A CN107452734A CN 107452734 A CN107452734 A CN 107452734A CN 201710330480 A CN201710330480 A CN 201710330480A CN 107452734 A CN107452734 A CN 107452734A
Authority
CN
China
Prior art keywords
diode
mos transistor
channel mos
input
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710330480.1A
Other languages
English (en)
Chinese (zh)
Inventor
田中正德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of CN107452734A publication Critical patent/CN107452734A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • H02H9/046—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere responsive to excess voltage appearing at terminals of integrated circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/811—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using FETs as protective elements
    • H10D89/819—Bias arrangements for gate electrodes of FETs, e.g. RC networks or voltage partitioning circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN201710330480.1A 2016-05-31 2017-05-11 半导体器件 Pending CN107452734A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016-108367 2016-05-31
JP2016108367A JP2017216325A (ja) 2016-05-31 2016-05-31 半導体装置

Publications (1)

Publication Number Publication Date
CN107452734A true CN107452734A (zh) 2017-12-08

Family

ID=60420677

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710330480.1A Pending CN107452734A (zh) 2016-05-31 2017-05-11 半导体器件

Country Status (3)

Country Link
US (1) US10361557B2 (enExample)
JP (1) JP2017216325A (enExample)
CN (1) CN107452734A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106449634B (zh) * 2016-09-23 2019-06-14 矽力杰半导体技术(杭州)有限公司 瞬态电压抑制器及其制造方法
KR20190140216A (ko) * 2018-06-11 2019-12-19 에스케이하이닉스 주식회사 Esd 보호 회로를 포함하는 반도체 집적 회로 장치

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101436592A (zh) * 2007-11-12 2009-05-20 恩益禧电子股份有限公司 半导体集成电路
CN101710700A (zh) * 2004-10-25 2010-05-19 株式会社瑞萨科技 半导体集成电路
CN101771035A (zh) * 2008-12-26 2010-07-07 海力士半导体有限公司 集成电路
JP2013201164A (ja) * 2012-03-23 2013-10-03 Toshiba Corp 半導体装置
CN105470252A (zh) * 2014-09-29 2016-04-06 瑞萨电子株式会社 半导体器件

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4736271A (en) * 1987-06-23 1988-04-05 Signetics Corporation Protection device utilizing one or more subsurface diodes and associated method of manufacture
JP2792417B2 (ja) * 1993-12-17 1998-09-03 日本電気株式会社 半導体回路の入力保護回路
GB2334633B (en) * 1998-02-21 2002-09-25 Mitel Corp Low leakage electrostatic discharge protection system
JP2001298157A (ja) * 2000-04-14 2001-10-26 Nec Corp 保護回路及びこれを搭載した半導体集積回路
JP2003023084A (ja) 2001-07-05 2003-01-24 Matsushita Electric Ind Co Ltd Ｅｓｄ保護回路
KR101036208B1 (ko) * 2008-12-24 2011-05-20 매그나칩 반도체 유한회사 정전기 방전 보호회로
US20130003242A1 (en) * 2010-07-15 2013-01-03 Kun-Hsien Lin Transient voltage suppressor for multiple pin assignments

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101710700A (zh) * 2004-10-25 2010-05-19 株式会社瑞萨科技 半导体集成电路
CN101436592A (zh) * 2007-11-12 2009-05-20 恩益禧电子股份有限公司 半导体集成电路
CN101771035A (zh) * 2008-12-26 2010-07-07 海力士半导体有限公司 集成电路
JP2013201164A (ja) * 2012-03-23 2013-10-03 Toshiba Corp 半導体装置
CN105470252A (zh) * 2014-09-29 2016-04-06 瑞萨电子株式会社 半导体器件

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
邵丙铣、郑国祥 编著: "《MOS集成电路的分析与设计》", 上海科学技术情报研究所, pages: 127 *

Also Published As

Publication number Publication date
US20170346281A1 (en) 2017-11-30
JP2017216325A (ja) 2017-12-07
US10361557B2 (en) 2019-07-23

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Application publication date: 20171208

RJ01 Rejection of invention patent application after publication