CN107316864B - 瞬态电压抑制器及其制作方法 - Google Patents
瞬态电压抑制器及其制作方法 Download PDFInfo
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- CN107316864B CN107316864B CN201710564686.0A CN201710564686A CN107316864B CN 107316864 B CN107316864 B CN 107316864B CN 201710564686 A CN201710564686 A CN 201710564686A CN 107316864 B CN107316864 B CN 107316864B
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- Prior art keywords
- diode
- doped zone
- transient voltage
- voltage suppressor
- zone domain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0814—Diodes only
Abstract
Description
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710564686.0A CN107316864B (zh) | 2017-07-12 | 2017-07-12 | 瞬态电压抑制器及其制作方法 |
Applications Claiming Priority (1)
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CN201710564686.0A CN107316864B (zh) | 2017-07-12 | 2017-07-12 | 瞬态电压抑制器及其制作方法 |
Publications (2)
Publication Number | Publication Date |
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CN107316864A CN107316864A (zh) | 2017-11-03 |
CN107316864B true CN107316864B (zh) | 2018-12-18 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201710564686.0A Active CN107316864B (zh) | 2017-07-12 | 2017-07-12 | 瞬态电压抑制器及其制作方法 |
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CN (1) | CN107316864B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108063137B (zh) * | 2017-12-11 | 2020-09-01 | 南京溧水高新创业投资管理有限公司 | 瞬态电压抑制器及其制作方法 |
CN109300786B8 (zh) * | 2018-10-08 | 2021-12-24 | 电子科技大学中山学院 | 瞬态电压抑制器及其制作方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8558276B2 (en) * | 2009-06-17 | 2013-10-15 | Alpha And Omega Semiconductor, Inc. | Bottom source NMOS triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (TVS) |
CN102290419B (zh) * | 2011-08-24 | 2013-02-13 | 浙江大学 | 一种基于齐纳二极管的瞬态电压抑制器 |
CN103354229B (zh) * | 2013-07-11 | 2016-04-27 | 江苏艾伦摩尔微电子科技有限公司 | 一种穿通型瞬态电压抑制器 |
CN204886173U (zh) * | 2015-08-20 | 2015-12-16 | 北京燕东微电子有限公司 | 瞬态电压抑制器 |
CN106098792A (zh) * | 2016-08-27 | 2016-11-09 | 上海长园维安微电子有限公司 | 双向电压完全对称带有超深沟槽超低漏电的tvs器件及制法 |
CN106129058B (zh) * | 2016-08-27 | 2023-08-25 | 上海维安半导体有限公司 | 沟槽引出集成型低压双向瞬时电压抑制器及其制造方法 |
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2017
- 2017-07-12 CN CN201710564686.0A patent/CN107316864B/zh active Active
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Effective date of registration: 20181105 Address after: 312000 Keqiao, Shaoxing, Keqiao, Zhejiang Keqiao East Industrial Park, the 6 sides of the Jeremiah Road 102 stories. Applicant after: Shaoxing Yiyue Intelligent Technology Co.,Ltd. Address before: 512444 No. 999, Tai Hang ancestral hall village, Shuikou village committee, Shuikou Town, Nanxiong, Shaoguan, Guangdong Applicant before: Sun Lifang |
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Effective date of registration: 20221221 Address after: 300300-5156, block a, No. 6, Huafeng Road, Huaming high tech Industrial Zone, Dongli District, Tianjin Patentee after: Boxin semiconductor technology (Tianjin) Co.,Ltd. Address before: 312000 Keqiao, Shaoxing, Keqiao, Zhejiang Keqiao East Industrial Park, the 6 sides of the Jeremiah Road 102 stories. Patentee before: Shaoxing Yiyue Intelligent Technology Co.,Ltd. |