CN107210554A - 用于制造电互连结构的方法 - Google Patents

用于制造电互连结构的方法 Download PDF

Info

Publication number
CN107210554A
CN107210554A CN201580074096.9A CN201580074096A CN107210554A CN 107210554 A CN107210554 A CN 107210554A CN 201580074096 A CN201580074096 A CN 201580074096A CN 107210554 A CN107210554 A CN 107210554A
Authority
CN
China
Prior art keywords
cylinder
attachment structure
dry film
public
female
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201580074096.9A
Other languages
English (en)
Inventor
徐英郁
文永周
尹琮光
金荣洙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UNID CO Ltd
Original Assignee
UNID CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by UNID CO Ltd filed Critical UNID CO Ltd
Publication of CN107210554A publication Critical patent/CN107210554A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
    • H01R43/007—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for elastomeric connecting elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50—Fixed connections
    • H01R12/51—Fixed connections for rigid printed circuits or like structures
    • H01R12/55—Fixed connections for rigid printed circuits or like structures characterised by the terminals
    • H01R12/58—Fixed connections for rigid printed circuits or like structures characterised by the terminals terminals for insertion into holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50—Fixed connections
    • H01R12/59—Fixed connections for flexible printed circuits, flat or ribbon cables or like structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02—Contact members
    • H01R13/22—Contacts for co-operating by abutting
    • H01R13/24—Contacts for co-operating by abutting resilient; resiliently-mounted
    • H01R13/2407—Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means
    • H01R13/2414—Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means conductive elastomers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16265—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being a discrete passive component
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
    • H01L2924/19104—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device on the semiconductor or solid-state device, i.e. passive-on-chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70—Coupling devices
    • H01R12/71—Coupling devices for rigid printing circuits or like structures
    • H01R12/72—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
    • H01R12/73—Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0311—Metallic part with specific elastic properties, e.g. bent piece of metal as electrical contact
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/1059—Connections made by press-fit insertion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate

Abstract

本发明公开用于制造电连接结构的方法，所述电连接结构包含母连接结构和公连接结构，母连接结构具有位于母连接组件的插入孔中的内导体，且公连接结构具有从公连接组件突出形成的导电柱体，导电柱体被插入固定于插入孔中以接触内导体。所述方法包括：准备待用于母连接组件及公连接组件的绝缘组件；以及通过光刻工艺在各绝缘组件上进行导体的图案化以形成内导体及柱体。

Description

用于制造电互连结构的方法
技术领域
本发明涉及一种用于制造电互连结构的方法，其用于印刷电路板、中介层、电子封装及用于令其相互电连接的连接器的内部与外部之间的电连接。
背景技术
需要电连接结构以连接印刷电路板(PCB)及安装在其上的装置(例如，半导体封装、无源器件、有源器件、显示模块及电池)，或连接PCB与其他PCB。
一般的电连接结构可为用于电连接的连接器，而连接器被用于不同基板相互间的连接或用于连接基板及电子组件。
通常，用于电连接的连接器为其中母连接结构与公连接结构彼此耦接的类型，且包含其中连接器使用焊接安装在基板等上的焊接接合型以及用于可拆卸耦接的插座型。
通常，用于电连接的连接器通过注入成型合成树脂而被制造为具有特定的形状。即，连接器是通过将塑料加热及熔化、通过高压注射进入模具之中、及维持压力仍期间冷却至固化来形成的。
当用于电连接的连接器是通过注入成型制造时，需要支付大量的费用来制造模具，且存在当电连接结构的设计改变时的再次制造新模具的不方便。
此外，由于用于电连接的连接器被制造为限于特定的形状(例如，方形)，连接器不应妨碍安装在印刷电路板上的例如其他组件或螺丝孔的结构。因此，问题在于因为增加了印刷电路板的尺寸而增加的安装空间或当设计电路时考虑到安装连接器的空间，因此电路设计的自由度受到抑制。
发明内容
技术问题
本发明旨在提供一种使用印刷电路板的制造方法来制造电连接结构的方法，该方法可能轻易地改变设计且增加安装位置的自由度及空间使用率。
本发明的范围不限于前述对象，所属技术领域的普通技术人员可从下面的描述中清楚地理解其他未提及的对象。
技术方案
本发明的一个方面提供一种用于制造电连接结构的方法，该电连接结构包含母连接结构和公连接结构，该母连接结构具有位于母连接组件的插入孔中的内导体，且该公连接结构具有从公连接组件突出形成的导电柱体，该柱体被插入固定于插入孔中以接触内导体。该方法包括准备待用于母连接组件及公连接组件的绝缘组件；以及通过光刻工艺在各绝缘组件上进行导体的图案化以形成内导体及柱体。
根据用于制造电连接结构的方法，母连接结构的制造可包括：在绝缘组件中形成插入孔；在绝缘组件上堆叠电极层及第一干膜；通过光刻工艺在第一干膜中形成具有对应于插入孔的形状的图案孔；通过电镀工艺以导电材料填充插入孔；以及通过蚀刻插入孔中的导电材料来形成内导体。
根据用于制造电连接结构的方法，公连接结构的制造可包括：在绝缘组件上堆叠电极层及第二干膜；通过光刻工艺在第二干膜中形成柱体孔；以及通过电镀工艺以导电材料填充柱体孔来形成柱体。
根据用于制造电连接结构的方法，公连接结构的制造还可包括：在堆叠第二干膜之前在绝缘组件的两侧堆叠干膜；通过光刻工艺形成图案孔以用于在干膜中形成焊盘(pad)；以及通过电镀工艺以导电材料填充干膜中的图案孔来形成焊盘。
根据用于制造电连接结构的方法，公连接结构的制造还可包括：堆叠干膜以覆盖柱体；通过光刻工艺在干膜中形成具有对应于弹性片的形状的图案孔；以及通过电镀工艺以导电材料填充干膜中的图案孔来形成弹性片。
根据用于制造电连接结构的方法，公连接结构的制造还可包括：在柱体上堆叠另外制造的弹性片。
同时，本发明的另一方面提供一种用于制造电连接结构的方法，该电连接结构包含母连接结构和公连接结构，该母连接结构具有位于母连接组件的插入孔中的内导体，该公连接结构具有从公连接组件突出形成的导电柱体，该柱体具有弹性片且被插入固定于插入孔中以接触内导体，其中公连接结构的制造包括：准备待用于弹性片的金属板；通过光刻工艺及电镀工艺在金属板上形成柱体；以及在柱体上堆叠待用于公连接组件的绝缘组件。
根据用于制造电连接结构的方法，母连接组件或公连接组件包含以下中的至少一者：有源器件、无源器件、用于电连接的连接器、半导体芯片封装、应用于半导体封装的中介层、具有三维多层结构的半导体芯片和封装、以及多层陶瓷电容器。
技术效果
根据本发明的示例性实施例，电连接结构是使用制造印刷电路板的方法来制造，其可能轻易地改变设计且增加安装位置的自由度及空间使用率。
同样，根据本发明的示例性实施例，优点在于因为不使用传统的注入成型所以可节省制造模具的费用。
此外，效果在于许多电连接结构可设置在小空间中，且可因为前述的电连接结构而实施在连接结构之间的细间距。
此外，优点在于电子信号速度可通过实施低高度及接近线性结构的电连接结构而增加，且信号质量可通过减少信号损失而增加。
附图说明
图1为描绘根据本发明的电连接结构的各种形状的示意图。
图2为描绘根据本发明示例性实施例的母连接结构的制造过程的顺序图。
图3为描绘根据本发明第一实施例的公连接结构的制造过程的顺序图。
图4为描绘根据本发明第二实施例的公连接结构的制造过程的顺序图。
图5为描绘根据本发明第三实施例的公连接结构的制造过程的顺序图。
图6及图7为描绘根据本发明示例性实施例的可拆卸电连接结构的剖面图。
图8为描绘在图6及图7中所描绘的柱体及弹性片的平面图。
具体实施方式
在本发明中所公开的电连接结构为涵盖应用于如所有类型的移动电话、显示设备等的所有类型的电子装置的印刷电路板与安装在印刷电路板上的电子装置之间，以及在印刷电路板与电组件之间的电连接的所有结构的概念。电连接结构能够被应用于如所有类型的移动电话、显示装置的电子装置，且在这种情况下，本发明的电连接结构可被提供在配置以形成电子装置的外观的外壳中。这样的一个示例性实施例可为在安装在外壳中的印刷电路板与安装在印刷电路板上的电子组件之间的电连接结构。
以下，与本发明有关的可拆卸电连接结构将参考附图来详细描述。
图6及图7为描绘根据本发明示例性实施例的电连接结构的剖面图。
如在图6及图7中所描绘的，根据本发明示例性实施例的电连接结构包含通过公母结构彼此耦接的母连接结构100及公连接结构200。图6描绘其中母连接结构100及公连接结构200彼此分离的状态，而图7描绘其中母连接结构100及公连接结构200耦接的状态。
母连接结构100及公连接结构200可被形成在印刷电路板中或可为经配置以被安装在印刷电路板上的独立组件。举例来说，母连接结构100或公连接结构200可包括源器件、无源器件、连接器、应用于半导体封装的中介层、半导体芯片封装、具有三维多层结构的半导体芯片和封装、以及多层陶瓷电容器中的至少一者。
母连接结构100包含具有插入孔113及提供在插入孔113中的内导体120的母连接组件110。
母连接组件110可由绝缘材料或绝缘材料与导电材料的组合来形成。母连接组件110的原始材料可为下述中的一者或多者的组合：陶瓷、聚合物、硅、玻璃及金属。
内导体120被提供在形成在母连接组件110中的插入孔113的内壁上。根据本发明的示例性实施例，插入孔113可具有内凹母连接组件110的表面(在图1及图2中的下表面)一预定深度而得到的形状，且也可具有圆柱形状的内凹形状。然而，插入孔113可具有这样的形状以及具有完全穿过母连接组件110的通孔形状。
内导体120可具有以一预定厚度堆叠在插入孔113的内壁上的形状。根据本发明的示例性实施例，内导体120是沿插入孔113的内壁边缘形成。
公连接结构200包含公连接组件210、从公连接组件210突出的柱体220及从柱体220朝向外部方向延伸的弹性片230。
如母连接组件110，公连接组件210可由绝缘材料或绝缘材料与导电材料的组合形成。
柱体220具有导电材料及从公连接组件120突出的结构。在本发明的示例性实施例中，作为示例，柱体220被安装在连接至公连接组件210的电路图案的焊盘240上。
整个柱体220可由导电材料形成，或其外表面可由导电材料形成而其内部可由绝缘材料形成。作为后者的一个示例，柱体220的内部可由聚合物、硅、玻璃等形成，而只有其外表面可由导电材料形成。如在图7中所描绘，当母连接组件110面对公连接组件210时，柱体220被插入母连接组件110的插入孔113之中。
内导体120及柱体220可以阵列形状设置在母连接组件110及公连接组件120上。举例来说，内导体120及柱体220可能被设置为具有预定数量的行及列的矩阵形状，或其他各种形状。
图8为描绘在图6及图7中所描绘的柱体220及弹性片230的平面图。
弹性片230具有一表面，该表面具有导电材料且具有从柱体220向外延伸的结构。当柱体220被插入插入孔113中时，弹性片230被配置以通过被弹性变形而弹性接触内导体120。
当柱体220被插入插入孔113中时，弹性片230可在柱体220的插入方向的相对方向上弯曲，且可具有与柱体220整合的结构或具有其中附加层堆叠在柱体220的上表面上的构造。
弹性片230可由能够弹性变形的导电材料(例如，金属)形成，或可通过表面被涂覆有导电材料(例如，金属)的弹性材料(例如，聚合物、纤维)来形成。
最好将弹性片230形成为多个以接触内导体120的多个区域，而如在图8中所描绘，多个弹性片230可沿柱体220的圆周方向以预定角度隔开的设置。尽管图8描绘其中四个弹性片230被设置为以90度分隔开的结构，但对弹性片230的数量及形状做各种改变是可能的。举例来说，弹性片230可形成为具有环形的多个或一个。
母连接组件110及公连接组件210分别包含第一连接部分及第二连接部分，且其数量可分别为多个。第一连接部分及第二连接部分指经配置以通过在母连接组件110与公连接组件210之间的连接来电连接的对象，且其示例可包含焊盘(pads)、电路图案、凸块(bumps)、焊接球、通孔等。
根据本发明的示例性实施例，形成在母连接组件110的上表面上的焊盘130被提供作为第一连接部分的一个示例，而形成在公连接组件210的下表面上的焊盘250被提供作为第二连接部分的一个示例。
由导电材料(例如，金属)形成的内导体120电连接至第一连接部分，而作为示例，在图1及图2中的内导体120通过插入孔113的底部穿过母连接组件110来连接至焊盘130。
柱体220电连接至公连接组件210的第二连接部分，公连接组件210的下表面的焊盘250能够通过导电结构(如公连接组件210的上表面的焊盘240及通孔)电连接。
以下，是本发明的电连接结构的操作状态。
从如在图6中所描绘的母连接结构100及公连接结构200彼此分离的状态，母连接结构100及公连接结构200可如在图7中所描绘的通过将公连接组件210的柱体220插入母连接结构100的插入孔113中而耦接。在柱体220插入插入孔113中的过程中，弹性片230的弹性变形是通过弹性片230被提供于插入孔113的内壁的内导体120挤压而发生，而因此，弹性片230由于弹性片230所产生的恢复力而电接触内导体120。弹性恢复力用作为在母连接组件110及公连接组件210之间的耦接力，且使母连接组件110及公连接组件210不会变得任意彼此分离。
同时，因电连接至公连接组件210的第二连接部分的弹性片230与电连接至母连接组件110的第一连接部分的内导体120接触，所以可能电连接第一连接部分及第二连接部分。
如前所述，由于一同实施电连接结构及物理耦接结构，所以不需要额外的物理耦接结构，且优点在于电连接结构的总厚度能够通过在母连接组件110的内部以水平接触结构实施电连接结构而减少。此外，优点还在于电子信号信号速度可通过实施低高度及接近线性结构的电连接结构而增加，且信号质量可通过减少信号损失而增加。
同时，尽管弹性片230被提供在柱体220的外表面上的结构被描述为公连接结构200的结构，但其中不提供弹性片230的结构是可能的，而柱体220被插入及耦接插入孔113，且柱体220直接接触内导体120。
以下，根据本发明示例性实施例的制造电连接结构的方法将参考图2至图5描述。
根据本发明的制造电连接结构的方法，其包含：准备用于母连接组件110及公连接组件210的绝缘组件101及绝缘组件201的步骤，及通过光刻工艺在绝缘组件101及绝缘组件201上分别进行导体的图案化来形成内导体120及柱体220的步骤。
以下，将详细描述母连接结构100及公连接结构200各自的制造过程。
图2为描绘根据本发明示例性实施例的母连接结构的制造过程的顺序图。
如在图2(a)中所描绘，准备用于母连接组件110的绝缘组件101，而插入孔113形成在绝缘组件101中。此时，可同时形成用于电连接焊盘130与内导体120的导电孔115。
然后，如在图2(b)中所描绘，堆叠电极层102。例如铜的导电膜可被用于电极层102，而当电镀时这是用于连接电极的结构。
接着，如在图2(c)中所描绘，堆叠干膜104，且使用光刻工艺将对应于插入孔113的图案孔123形成在干膜104中。在附着于绝缘组件101前，提前在干膜104中形成图案孔123是可能的。
此时，另一干膜103被附着在相对于插入孔113的一侧，对应于焊盘130的图案孔133可使用光刻工艺来形成。形成各图案孔123及图案孔133的光刻工艺可同时执行。
接着，如在图2(d)中所描绘，插入孔113使用电镀工艺以例如铜的导电材料125填充。此时，可能同时以导电材料135填充在相对于插入孔113的一侧中的图案孔133。因此，用于内导体120的结构及用于焊盘130的结构可通过在插入孔113的内部及在相对于其的一侧中的图案孔133同时执行电镀工艺来同时形成。
接着，如在图2(e)中所描绘，内导体120的图案是通过对插入孔113中的导电材料125的机械或化学蚀刻来形成。此外，剥离干膜103及干膜104，并通过机械或化学蚀刻工艺来移除一部分的电极层102，从而最终完成母连接结构100。
图3为描绘根据本发明第一实施例的公连接结构的制造过程的顺序图。
如在图3(a)中所描绘，准备用于公连接组件210的绝缘组件201，并将电极层202堆叠在绝缘组件201的一个表面上。在本发明的示例性实施例的情况中，电极层203也形成在绝缘组件201的另一表面上以在相对表面上形成焊盘250。在此过程中，可能形成如通孔等的结构以电连接绝缘组件201的顶部表面及底部表面。
接着，如在图3(b)中所描绘，干膜204及干膜205被堆叠在电极层202及电极层203外表面上，且使用光刻工艺形成图案孔243及图案孔253以在各干膜204及干膜205中形成焊盘240及焊盘250。
接着，如在图3(c)中所描绘，焊盘240及焊盘250通过以例如铜的导电材料填充干膜204及干膜205的图案孔243及图案孔253来形成。此时，电镀工艺可在通孔的内部上执行以电连接焊盘240及焊盘250。
接着，如在图3(d)中所描绘，干膜206及干膜207被堆叠在其中形成柱体220及未形成柱体220的两侧表面上。然后，柱体孔223形成在其中形成柱体的干膜206中。柱体孔223也使用与前述的图案孔243及图案孔253相同的光刻工艺来形成。堆叠在相对于柱体220的一侧上的干膜207用作为屏障以使不进一步执行电镀。
接着，如在图3(e)中所描绘，柱体结构220通过使用电镀工艺以例如铜的导电材料225填充柱体孔223来形成。在公连接结构200不需要形成弹性片230的情况下，公连接结构200通过剥离干膜204、205、206及207以及去除电极层202及电极层203的不需要的部分来完成。后续过程形成弹性片230。
如在图3(f)中所描绘，堆叠干膜208以覆盖用于柱体220的导电材料225，并通过光刻工艺在干膜208中形成具有对应于弹性片230的形状的图案孔233。
接着，如在图3(g)中所描绘，用于弹性片230的结构是通过电镀工艺以例如铜等的导电材料填充图案孔233来形成。接着，如在图3(h)中所描绘，剥离干膜204、205、206、207及208并通过机械或化学蚀刻工艺来去除电极层202及电极层203的不需要的部分，从而可最终完成公连接结构200。
图4为描绘根据本发明第二实施例的公连接结构的制造过程的顺序图。
除了形成弹性片230的过程之外，根据本发明的示例性实施例的公连接结构具有与前面的实施例相同的过程。即，图4(a)至图4(e)的过程与图3(a)至图3(e)的过程相同。
在本发明的这个实施例中的制造公连接结构的方法在直到形成柱体220的过程为止是相同的，自那以后，如在图4(f)中所描绘，将分别制造的弹性片230堆叠在柱体220上。
图5为描绘根据本发明第三实施例的公连接结构的制造过程的顺序图。
根据本发明示例性实施例的制造公连接结构的方法具有与前面的实施例相反的顺序，即，包含将柱体220及绝缘组件210依次堆叠在用于弹性片230的金属板301上的方法。
如在图5(a)中所描绘，准备用于弹性片230的金属板301，且将干膜302及干膜303堆叠在金属板301的两侧表面上。
接着，如在图5(b)中所描绘，使用光刻工艺将对应于柱体220的柱体孔323形成在一侧上的干膜302中，且如在图5(c)中所描绘，柱体220通过使用电镀工艺以例如铜的导电材料325填充柱体孔323来形成。
接着，如在图5(e)中所描绘，堆叠干膜304，且将图案孔343形成在干膜304中以形成焊盘240。接着，焊盘240通过以导电材料345填充图案孔343来形成。
接着，如在图5(f)中所描绘，堆叠用于公连接组件210的绝缘组件210。用于焊盘250的金属层306可能被堆叠在绝缘组件210上，且自那以后，可另外包含通孔加工及用于其电连接的电镀工艺等。
接着，如在图5(g)中所描绘，公连接结构通过光刻工艺对金属板301及金属层306进行图案化以形成弹性片230及焊盘250并去除干膜302、303及304而完成。
图1为描绘根据本发明的电连接结构的各种形状的示意图。
图1描绘安装在印刷电路板10上的各种形状的电连接结构A至D作为示例。在是使用制造印刷电路板的方法来制造电连接结构的情况下，母连接组件110或公连接组件210可被制造为各种形状，且因此，其设计可轻易地被改变。因此，可增加安装位置的自由度且可增加空间使用率。
举例来说，能够设计避免螺丝孔15的布置位置的结构D。
另外，优点在于内导体120或柱体220可设置在如通过在图1中的结构A的放大图描绘的各种形状的母连接组件110或公连接组件210中。
关于前述本发明的电连接结构及其制造方法可被应用于各种领域，例如用于电连接的连接器、半导体封装组合件、倒装芯片的相互连接结构、多层陶瓷电容器(MLCC)的电容器的相互连接结构及其他组件(或基板)等。
同时，前述的电连接结构及其制造方法不限于的前述实施例的构造及方法，而实施例的各种改变可通过选择性地结合各实施例的全部或一部分来进行，且各种改变可由所属技术领域的普通技术人员在不脱离本发明的精神及范围下进行。

Claims (9)

1.一种用于制造电连接结构的方法，所述电连接结构包含母连接结构和公连接结构，所述母连接结构具有位于母连接组件的插入孔中的内导体，且所述公连接结构具有从公连接组件突出形成且导电的柱体，所述柱体被插入固定于所述插入孔中以接触所述内导体，所述方法包括：
准备待用于所述母连接组件及所述公连接组件的绝缘组件；以及
通过光刻工艺在所述绝缘组件中的每一者上进行导体的图案化以形成所述内导体及所述柱体。
2.根据权利要求1所述的方法，其中，所述母连接结构的制造包括：
在所述绝缘组件中形成所述插入孔；
在所述绝缘组件上堆叠电极层及第一干膜；
通过光刻工艺在所述第一干膜中形成具有对应于所述插入孔的形状的图案孔；
通过电镀工艺以导电材料填充所述插入孔；以及
通过蚀刻所述插入孔中的所述导电材料来形成所述内导体。
3.根据权利要求2所述的方法，其中，在进行用于形成所述内导体的电镀的同时，电镀用于形成与所述内导体连接的焊盘的结构。
4.根据权利要求1所述的方法，其中，所述公连接结构的制造包括：
在所述绝缘组件上堆叠电极层及第二干膜；
通过光刻工艺在所述第二干膜中形成柱体孔；以及
通过电镀工艺以导电材料填充所述柱体孔来形成所述柱体。
5.根据权利要求4所述的方法，其中，所述公连接结构的制造还包括：
在堆叠所述第二干膜之前在所述绝缘组件的两侧堆叠第三干膜及第四干膜；
通过光刻工艺形成图案孔，以用于在所述第三干膜及所述第四干膜中形成焊盘；以及
通过电镀工艺以导电材料填充所述第三干膜及所述第四干膜中的所述图案孔来形成所述焊盘。
6.根据权利要求4所述的方法，其中，所述公连接结构的制造还包括：
堆叠第五干膜以覆盖所述柱体；
通过光刻工艺在所述第五干膜中形成具有对应于弹性片的形状的图案孔；以及
通过电镀工艺以导电材料填充所述第五干膜中的所述图案孔来形成所述弹性片。
7.根据权利要求4所述的方法，其中，所述公连接结构的制造还包括：
在所述柱体上堆叠另外制造的弹性片。
8.一种用于制造电连接结构的方法，所述电连接结构包含母连接结构和公连接结构，所述母连接结构具有位于母连接组件的插入孔中的内导体，且所述公连接结构具有从公连接组件突出形成且导电的柱体，所述柱体具有弹性片且被插入固定于所述插入孔中以接触所述内导体，
其中，所述公连接结构的制造包括：
准备待用于所述弹性片的金属板；
通过光刻工艺及镀层工艺在所述金属板上形成所述柱体；以及
在所述柱体上堆叠待用于所述公连接组件的绝缘组件。
9.根据权利要求1-8中任一项所述的方法，其中，所述母连接组件或所述公连接组件包含以下中的至少一者：有源器件、无源器件、用于电连接的连接器、半导体芯片封装、应用于半导体封装的中介层、具有三维多层结构的半导体芯片和封装、以及多层陶瓷电容器。
CN201580074096.9A 2015-01-22 2015-03-20 用于制造电互连结构的方法 Pending CN107210554A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1020150010482A KR101689547B1 (ko) 2015-01-22 2015-01-22 전기 접속 구조의 제조 방법
KR10-2015-0010482 2015-01-22
PCT/KR2015/002753 WO2016117761A1 (ko) 2015-01-22 2015-03-20 전기 접속 구조의 제조 방법

Publications (1)

Publication Number Publication Date
CN107210554A true CN107210554A (zh) 2017-09-26

Family

ID=56417277

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580074096.9A Pending CN107210554A (zh) 2015-01-22 2015-03-20 用于制造电互连结构的方法

Country Status (6)

Country Link
US (1) US20180013251A1 (zh)
JP (1) JP2018512694A (zh)
KR (1) KR101689547B1 (zh)
CN (1) CN107210554A (zh)
TW (1) TW201640973A (zh)
WO (1) WO2016117761A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117452734A (zh) * 2023-12-26 2024-01-26 东莞市钜欣电子有限公司 一种电致变色膜、摄像模组及电子设备

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110999550B (zh) 2017-08-14 2023-07-18 索尼公司 电子组件模块、其制造方法、内窥镜装置和移动相机
KR102421521B1 (ko) * 2018-01-31 2022-07-15 삼성전자주식회사 적층 구조의 커넥터를 포함하는 전자 장치
CN112956283A (zh) 2018-08-22 2021-06-11 液态电线公司 具有可变形导体的结构
CN110228091A (zh) * 2019-05-31 2019-09-13 四川省银丰食品有限公司 一种米粉自动化送料剪切系统
CN115696888A (zh) 2021-07-22 2023-02-03 启碁科技股份有限公司 屏蔽结构及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1119402A (zh) * 1994-03-07 1996-03-27 国际商业机器公司 用于和导电部件电耦合的双基板封装组件
US6218203B1 (en) * 1999-06-28 2001-04-17 Advantest Corp. Method of producing a contact structure
US20090061656A1 (en) * 2006-01-26 2009-03-05 Matsushita Electric Works, Ltd. Board-to-board connector

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW407386B (en) * 1998-01-05 2000-10-01 Jaybis Co Ltd Multiple cores substrate and pair substrate connector
US6031282A (en) * 1998-08-27 2000-02-29 Advantest Corp. High performance integrated circuit chip package
JP4061117B2 (ja) * 2002-04-30 2008-03-12 モレックス インコーポレーテッド 基板接続用コネクタ
JP4936457B2 (ja) * 2007-04-24 2012-05-23 パナソニック株式会社 バンプ構造体およびその製造方法
JP5030218B2 (ja) * 2007-07-10 2012-09-19 矢崎総業株式会社 プレスフィット端子
JP2010033714A (ja) * 2008-07-24 2010-02-12 Kyocera Elco Corp コネクタ
JP5366706B2 (ja) * 2009-08-24 2013-12-11 パナソニック株式会社 基板接続用雌側コネクタ及びそれを含むコネクタアッセンブリー
JP5908225B2 (ja) 2011-07-06 2016-04-26 第一電子工業株式会社 電気コネクタ
JP5781991B2 (ja) * 2012-08-07 2015-09-24 京セラコネクタプロダクツ株式会社 コネクタ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1119402A (zh) * 1994-03-07 1996-03-27 国际商业机器公司 用于和导电部件电耦合的双基板封装组件
US6218203B1 (en) * 1999-06-28 2001-04-17 Advantest Corp. Method of producing a contact structure
US20090061656A1 (en) * 2006-01-26 2009-03-05 Matsushita Electric Works, Ltd. Board-to-board connector

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117452734A (zh) * 2023-12-26 2024-01-26 东莞市钜欣电子有限公司 一种电致变色膜、摄像模组及电子设备
CN117452734B (zh) * 2023-12-26 2024-03-26 东莞市钜欣电子有限公司 一种电致变色膜、摄像模组及电子设备

Also Published As

Publication number Publication date
KR101689547B1 (ko) 2016-12-26
JP2018512694A (ja) 2018-05-17
KR20160090549A (ko) 2016-08-01
US20180013251A1 (en) 2018-01-11
TW201640973A (zh) 2016-11-16
WO2016117761A1 (ko) 2016-07-28

Similar Documents

Publication Publication Date Title
CN107210554A (zh) 用于制造电互连结构的方法
CN105261606B (zh) 无核心层封装基板的制法
CN105405835B (zh) 中介基板及其制法
CN204905477U (zh) 电子设备
CN102119588B (zh) 元器件内置模块的制造方法及元器件内置模块
TW201810443A (zh) 連接電子組件至基板
CN108617089B (zh) 内埋元件柔性电路板及其制造方法
CN105304584B (zh) 中介基板及其制造方法
US6815249B2 (en) Surface-mount device and method for manufacturing the surface-mount device
CN106165550B (zh) 基于pcb的连接器装置
CN105097571A (zh) 芯片封装方法及封装组件
CN104241231B (zh) 芯片封装基板的制作方法
CN103633058A (zh) 封装组件及其制造方法
CN104103531A (zh) 封装结构及其制作方法
TWI565381B (zh) 具有電子元件之基板結構與製造具有電子元件之基板結構之方法
CN109413836A (zh) 电路板及其制备方法
CN105762131A (zh) 封装结构及其制法
CN105679738A (zh) 片式整流元件及其生产工艺
JP2006294527A (ja) コネクタ及びその製造方法
CN105323948A (zh) 中介基板及其制造方法
CN103839842A (zh) 用于制造电子元件的方法
CN103857204A (zh) 承载板及其制作方法
CN107210553A (zh) 可接合电互连结构及包含其的电子装置
KR20170124769A (ko) 전자 소자 모듈 및 그 제조 방법
CN105990329A (zh) 半导体装置及其制造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20170926