CN106793515A - A kind of buried via hole lamination process method of printed circuit board (PCB) - Google Patents
A kind of buried via hole lamination process method of printed circuit board (PCB) Download PDFInfo
- Publication number
- CN106793515A CN106793515A CN201611239689.9A CN201611239689A CN106793515A CN 106793515 A CN106793515 A CN 106793515A CN 201611239689 A CN201611239689 A CN 201611239689A CN 106793515 A CN106793515 A CN 106793515A
- Authority
- CN
- China
- Prior art keywords
- consent
- printed circuit
- pcb
- circuit board
- half tone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
A kind of buried via hole lamination process method of printed circuit board (PCB) disclosed by the invention, a kind of buried via hole lamination process method of printed circuit board (PCB), comprises the following steps：Preceding processing procedure operation → plating copper process → inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin operation → pressing working procedure → rear processing procedure operation.The beneficial effects of the present invention are：Avoid that the pcb board medium thickness that is triggered using film gummosis consent completely is not enough, plate face depression causes that etching is difficult, consent deficiency causes bubble expanded by heating in hole to cause the situations such as layering, simplify production procedure, on the premise of product quality is ensured, so that Product Process is simplified, that shortens printed circuit board (PCB) manufactures the time, production cost is reduced, economic benefit is increased to a certain extent.
Description
Technical field
The present invention relates to the circuit surface processing technology field of printed circuit board (PCB), more particularly to a kind of printing electricity
The buried via hole lamination process method of road plate.
Background technology
With the progress and development of science and technology, to the manufacture precision requirement more and more higher of printed circuit board (PCB), to printing
The line requirements of circuit board are also more and more intensive, and the number of plies of printed circuit board (PCB) is also being constantly increasing.In adding for printed circuit board (PCB)
During work, because the design of product structure needs, thus the design that often there is multilayer interaction series connection one will produce
Need to be turned between multiple-plate internal layer two-layer or multilayer, need on a printed circuit carry out machine drilling operation, print
Circuit board will carry out filler treatment in pressing to the hole position that machine drilling is produced.
The current hole position to printed circuit board (PCB) carries out filler treatment two ways, and one kind is film filler mode, specifically
Flow is：Preceding processing procedure → copper facing → inner figure making → internal layer AOI maintenance → surface treatment → pressing → rear processing procedures.Work as buried via hole
Aperture is larger or during aspect ratio higher, it is necessary to which a large amount of resins are filled, now, due in excessive glue ostium in film, leading
There are problems that pressing depression, medium thickness, the system of extreme influence outer graphics caused by glue amount is not enough at pore mouthful
Make and production yield；In addition, when filler deficiency in hole, when bubble cavity is left in hole, existing and be greatly laminated by thermally stratified layer
Risk.
Another kind is consent mode after plating, and idiographic flow is：Preceding processing procedure → copper facing → filling holes with resin → baking → resin
Grinding → appearance test → inner figure making → internal layer AOI maintenance → surface treatment → pressing → rear processing procedures.After this plating
The filler mode of consent can avoid the defect of above-mentioned pressing starved depression, but increased the technique stream of grind resin and high-temperature baking
Journey, processing procedure is complicated, corresponding to increase production hour and production cost, and printed circuit plate face copper has the wind for subtracting copper during simultaneous grinding
Danger.
Therefore, applicant carried out beneficial exploration and trial, have found result of the above problems, will be detailed below being situated between
The technical scheme for continuing is produced under this background.
The content of the invention
The technical problems to be solved by the invention：Filler handling process is carried out for the existing hole position to printed circuit board (PCB)
The deficiency of presence and a kind of buried via hole lamination process method of printed circuit board (PCB) is provided.
Technical problem solved by the invention can be realized using following technical scheme：
A kind of buried via hole lamination process method of printed circuit board (PCB), comprises the following steps：Preceding processing procedure operation → plating copper process →
Inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin operation → pressing working procedure → rear system
Journey operation, wherein, filling holes with resin operation includes following sub-step：
Step 1, the consent figure according to printed circuit board (PCB) makes consent egative film, at the jack position of printed circuit board (PCB) pair
Answer egative film position for black catch point, according to consent negative film making consent half tone, the consent half tone is relative to printed circuit board (PCB)
The pin hole for printing-ink is offered at jack position；
Step 2, obtained consent half tone is placed on oblique lamp desktop and is compared with consent egative film, at the printing opacity of consent half tone pair
Then should be abnormal pin hole when at its printing opacity corresponding on consent egative film without black catch point in the black catch point on consent egative film, adopt
These abnormal pin holes are filled with glue；
Step 3, consent half tone obtained in step 2 is fixed on the support of printing machine, and carry out contraposition adjustment so that plug
The pin hole position of hole pattern version corresponds at the jack position of printed circuit board (PCB))；
Step 4, printed circuit board surface is covered in by consent half tone, and pin hole position corresponds to the consent position of printed circuit board (PCB)
Put, ink is filled in the hole at printed circuit board (PCB) jack position by the pin hole position of consent half tone；
Step 5, the printed circuit board (PCB) that will be printed is toasted so that printing ink solidification on a printed circuit.
As a result of technical scheme as above, the beneficial effects of the present invention are：Processing method of the invention is in plate
Filling holes with resin is used before being laminated after the surface treatment of face, it is to avoid the pcb board dielectric layer that is triggered using film gummosis consent completely
Thickness is not enough, plate face depression causes that etching is difficult, consent deficiency causes bubble expanded by heating in hole to cause the situations such as layering.With electricity
The filler mode of consent is compared after plating, simplifies production procedure, on the premise of product quality is ensured so that Product Process is simple
Change, that shortens printed circuit board (PCB) manufactures the time, reduces production cost, and economic benefit is increased to a certain extent.
Specific embodiment
In order that technological means, creation characteristic, reached purpose and effect that the present invention is realized are easy to understand, further
Illustrate the present invention.
A kind of buried via hole lamination process method of printed circuit board (PCB), comprises the following steps：Preceding processing procedure operation → plating copper process →
Inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin operation → pressing working procedure → rear system
Journey operation.The particular content of each step is as follows：
Preceding processing procedure operation：Substrate blanking → machine drilling.
Plating copper process：Copper facing on the hole wall of machine drilling on a printed circuit, for printed circuit board (PCB), each layer is not led
It is logical.
Inner figure production process：Dry film is covered on printed circuit board (PCB), by image transfer, inner line figure is shifted
To printed circuit board (PCB) dry film, then the dry film outside figure is dissolved by chemical medicinal liquid, printed circuit board (PCB) etching, by printing electricity
The dry film removal of covering on the plate of road.
Internal layer AOI overhaul process：Figure after printed circuit board (PCB) is etched is compared with customer profile finds out difference.To difference
Point is overhauled or is scrapped treatment.
Surface treatment procedure：Copper face to printed circuit board circuitry patterned surface carries out brown or Darkening process, makes lamination
Copper face is stronger with PP film adhesions afterwards, prevents layering.
Filling holes with resin operation includes following sub-step：
Step 1, the consent figure according to printed circuit board (PCB) makes consent egative film, at the jack position of printed circuit board (PCB) pair
Answer egative film position for black catch point, according to consent negative film making consent half tone, the consent half tone is relative to printed circuit board (PCB)
The pin hole for printing-ink is offered at jack position；
Step 2, obtained consent half tone is placed on oblique lamp desktop and is compared with consent egative film, at the printing opacity of consent half tone pair
Then should be abnormal pin hole when at its printing opacity corresponding on consent egative film without black catch point in the black catch point on consent egative film, adopt
These abnormal pin holes are filled with glue；
Step 3, consent half tone obtained in step 2 is fixed on the support of printing machine, and carry out contraposition adjustment so that plug
The pin hole position of hole pattern version corresponds at the jack position of printed circuit board (PCB))；
Step 4, printed circuit board surface is covered in by consent half tone, and pin hole position corresponds to the consent position of printed circuit board (PCB)
Put, ink is filled in the hole at printed circuit board (PCB) jack position by the pin hole position of consent half tone；
Step 5, the printed circuit board (PCB) that will be printed is toasted so that printing ink solidification on a printed circuit.
Pressing working procedure：Printed substrate positive and negative pad PP films after consent is toasted, then Copper Foil is spread on the outside of PP films,
Printed substrate, PP films, Copper Foil are combined together by pressing, the purpose of printed substrate once layer is reached.
Processing procedure operation afterwards：Cutting edge → machine drilling → plating after pressing → outer graphics making → outer layer AOI maintenance → outer
The anti-welding making of layer → outer layer PCB surface treatment → cutting plate shaping.
General principle of the invention and principal character and advantages of the present invention has been shown and described above.The technology of the industry
Personnel it should be appreciated that the present invention is not limited to the above embodiments, simply explanation described in above-described embodiment and specification this
The principle of invention, without departing from the spirit and scope of the present invention, various changes and modifications of the present invention are possible, these changes
Change and improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention by appending claims and its
Equivalent thereof.
Claims (1)
1. a kind of buried via hole lamination process method of printed circuit board (PCB), it is characterised in that comprise the following steps：Preceding processing procedure operation → plating
Copper process → inner figure production process → internal layer AOI overhaul process → surface treatment procedure → filling holes with resin operation → pressing work
Sequence → rear processing procedure operation, wherein, filling holes with resin operation includes following sub-step：
Step 1, the consent figure according to printed circuit board (PCB) makes consent egative film, correspondence bottom at the jack position of printed circuit board (PCB)
Piece position is black catch point, according to consent negative film making consent half tone, consent of the consent half tone relative to printed circuit board (PCB)
The pin hole for printing-ink is offered at position；
Step 2, obtained consent half tone is placed on oblique lamp desktop and is compared with consent egative film, is corresponded at the printing opacity of consent half tone
Black catch point on consent egative film, is then abnormal pin hole, using water when at its printing opacity corresponding on consent egative film without black catch point
Glue fills these abnormal pin holes；
Step 3, consent half tone obtained in step 2 is fixed on the support of printing machine, and carry out contraposition adjustment so that consent net
The pin hole position of version corresponds at the jack position of printed circuit board (PCB))；
Step 4, printed circuit board surface is covered in by consent half tone, and pin hole position corresponds to the jack position of printed circuit board (PCB),
Ink is filled in the hole at printed circuit board (PCB) jack position by the pin hole position of consent half tone；
Step 5, the printed circuit board (PCB) that will be printed is toasted so that printing ink solidification on a printed circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611239689.9A CN106793515B (en) | 2016-12-28 | 2016-12-28 | A kind of buried via hole lamination process method of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611239689.9A CN106793515B (en) | 2016-12-28 | 2016-12-28 | A kind of buried via hole lamination process method of printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106793515A true CN106793515A (en) | 2017-05-31 |
| CN106793515B CN106793515B (en) | 2019-05-14 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611239689.9A Active CN106793515B (en) | 2016-12-28 | 2016-12-28 | A kind of buried via hole lamination process method of printed circuit board |
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| CN (1) | CN106793515B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108808263A (en) * | 2018-06-05 | 2018-11-13 | 成都赛康宇通科技有限公司 | A kind of suction wave layer and preparation process for antenna |
| CN109605919A (en) * | 2018-12-29 | 2019-04-12 | 江苏日托光伏科技股份有限公司 | A kind of printing process of brush coating halftone and MWT photovoltaic module conducting resinl |
| CN111315145A (en) * | 2020-04-20 | 2020-06-19 | 深圳市汇和精密电路有限公司 | Lamination process for multilayer PCB |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000025559A1 (en) * | 1998-10-26 | 2000-05-04 | Telefonaktiebolaget Lm Ericsson | Method for manufacturing a circuit board |
| CN1277797A (en) * | 1998-10-07 | 2000-12-20 | 松下电器产业株式会社 | Manufacturing method of circuit board, manufacturing apparatus for it, and porous sheet used in it |
| CN104883827A (en) * | 2015-06-05 | 2015-09-02 | 成都航天通信设备有限责任公司 | Manufacturing process for plugging conductive holes of circuit board with resin |
| CN105101661A (en) * | 2014-05-21 | 2015-11-25 | 深圳崇达多层线路板有限公司 | Manufacturing method of printed circuit board ink plug hole |
-
2016
- 2016-12-28 CN CN201611239689.9A patent/CN106793515B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1277797A (en) * | 1998-10-07 | 2000-12-20 | 松下电器产业株式会社 | Manufacturing method of circuit board, manufacturing apparatus for it, and porous sheet used in it |
| WO2000025559A1 (en) * | 1998-10-26 | 2000-05-04 | Telefonaktiebolaget Lm Ericsson | Method for manufacturing a circuit board |
| CN105101661A (en) * | 2014-05-21 | 2015-11-25 | 深圳崇达多层线路板有限公司 | Manufacturing method of printed circuit board ink plug hole |
| CN104883827A (en) * | 2015-06-05 | 2015-09-02 | 成都航天通信设备有限责任公司 | Manufacturing process for plugging conductive holes of circuit board with resin |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108808263A (en) * | 2018-06-05 | 2018-11-13 | 成都赛康宇通科技有限公司 | A kind of suction wave layer and preparation process for antenna |
| CN109605919A (en) * | 2018-12-29 | 2019-04-12 | 江苏日托光伏科技股份有限公司 | A kind of printing process of brush coating halftone and MWT photovoltaic module conducting resinl |
| CN111315145A (en) * | 2020-04-20 | 2020-06-19 | 深圳市汇和精密电路有限公司 | Lamination process for multilayer PCB |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106793515B (en) | 2019-05-14 |
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Effective date of registration: 20200618 Address after: No.99, hope Avenue, high tech Zone, Nantong City, Jiangsu Province, 226300 Patentee after: Shanghai Zhanhua Electronics (Nantong) Co., Ltd Address before: 201702 Shanghai city Qingpu District Xujing town industrial area west Huqingping No. 1750 Patentee before: SHANGHAI UNITECH ELECTRONICS Co.,Ltd. |