CN1065659C - 具有热沉的平板型半导体封装 - Google Patents

具有热沉的平板型半导体封装 Download PDF

Info

Publication number
CN1065659C
CN1065659C CN96114083A CN96114083A CN1065659C CN 1065659 C CN1065659 C CN 1065659C CN 96114083 A CN96114083 A CN 96114083A CN 96114083 A CN96114083 A CN 96114083A CN 1065659 C CN1065659 C CN 1065659C
Authority
CN
China
Prior art keywords
heat sink
flat board
encapsulation
lead
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN96114083A
Other languages
English (en)
Chinese (zh)
Other versions
CN1156903A (zh
Inventor
金善东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MagnaChip Semiconductor Ltd
Original Assignee
LG Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Semicon Co Ltd filed Critical LG Semicon Co Ltd
Publication of CN1156903A publication Critical patent/CN1156903A/zh
Application granted granted Critical
Publication of CN1065659C publication Critical patent/CN1065659C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4871Bases, plates or heatsinks
    • H01L21/4882Assembly of heatsink parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
CN96114083A 1995-12-29 1996-12-26 具有热沉的平板型半导体封装 Expired - Lifetime CN1065659C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019950067332A KR100206880B1 (ko) 1995-12-29 1995-12-29 히트싱크가 부착된 컬럼형 패키지
KR67332/1995 1995-12-29

Publications (2)

Publication Number Publication Date
CN1156903A CN1156903A (zh) 1997-08-13
CN1065659C true CN1065659C (zh) 2001-05-09

Family

ID=19447659

Family Applications (1)

Application Number Title Priority Date Filing Date
CN96114083A Expired - Lifetime CN1065659C (zh) 1995-12-29 1996-12-26 具有热沉的平板型半导体封装

Country Status (3)

Country Link
JP (1) JP2819282B2 (ja)
KR (1) KR100206880B1 (ja)
CN (1) CN1065659C (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7265167B2 (en) 2002-11-12 2007-09-04 Nitto Denko Corporation Epoxy resin composition for semiconductor encapsulation, and semiconductor device using the same

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI233188B (en) 2003-10-07 2005-05-21 United Microelectronics Corp Quad flat no-lead package structure and manufacturing method thereof
CN100369241C (zh) * 2003-10-13 2008-02-13 联华电子股份有限公司 四方扁平无接脚型态的晶片封装结构及其工艺
CN102437824B (zh) * 2011-12-05 2015-03-11 北京大学 一种直冷式高集成度电荷灵敏前置放大器
CN105914191B (zh) * 2016-06-20 2018-03-16 深圳市宏钢机械设备有限公司 一种水冷散热的集成电路封装

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0545007A1 (en) * 1991-11-29 1993-06-09 STMicroelectronics S.r.l. A semiconductor device structure having a heat-sink and a plastics body, and highly reliable means of electrical connection to the heat-sink

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2612455B2 (ja) * 1987-09-30 1997-05-21 イビデン株式会社 半導体素子搭載用基板

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0545007A1 (en) * 1991-11-29 1993-06-09 STMicroelectronics S.r.l. A semiconductor device structure having a heat-sink and a plastics body, and highly reliable means of electrical connection to the heat-sink

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7265167B2 (en) 2002-11-12 2007-09-04 Nitto Denko Corporation Epoxy resin composition for semiconductor encapsulation, and semiconductor device using the same

Also Published As

Publication number Publication date
JP2819282B2 (ja) 1998-10-30
KR970053677A (ko) 1997-07-31
CN1156903A (zh) 1997-08-13
JPH09186273A (ja) 1997-07-15
KR100206880B1 (ko) 1999-07-01

Similar Documents

Publication Publication Date Title
CN101847584B (zh) 基于引线框架的快闪存储器卡的制造方法
US5703407A (en) Resin-sealed type semiconductor device
CN100350601C (zh) 多行引线框架
KR20090033141A (ko) 리드프레임 어레이를 구비하는 집적회로 패키지 시스템
US20090096081A1 (en) Semiconductor device
CN101341586A (zh) 制造快闪存储器卡的方法
EP0687007A2 (en) Electronic surface mount device and method for making
US4763407A (en) Method of manufacturing a semiconductor device
CN1065659C (zh) 具有热沉的平板型半导体封装
CN1068457C (zh) 隐埋引线式芯片封装
JP2005142554A (ja) リードフレーム及びこれを適用した半導体パッケージの製造方法
US5548087A (en) Molded plastic packaging of electronic devices
CN101989581B (zh) 封装结构与封装方法
KR20040037575A (ko) 사선형 에칭부를 갖는 엠.엘.피(mlp)형 반도체 패키지
CN1180478C (zh) 集成电路的平面化塑料封装模块
US6891254B2 (en) Semiconductor device with protrusions
CN100336209C (zh) 混合集成电路装置的制造方法
US7662661B2 (en) Method of manufacturing a substrate structure for increasing cutting precision and strength thereof
US8957509B2 (en) Integrated circuit packaging system with thermal emission and method of manufacture thereof
CN217334014U (zh) 半导体器件
KR20040034313A (ko) 반도체장치 및 그 제조방법
JP4907373B2 (ja) 電子部品
KR100481927B1 (ko) 반도체패키지및그제조방법
US6324756B1 (en) Method and system for sealing the edge of a PBGA package
US5905300A (en) Reinforced leadframe to substrate attachment

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C14 Grant of patent or utility model
FG4A Grant of patent
GR01 Patent grant
C56 Change in the name or address of the patentee

Owner name: HYNIX SEMICONDUCTOR INC.

Free format text: FORMER NAME OR ADDRESS: LG SEMICON CO., LTD.

CP03 Change of name, title or address

Address after: North Chungcheong Province

Patentee after: Hairyoksa Semiconductor Co., Ltd.

Address before: North Chungcheong Province

Patentee before: LG Semicon Co., Ltd.

ASS Succession or assignment of patent right

Owner name: MAGNACHIP CO., LTD.

Free format text: FORMER OWNER: HYNIX SEMICONDUCTOR INC.

Effective date: 20070601

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20070601

Address after: North Chungcheong Province

Patentee after: Magnachip Semiconductor Ltd.

Address before: North Chungcheong Province

Patentee before: Hairyoksa Semiconductor Co., Ltd.

CX01 Expiry of patent term

Granted publication date: 20010509

EXPY Termination of patent right or utility model