CN106548996A - 具有锯齿形边缘的伪金属 - Google Patents
具有锯齿形边缘的伪金属 Download PDFInfo
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- CN106548996A CN106548996A CN201610609240.0A CN201610609240A CN106548996A CN 106548996 A CN106548996 A CN 106548996A CN 201610609240 A CN201610609240 A CN 201610609240A CN 106548996 A CN106548996 A CN 106548996A
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- metallic plate
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Abstract
本发明涉及一种结构,包括:金属焊盘、具有覆盖金属焊盘的边缘部分的部分的钝化层和在钝化层上方的伪金属板。伪金属板中具有多个贯穿开口。伪金属板具有锯齿形边缘。介电层具有在伪金属板上面的第一部分、填充多个第一贯穿开口的第二部分和接触第一锯齿形边缘的第三部分。本发明的实施例还涉及具有锯齿形边缘的伪金属。
Description
技术领域
本发明的实施例涉及集成电路器件,更具体地,涉及具有锯齿形边缘的伪金属。
背景技术
在集成电路的形成中,诸如晶体管的器件形成在晶圆中的半导体衬底的表面处。然后互连结构形成在集成电路器件的上方。金属焊盘形成在互连结构的上方并且与互连结构电连接。钝化层和第一聚合物层形成在金属焊盘上方,金属焊盘通过钝化层和第一聚合物中的开口被暴露。
然后形成后钝化互连件(PPI),之后在PPI上方形成第二聚合物层。延伸进入第二聚合物层中的开口形成凸块下金属件(UBM),其中UBM与PPI电连接。焊料球然后被放置在UBM上方并且被回流。
发明内容
本发明的实施例提供了一种结构,包括:金属焊盘;钝化层,具有覆盖所述金属焊盘的边缘部分的部分;第一伪金属板,位于所述钝化层上方,其中所述第一伪金属板中具有多个第一贯穿开口,并且所述第一伪金属板包括第一锯齿形边缘;以及介电层,包括:位于所述第一伪金属板上面的第一部分;填充所述多个第一贯穿开口的第二部分;和接触所述第一锯齿形边缘的第三部分。
本发明的另一实施例提供了一种结构,包括:第一伪金属板,包括:交替定位的多个第一凸起和多个第一凹槽;第二伪金属板,包括:交替定位的多个第二凸起和多个第二凹槽;以及聚合物条,将所述第一伪金属板和所述第二伪金属板分开,其中所述聚合物条的相对边缘接触所述第一伪金属板和所述第二伪金属板。
本发明的又一实施例提供了一种结构,包括:管芯,包括:第一伪金属板,包括位于第一交替的布局中的多个第一凸起和多个第一凹槽;第二伪金属板,完全环绕所述第一伪金属板,其中所述第二伪金属板包括位于第二交替布局中的多个第二凸起和多个第二凹槽,其中所述多个第一凸起延伸进入所述多个第二凹槽的相应的一个,并且所述多个第二凸起延伸进入所述多个第一凹槽的相应的一个;以及介电层,将所述第一伪金属板与所述第二伪金属板分开。
附图说明
当结合附图进行阅读时,根据下面详细的描述可以最佳地理解本发明的各个方面。应该注意,根据工业中的标准实践,各种部件没有被按比例绘制。实际上,为了清楚的讨论,各种部件的尺寸可以被任意增加或减少。
图1示出了根据一些示例性实施例的晶圆的一部分的截面图,其中根据一些实施例晶圆包括具有伪金属板的后钝化互连件(PPI)。
图2到图6是根据一些实施例的伪金属板的顶视图。
图7和图8示出了根据一些实施例的在整个芯片中伪金属板的顶视图。
图9示出了带锯齿形边缘的大伪金属板和带平滑边缘的小伪金属板的顶视图。
具体实施方式
以下公开内容提供了多种不同实施例或实例,以实现本发明的不同特征。以下将描述组件和布置的具体实例以简化本发明。当然,这些仅是实例并且不意欲限制本发明。例如,在以下描述中,在第二部件上方或上形成第一部件可以包括第一部件和第二部件直接接触的实施例,也可以包括形成在第一部件和第二部件之间的附加部件使得第一部件和第二部件不直接接触的实施例。而且,本发明在各个实例中可以重复参考数字和/或字母。这种重复仅是为了简明和清楚,其自身并不表示所论述的各个实施例和/或配置之间的关系。
此外,在此可使用诸如“在...之下”、“在...下面”、“下面的”、“在...上面”、以及“上面的”等的空间关系术语,以容易的描述如图中所示的一个元件或部件与另一元件(多个元件)或部件(多个部件)的关系。除了图中所示的方位外,空间关系术语旨在包括器件在使用或操作过程中的不同方位。装置可以以其他方式定位(旋转90度或在其他方位),并且在本文中使用的空间关系描述符可以同样地作相应地解释。
根据各个示例性实施例提供了在管芯(或晶圆)的再分布层中的伪金属。讨论了一些实施例的变化。贯穿各个附图和说明性的实施例,相同的参考标号用于指定相同的元件。
图1示出了封装组件2的截面图。根据本发明的一些实施例,封装组件2是包括诸如晶体管和/或二极管的有源器件和诸如电容器、电感器、电阻等的可能的无源器件的器件晶圆。根据本发明的可选实施例,封装组件2是内插器晶圆,其可以或可以不包括有源器件和/或无源器件。根据本发明的又一个实施例,封装组件2是封装衬底带,其中包括无芯的封装衬底或有芯的封装衬底。在随后的讨论中,示例性封装组件2作为器件晶圆讨论。本发明内容的教导也可以适用于内插器晶圆、封装衬底等。
根据本发明的一些实施例,示例性晶圆2包括半导体衬底20和在半导体衬底20的顶面处形成的部件。半导体衬底20可以包括晶体硅、晶体锗、硅锗、和/或诸如GaAsP、AlInAs、AlGaAs、GaInAs、GaInP、GaInAsP等的第III-V族化合物半导体。半导体衬底20也可以是块状硅衬底或绝缘体上硅(SOI)衬底。浅沟槽隔离(STI)区域(未示出)可以形成在半导体衬底20中以隔离半导体衬底20中的有源区域。尽管没有示出,贯穿孔可以被形成以延伸进入半导体衬底20,其中贯穿孔用于电互连晶圆2的相对侧上的部件。
根据本发明的一些实施例,晶圆2包括形成在半导体衬底20的顶面上的集成电路器件22。示例性集成电路器件22包括互补金属氧化物半导体(CMOS)晶体管、电阻器、电容器、二极管等。在此未示出集成电路器件22的细节。根据可选的实施例,晶圆2用于形成内插器,其中衬底20可以是半导体衬底或介电衬底。
层间电介质(ILD)24形成在半导体衬底20上方并且填充集成电路器件22中的晶体管(未示出)的栅极堆叠件之间的间隔。在一些示例性实施例中,ILD 24包括磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、掺杂硼的磷硅酸盐玻璃(BPSG)、掺杂氟的硅酸盐玻璃(FSG)、正硅酸乙酯(TEOS)等。可以使用旋涂、可流动化学汽相沉积(FCVD)等形成ILD 24。根据本发明的可选实施例,使用诸如等离子体增强化学汽相沉积(PECVD)、低压化学汽相沉积(LPCVD)等的沉积方法形成ILD 24。
在ILD 24中形成接触插塞28,并且接触插塞28用于将集成电路器件22电连接至上面的金属线和通孔。根据本发明的一些实施例,接触插塞28由选自钨、铝、铜、钛、钽、氮化钛、氮化钽、它们的合金和/或它们的多层的导电材料形成。接触插塞28的形成可以包括:在ILD 24中形成接触开口,在接触开口中填充导电材料,以及实施平坦化(诸如化学机械抛光(CMP))以使接触插塞28的顶面和ILD 24的顶面齐平。
在ILD和接触插塞28上方是互连结构30。互连结构30包括形成在介电层32中的金属线34和通孔36。下文中将位于同一层级的金属线的组合称为金属层。根据本发明的一些实施例,互连结构30包括通过通孔36互连的多个金属线。金属线34和通孔36可以由铜或铜合金形成,并且它们也可以由其他金属形成。根据本发明的一些实施例,介电层32由低k介电材料形成。低k介电材料的介电常数(k值)例如可以小于约3.0或小于约2.5。
下文介电层32可选地称为金属间介电(IMD)层32。根据本发明的一些实施例,IMD层32由介电常数(k值)低于约3.0、低于约2.5或甚至更低的低k介电材料形成。IMD层32可以包括Black Diamond(应用材料公司的注册商标)、含碳低k介电材料、氢倍半硅氧烷(HSQ)、甲基倍半硅氧烷(MSQ)等。IMD层32也可以具有可以小于约3.0、2.5或2.0的低k值。根据本发明的一些实施例,IMD层32的形成包括沉积含致孔剂的介电材料以及然后实施固化工艺以驱除致孔剂,并且因此剩余的IMD层32是多孔的。
在IMD层32中形成金属线34和通孔36。形成工艺可以包括单镶嵌和双镶嵌工艺。在示例性的单镶嵌工艺中,首先在IMD层32的一个中形成沟槽,之后用导电材料填充沟槽。然后执行诸如CMP的平坦化以去除导电材料的比IMD层的顶面高的多余部分,在沟槽中留下金属线。在双镶嵌工艺中,沟槽和通孔开口都形成在IMD层中,通孔开口位于沟槽下面并且连接到沟槽。然后在沟槽和通孔开口中填充导电材料以分别形成金属线和通孔。导电材料可以包括扩散阻挡层和在扩散阻挡层上方的含铜的金属材料,其中扩散阻挡层可以包括钛、氮化钛、钽、氮化钽等。
钝化层40(有时称为钝化-1)可以形成在互连结构30上方,其中通孔44形成在钝化层40中以将金属线34和通孔36与上面的金属焊盘42电连接。
根据一些示例性实施例,金属焊盘42形成在钝化层40上方,并且可以通过钝化层40中的通孔44以及通过金属线34和通孔36与集成电路器件22电连接。金属焊盘42可以是铝焊盘或铝铜焊盘,并且可以使用其他金属材料。
将钝化层46(有时称为钝化-2)形成在钝化层40的上方。钝化层46的一些部分可以覆盖金属焊盘42的边缘部分,并且通过钝化层46中的开口暴露金属焊盘42的中心部分。每个钝化层40和46可以是单层或复合层,并且可以由非多孔材料形成。根据本发明的一些实施例,钝化层40和46中的一个或两个是包括氧化硅层(未示出)和位于氧化硅层上方的氮化硅层(未示出)的复合层。钝化层40和46也可以由诸如未掺杂的硅酸盐玻璃(USG)、氮氧化硅等的其他非多孔介电材料形成。
聚合物层48形成在钝化层46上方。聚合物层48可以包括聚合物,诸如聚酰亚胺、聚苯并恶唑(PBO)、苯并环丁烯(BCB)等。形成方法可以包括,例如,旋涂。聚合物层48可以以液体形式分配并且然后被固化。
图案化聚合物层48,并且形成PPI50和伪金属板100和200,PPI50和伪金属板100和200包括位于聚合物层48上面的第一部分和延伸进入聚合物层48以与金属焊盘42电连接的第二部分。术语“PPI”表示在钝化层46形成之后形成PPI50。根据本发明的一些实施例,PPI50和伪金属板100和200的形成包括:沉积晶种层(未显示),在晶种层上方形成并图案化掩模层(诸如光刻胶,未示出),并且然后在晶种层上方和在掩模层的开口中镀金属层。晶种层可以包括钛层和在钛层上方的铜层,并且可以采用物理汽相沉积(PVD)沉积。金属层可以由纯铜、基本上纯铜或铜合金形成,并且可以采用镀形成。在金属层的形成之后,去除掩模层。实施蚀刻步骤以去除晶种层的位于去除的掩模层下面的部分。
图1也示出了聚合物层52和凸块下金属件(UBM)54的形成。聚合物层52可以包括聚酰亚胺或其他基于聚合物的材料,诸如PBO或BCB。根据本发明的一些实施例,聚合物层52采用旋涂形成。聚合物层52包括与PPI50重叠的一些部分。
UBM层54形成为与PPI50电连接。根据本发明的一些实施例,每个UBM层54包括阻挡层和在阻挡层上方的金属层(未显示)。UBM层54延伸进入聚合物层52中的开口,并且与PPI50电连接并且与PPI50物理接触。阻挡层可以是钛层、氮化钛层、钽层、氮化钽层或由钛合金或钽合金形成的层。
电连接器56形成在UBM层54上方。根据本发明的一些实施例,电连接器56是金属区域,其是放置在UBM层54上的焊料球或通过镀形成在UBM层54上的非焊料金属柱。在使用了焊料球的实施例中,焊料球可以经过回流工艺以形成焊料区域。根据可选的实施例,电连接器56包括金属柱,其可以是铜柱。额外的层(诸如镍层、焊料帽、钯层等)也可以形成在每个金属柱上。
晶圆2可以切割成多个管芯10,其中每个管芯10包括结构,该结构包括衬底20、互连结构30、金属焊盘42、PPI 50、伪金属板100和200和电连接器56。
图2示出了伪金属焊盘100和200的顶视图。示例性伪金属板100和200也在图1中示出。根据本发明的一些实施例,伪金属板100和200与PPI50同时形成。相应地,伪金属板100和200由与PPI50相同的材料形成。伪金属板100与伪金属板200彼此物理隔开间距C,根据一些实施例,间距C可以大于约10μm。如图1所示,间距C由诸如聚合物层52的介电材料填充。
每个伪金属板100和200是连续的金属焊盘,在每个伪金属板100和200中具有多个开口112。开口112可以具有诸如阵列的重复图案。如图1所示,开口112由诸如聚合物层52的介电材料填充。通过在伪金属板100和200中形成开口112,减小了伪金属板100和200的金属图案密度,并且因此如图1所示的PPI50的形成中,减小了由不均匀金属图案密度造成的图案负载效应。开口112的顶视图形状可以是圆形、矩形、六边形、八边形、椭圆形等。示例性PPI50被例示为被伪金属板100环绕。应该注意,可以有多个被伪金属板100环绕的PPI50,并且也可以有被一个或多个被伪金属板200环绕的PPI50。伪金属板100和200可以电连接至电接地,或可以是电浮置的。根据一些实施例,伪金属板100和200连接至用于通过一些PPI50接地的一个电连接器56(图1)。
伪金属板100具有弯曲(锯齿形)边缘102,并且伪金属板200具有弯曲(锯齿形)边缘202。边缘102和202彼此面对并且可以彼此平行。贯穿描述,当边缘102和202称为彼此平行时,表明边缘102的多个部分与边缘202的最近部分平行。此外,边缘102和202的各部分可以或可以不彼此间隔开均匀的间距C。
根据本发明的一些实施例,边缘102是弯曲的(锯齿形的),而不是长且直的边缘,并且具有短的并且在不同方向(诸如X轴、Y轴或其他方向,如图4至图6中所示)延伸的相邻部分。应该理解,如果伪金属板100和200具有长并且直的边缘,在热循环期间,因为整个长边缘在相同的方向收缩或扩张,收缩和扩张的方向垂直于各个边缘的纵长方向,因此累积的收缩或扩张力可以沿着边缘和接触的介电材料之间的界面导致形成破裂。另一方面,当长且直的边缘被重新设计为具有在不同方向上延伸的短部分时,因为每个部分的收缩或扩张力垂直于各个部分的纵长方向,因为力更小并且在不同方向上。在伪金属板和介电材料的界面处的应力矢量因此是不连续的,并且产生裂缝的可能性降低。
再次参考图2,不管它们的延伸方向,边缘部分被设计成具有小于阈值长度的长度。根据一些示例性实施例,阈值长度为约400μm。实验结果表明,它的所有边缘部分小于约400μm的大金属焊盘在热循环期间将不会具有沿着它们的边缘产生的破裂,而如果形成具有长边缘的大金属焊盘,观察到裂缝。
图2示出了伪金属板100具有突出部分104,并且突出部分104的长度A和宽度D小于诸如400μm的阈值长度。此外,伪金属板100具有凹槽106,并且边缘102的各个部分相对于它的相邻边缘部分是凹进的。凹槽106的长度和宽度也小于阈值长度。类似地,伪金属板200的边缘202也包括多个边缘部分,相邻的边缘部分在不同的方向上延伸。此外,边缘202的边缘部分的长度也小于阈值长度。
弯曲的边缘102和202可以形成锯齿形图案。图2示出了伪金属板100和200的小部分,并且锯齿形图案可以重复。重复的数量取决于边缘102和202的总长度,并且可以是大于1的任意数字。例如,包括凸出部分104和凹槽106的边缘部分可以形成重复的基本单元。凸出部分104和凹槽106可以以交替图案布置。此外,重复图案中的凸出部分104可以具有相同长度和/或相同宽度,并且凹槽106可以具有相同长度和/或相同宽度。
伪金属板200可以有朝向凹槽106凸出的部分204。凸出部分204也可以具有延伸进入凹槽106的部分。类似地,伪金属板100可以具有朝向伪金属板200的凹槽206凸出并且可能延伸进入伪金属板200的凹槽206的凸出部分。
根据本发明的一些实施例,当伪金属焊盘的各个边缘长时,例如,当长度E或F长于400μm时,在这种情况下,应力矢量足够高以破裂电介质(图1中的聚合物48和/或52),采用锯齿形边缘。如果各个边缘已经短,那么边缘可以保持直而不弯曲。例如,图9示出了具有小于长度E的长度E’的伪金属板300,其中长度E’小于阈值长度,其可以小于约400μm。相应地,伪金属板300的边缘保持直,并且不是弯曲的(锯齿形)。
根据本发明的一些实施例,贯穿整个晶圆2和整个管芯10(图1),伪金属板的所有长于阈值长度的直的边缘都是弯曲的,使得贯穿晶圆2(和管芯10)的弯曲边缘的直的部分等于或者小于阈值长度。或者说,在晶圆2中没有伪金属板具有比阈值长度长的直的边缘。为了获得这样的设计,根据本发明的一些实施例的集成电路设计工艺可以包括设计伪金属板的初始图案、预定阈值长度、寻找伪金属板的比阈值长度长的任意边缘,并且修改该设计以将边缘弯曲成直且短的部分,直的部分不具有比阈值长度长的长度。在修改设计期间,伪金属板的等于或小于阈值长度的边缘可以保持不修改。
图3到图6示出了根据本发明的一些实施例的伪金属板100和200的顶视图,其中图2中的伪金属焊盘100和200的讨论,无论什么时候应用,也应用在图3至图6的实施例。应该注意,图3到图6的每个示出了伪金属板100和200的小部分,并且示出的边缘部分的图案可以重复以具有锯齿形图案。参考图3,根据本发明的一些实施例,伪金属板100的凹槽108从凹槽106进一步凹进。相应地,伪金属板200的凸出部分210可以进一步凸出超过凸出部分204。在这些实施例中,当凹槽106和108组合地作为复合凹槽考虑时,示出的边缘102具有凸出部分和邻近凸出部分的凹槽。凸出部分和凹槽可以重复,并且因此伪金属板100的边缘102也具有锯齿形图案。类似地,伪金属板200的边缘202也具有锯齿形图案。此外,伪金属板100的凸出部分可能延伸向并且可能延伸进入伪金属板200的凹槽,并且反之亦然。
在如图2和图3所示的示例性实施例中,边缘102和202的相邻的部分彼此垂直以形成直角。图4、图5和图6示出了一些示例性实施例,在这些实施例中外角(在伪金属板100和200外部测量到的角度)是大于90度的钝角。结果,凸出部分104和204可以具有梯形结构。实验结果表明锐角更容易在伪金属板中引起破裂,并且锐角和直角产生更可靠的介电层和不破裂的伪金属板。根据一些示例性实施例,外角θ大约是135度。
图5示出了一个示例性实施例,其中在伪金属板的凸出部分的相对侧上的边缘部分没有对准成一条直线。例如,边缘部分202A和202B分别对准成直线212和214,直线212和214不重叠。相应地,凸出部分204的边缘202C和202D具有不同的长度。相应地,在凹槽106的相对侧上的边缘部分102A和102B没有对准成一条直线。
图6示出了根据一些实施例的另一些伪金属板100和200,其中在凸出部分204的相对侧上的边缘具有不同数量的部分。例如,单个部分204A形成凸出部分204的一个边缘,而部分204B、204C和204D组合地形成凸出部分204的对侧边缘。
图7示出了根据一些示例性实施例的管芯10中的伪金属板100和200。伪金属板200可以完全围绕伪金属板100,伪金属板100和200彼此分离间距C。虚线矩形58代表管芯10的一些区域,其中区域58的放大视图可以通过任意组合的图2至图6代表。在图7中没有示出开口112和PPI50(图2至图6),尽管它们仍然存在于图7的伪金属板100和/或200中。在这些实施例中,伪金属板100包括四个边缘102,当如图2至图6所示放大边缘102时,边缘102是弯曲的并且具有锯齿形图案。此外,伪金属板200包括四个边缘202,当放大时,也是锯齿形的,如图2至图6所示。伪金属板200也可以包括接近管芯10的边缘的四个边缘222。边缘222,当放大时,也是锯齿形的,如图2至图6所示。
图8示出了根据一些示例性实施例的管芯10中的伪金属板100、200和400。根据一些实施例,伪金属板100、200和400具有不规则的顶视形状。伪金属板100、200和400通过介电材料彼此间隔开。画出虚线区域58,其中矩形区域58的放大视图可以通过任意组合的图2至图6代表。没有示出开口112和PPI50(图2至图6),尽管它们仍然存在于图8的伪金属板100和/或200中。在这些实施例中,当如图2至图6所示放大的时候,伪金属板100的边缘102、伪金属板200的边缘202和伪金属板400的边缘402也是弯曲/锯齿形的。
再次参考图1,根据一些实施例示出了一个PPI层,包括PPI 50和伪金属板100和200。根据可选的实施例,在示出的PPI层上方可以有两个、三个或多个PPI层。如图2至图8所示,在上面的PPI层中,可以有类似于伪金属板100、200、300和400的伪金属板。在上面的PPI层中的伪金属板的图案和边缘设计基本上与本发明的实施例相同,并且因此这里未重复。
本发明的实施例具有一些优点。通过把伪金属板的长直边缘替换为在不同的方向上延伸的短直边缘,长直边缘上的应力不连续,并且不太可能出现裂缝。
根据本发明的一些实施例,一种结构包括金属焊盘、具有覆盖金属焊盘的边缘部分的部分的钝化层和位于钝化层上方的伪金属板。伪金属板中具有多个贯穿开口。伪金属板具有锯齿形边缘。介电层具有位于伪金属板上面的第一部分、填充多个第一通孔的第二部分和接触第一锯齿形边缘的第三部分。
在上述结构中,其中,所述第一锯齿形边缘包括多个边缘部分,所述多个边缘部分的相邻部分在不同方向上延伸,并且其中,所述第一锯齿形边缘的所述边缘部分不具有大于400μm的长度。
在上述结构中,其中,所述第一伪金属板包括第一凸起和第一凹槽,所述第一锯齿形边缘包括所述第一凸起和所述第一凹槽的边缘,并且所述第一凸起和所述第一凹槽以交替的图案分配。
在上述结构中,其中,所述第一伪金属板包括第一凸起和第一凹槽,所述第一锯齿形边缘包括所述第一凸起和所述第一凹槽的边缘,并且所述第一凸起和所述第一凹槽以交替的图案分配,其中,所述第一凸起具有彼此相同的第一宽度和彼此相同的第一长度,并且所述第一凹槽具有彼此相同的第二宽度和彼此相同的第二长度。
在上述结构中,其中,所述第一伪金属板包括第一凸起和第一凹槽,所述第一锯齿形边缘包括所述第一凸起和所述第一凹槽的边缘,并且所述第一凸起和所述第一凹槽以交替的图案分配,其中,所述第一凸起具有梯形的顶视图形状。
在上述结构中,其中,所述第一伪金属板包括第一凸起和第一凹槽,所述第一锯齿形边缘包括所述第一凸起和所述第一凹槽的边缘,并且所述第一凸起和所述第一凹槽以交替的图案分配,还包括位于所述钝化层上方的第二伪金属板,其中所述第二伪金属板包括具有第二凸起和第二凹槽的第二锯齿形边缘,并且所述第一凸起延伸进入相应的所述第二凹槽,并且所述第二凸起延伸进入相应的所述第一凹槽。
在上述结构中,还包括位于所述钝化层上方的第二伪金属板,其中所述第二伪金属板中具有多个第二贯穿开口,并且所述第二伪金属板包括具有多个部分的第二锯齿形边缘,所述第一锯齿形边缘和所述第二锯齿形边缘之间具有均匀的间隔。
在上述结构中,还包括位于所述钝化层上方的第二伪金属板,其中所述第二伪金属板中具有多个第二贯穿开口,并且所述第二伪金属板包括具有多个部分的第二锯齿形边缘,所述第一锯齿形边缘和所述第二锯齿形边缘之间具有均匀的间隔,其中,所述第一锯齿形边缘包括额外的多个部分,其中所述额外的多个部分与所述第二锯齿形边缘的相应的多个部分平行。
在上述结构中,还包括由所述第一伪金属板完全环绕的再分布线。
根据本发明的一些实施例,一种结构包括具有交替定位的多个第一凸起和多个第一凹槽的第一伪金属板。这种结构还包括具有交替定位的多个第二凸起和多个第二凹槽的第二伪金属板。聚合物条将第一伪金属板和第二伪金属板分开,其中聚合物条的相对边缘接触第一伪金属板和第二伪金属板。
在上述结构中,其中,所述多个第一凸起具有彼此相等的长度,并且所述多个第一凹槽具有彼此相等的宽度。
在上述结构中,其中,所述第一伪金属板包括具有多个第一边缘部分的第一边缘,并且所述第二伪金属板包括具有多个第二边缘部分的第二边缘,并且所述多个第一边缘部分的每个平行于所述多个第二边缘部分的相应的最近的一个。
在上述结构中,其中,所述第一伪金属板完全环绕所述第二伪金属板。
在上述结构中,其中,所述多个第一凸起的每个延伸进入所述多个第二凹槽的相应的一个,并且所述多个第二凸起的每个延伸进入所述多个第一凹槽的相应的一个。
在上述结构中,其中,所述多个第一凸起和所述多个第一凹槽具有梯形顶视形状。
在上述结构中,其中,所述多个第一凸起和所述多个第一凹槽具有矩形顶视形状。
根据本发明的一些实施例,管芯包括第一伪金属板和第二伪金属板,第一伪金属板具有位于第一交替布局中的多个第一凸起和多个第一凹槽,第二伪金属板完全环绕第一伪金属板。第二伪金属板具有位于第二交替布局中的多个第二凸起和多个第二凹槽。多个第一凸起延伸进入多个第二凹槽的相应的第二凹槽,并且多个第二凸起延伸进入多个第一凹槽的相应的第一凹槽。介电层将第一伪金属板和第二伪金属板分开。
在上述结构中,其中,所述第二伪金属板包括接近所述管芯的各个边缘的外边缘。
在上述结构中,其中,所述第二伪金属板包括接近所述管芯的各个边缘的外边缘,所述第二伪金属板的所述外边缘是锯齿形的。
在上述结构中,其中,所述第一伪金属板和所述第二伪金属板电接地。
以上论述了若干实施例的部件,使得本领域的技术人员可以更好地理解本发明的各个方面。本领域技术人员应该理解,他们可以很容易地使用本发明作为基础来设计或更改其他用于达到与本文所介绍实施例相同的目的和/或实现相同优点的工艺和结构。本领域技术人员也应该意识到,这些等效结构并不背离本发明的精神和范围,并且在不背离本发明的精神和范围的情况下,可以进行多种变化、替换以及改变。
Claims (10)
1.一种封装组件的结构,包括:
金属焊盘;
钝化层,具有覆盖所述金属焊盘的边缘部分的部分;
第一伪金属板,位于所述钝化层上方,其中所述第一伪金属板中具有多个第一贯穿开口,并且所述第一伪金属板包括第一锯齿形边缘;以及
介电层,包括:
位于所述第一伪金属板上面的第一部分;
填充所述多个第一贯穿开口的第二部分;和
接触所述第一锯齿形边缘的第三部分。
2.根据权利要求1所述的结构,其中,所述第一锯齿形边缘包括多个边缘部分,所述多个边缘部分的相邻部分在不同方向上延伸,并且其中,所述第一锯齿形边缘的所述边缘部分不具有大于400μm的长度。
3.根据权利要求1所述的结构,其中,所述第一伪金属板包括第一凸起和第一凹槽,所述第一锯齿形边缘包括所述第一凸起和所述第一凹槽的边缘,并且所述第一凸起和所述第一凹槽以交替的图案分配。
4.根据权利要求3所述的结构,其中,所述第一凸起具有彼此相同的第一宽度和彼此相同的第一长度,并且所述第一凹槽具有彼此相同的第二宽度和彼此相同的第二长度。
5.根据权利要求3所述的结构,其中,所述第一凸起具有梯形的顶视图形状。
6.根据权利要求3所述的结构,还包括位于所述钝化层上方的第二伪金属板,其中所述第二伪金属板包括具有第二凸起和第二凹槽的第二锯齿形边缘,并且所述第一凸起延伸进入相应的所述第二凹槽,并且所述第二凸起延伸进入相应的所述第一凹槽。
7.根据权利要求1所述的结构,还包括位于所述钝化层上方的第二伪金属板,其中所述第二伪金属板中具有多个第二贯穿开口,并且所述第二伪金属板包括具有多个部分的第二锯齿形边缘,所述第一锯齿形边缘和所述第二锯齿形边缘之间具有均匀的间隔。
8.根据权利要求7所述的结构,其中,所述第一锯齿形边缘包括额外的多个部分,其中所述额外的多个部分与所述第二锯齿形边缘的相应的多个部分平行。
9.一种封装组件的结构,包括:
第一伪金属板,包括:
交替定位的多个第一凸起和多个第一凹槽;
第二伪金属板,包括:
交替定位的多个第二凸起和多个第二凹槽;以及
聚合物条,将所述第一伪金属板和所述第二伪金属板分开,其中所述聚合物条的相对边缘接触所述第一伪金属板和所述第二伪金属板。
10.一种封装组件的结构,包括:
管芯,包括:
第一伪金属板,包括位于第一交替的布局中的多个第一凸起和多个第一凹槽;
第二伪金属板,完全环绕所述第一伪金属板,其中所述第二伪金属板包括位于第二交替布局中的多个第二凸起和多个第二凹槽,其中所述多个第一凸起延伸进入所述多个第二凹槽的相应的一个,并且所述多个第二凸起延伸进入所述多个第一凹槽的相应的一个;以及
介电层,将所述第一伪金属板与所述第二伪金属板分开。
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US10141270B2 (en) * | 2016-12-09 | 2018-11-27 | Amkor Technology, Inc. | Semiconductor device and method of manufacturing thereof |
TWI632644B (zh) * | 2017-08-30 | 2018-08-11 | 絡達科技股份有限公司 | 積體電路結構 |
US10249583B1 (en) * | 2017-09-19 | 2019-04-02 | Infineon Technologies Ag | Semiconductor die bond pad with insulating separator |
US10566300B2 (en) * | 2018-01-22 | 2020-02-18 | Globalfoundries Inc. | Bond pads with surrounding fill lines |
US11201130B2 (en) * | 2018-01-25 | 2021-12-14 | Sumitomo Electric Industries, Ltd. | Semiconductor device |
US11069630B2 (en) * | 2018-09-21 | 2021-07-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structures and methods for reducing thermal expansion mismatch during integrated circuit packaging |
US10763199B2 (en) * | 2018-12-24 | 2020-09-01 | Nanya Technology Corporation | Semiconductor package structure and method for preparing the same |
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US20220310527A1 (en) * | 2021-03-26 | 2022-09-29 | Taiwan Semiconductor Manufacturing Co., Ltd | Semiconductor devices and methods of manufacture |
US11990433B2 (en) * | 2021-04-22 | 2024-05-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad structure coupled to multiple interconnect conductive\ structures through trench in substrate |
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