CN106463388B - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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CN106463388B
CN106463388B CN201480078393.6A CN201480078393A CN106463388B CN 106463388 B CN106463388 B CN 106463388B CN 201480078393 A CN201480078393 A CN 201480078393A CN 106463388 B CN106463388 B CN 106463388B
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resist layer
film
wavelength
etching
semiconductor device
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CN106463388A (zh
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山中信明
近森大亮
武藤祥生
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Mitsubishi Electric Corp
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Abstract

在配置于半导体衬底之上的金属膜之上，使用针对至少一个波长具有感光性的正型光致抗蚀剂涂敷出抗蚀层。由含有一个波长区域的光对抗蚀层进行曝光。对曝光后的抗蚀层进行显影。在对抗蚀层进行显影的工序之后，在蚀刻装置中，将抗蚀层用作掩模对金属膜进行湿式蚀刻。蚀刻装置(80)设置于由照明装置(90)进行照明的环境(YR)下，该照明装置(90)发出小于或等于一个波长的波长被截去后的光(YL)。

Description

半导体装置的制造方法
技术领域
本发明涉及一种半导体装置的制造方法，特别地，涉及一种伴有使用了正型光致抗蚀剂的湿式蚀刻的半导体装置制造方法。
背景技术
在半导体装置的制造中，常常进行在半导体衬底之上配置的金属膜的图案化。作为典型的图案化方法，存在将抗蚀层作为掩模的湿式蚀刻。抗蚀层通常由光致抗蚀剂的涂敷、曝光以及显影形成。
在保存使用前的光致抗蚀剂以及未曝光的抗蚀层时，历来需要提起注意。例如根据日本特开平5－323589号公报，提出了保存稳定性优异的感光性树脂组成物。根据该公报，即使将该感光性树脂组成物作为干膜在未曝光状态下进行保存，也能够长期地防止感光。
专利文献1：日本特开平5－323589号公报
发明内容
如上所述，对于曝光前的干膜(抗蚀层)，通常要留意防止感光。相反，以往认为，在曝光以及随后的显影结束后，不需要特别留意防止感光。但是，本发明人新发现，在使用正型抗蚀剂的情况下，如果并未对显影结束后的抗蚀层也留意防止感光，则通过湿式蚀刻进行的图案化的精度容易下降。
本发明就是为了解决上述课题而提出的，其目的在于提供一种半导体装置的制造方法，该半导体装置的制造方法能够提高通过湿式蚀刻进行的图案化的精度。
本发明的半导体装置的制造方法具有下述工序。在配置于半导体衬底之上的金属膜之上，使用针对至少一个波长具有感光性的正型光致抗蚀剂涂敷出抗蚀层。由含有一个波长区域的光对抗蚀层进行曝光。对曝光后的抗蚀层进行显影。在对抗蚀层进行显影的工序之后，在蚀刻装置中，将抗蚀层用作掩模对金属膜进行湿式蚀刻。蚀刻装置设置于由照明装置进行照明的环境下，该照明装置发出小于或等于一个波长的波长被截去后的光。
发明的效果
根据本发明，蚀刻装置设置于由照明装置进行照明的环境下，该照明装置发出小于或等于一个波长的波长被截去后的光。由此，抑制由正型光致抗蚀剂形成的抗蚀层的端部处的、抗蚀层和金属膜的界面处的金属膜的腐蚀。由此，能够提高通过湿式蚀刻进行的图案化的精度。
附图说明
图1是概略地表示本发明的一个实施方式的半导体装置的结构的局部剖视图。
图2是概略地表示图1的半导体装置的制造方法的第1工序的局部剖视图。
图3是概略地表示图1的半导体装置的制造方法的结构的流程图。
图4是概略地表示图1的半导体装置的制造方法的第2工序的局部剖视图。
图5是概略地表示图1的半导体装置的制造方法的第3工序的局部剖视图。
图6是表示对比例的半导体装置的制造方法的湿式蚀刻后的状态的、利用扫描型电子显微镜得到的局部剖面照片。
图7是表示对比例的半导体装置的制造方法的去除抗蚀层后的情况的、利用扫描型电子显微镜得到的局部平面照片。
图8是表示对比例的半导体装置的制造方法的去除抗蚀层后的情况的、利用扫描型电子显微镜得到的局部剖面照片。
图9A是表示对比例的半导体装置的制造方法中的、光向显影后的抗蚀层入射的情况的局部剖视图。
图9B是表示对比例的半导体装置的制造方法中的湿式蚀刻的进展的局部剖视图。
图10A是表示本发明的一个实施方式的半导体装置的制造方法中的、光向显影后的抗蚀层的入射的情况的局部剖视图。
图10B是表示本发明的一个实施方式的半导体装置的制造方法中的湿式蚀刻的进展的局部剖视图。
具体实施方式
下面，基于附图，对本发明的实施方式进行说明。此外，在以下附图中，对相同或者相当的部分标注同一参照编号，不重复其说明。
（半导体装置的结构）
图1概略地表示本实施方式的功率设备100（半导体装置）的一部分（图中右端部）的结构。功率设备100是肖特基势垒二极管，具有碳化硅衬底10（半导体衬底）、层间绝缘膜30、阳极电极40、阴极电极51和保护膜52。
碳化硅衬底10是所谓的外延衬底，具有单晶衬底11及外延层20。单晶衬底为n型（第1导电型）。外延层20为n型，具有比单晶衬底11的杂质浓度低的杂质浓度。在外延层20的表面之上作为终端构造而设置有p型（第2导电型）的保护环21及22。在最内侧配置的保护环、即保护环21包含：低浓度区域21a，其具有相对较低的杂质浓度；以及高浓度区域21b，其具有相对较高的杂质浓度。高浓度区域21b通过低浓度区域21a而与外延层20的n型部分、换言之漂移层隔开。
层间绝缘膜30由二氧化硅制成，在本实施方式中是TEOS（正硅酸乙酯）膜，即，使用TEOS形成的膜。层间绝缘膜30沿碳化硅衬底10的表面外周配置。换言之，层间绝缘膜30在中央部具有开口。
阳极电极具有：作为肖特基电极的Ti膜41（金属膜）；以及焊盘电极42，其设置于Ti膜41之上。作为典型的厚度，Ti膜的厚度大于或等于150nm且小于或等于250nm。Ti膜41在层间绝缘膜30的开口处与外延层20接触。Ti膜41与外延层20中的n型的漂移层的部分形成肖特基结。另外，Ti膜41与保护环21的高浓度区域21b接触。Ti膜41及焊盘电极42各自的边缘配置于层间绝缘膜30之上。焊盘电极42是例如Al层。
阴极电极51和阳极电极40一起夹持碳化硅衬底10。即，阴极电极51配置于单晶衬底11的、与设置了阳极电极40的面相反的面。
保护膜52在碳化硅衬底10之上覆盖阳极电极40的端部。保护膜52具有将焊盘电极42露出的开口部。保护膜52由绝缘体制成，例如由聚酰亚胺制成。
(制造方法)
参照图2，在碳化硅衬底10的外延层20形成保护环21及22。然后，在外延层20之上形成层间绝缘膜30。即，进行TEOS膜的成膜及其图案化。然后，在设置了层间绝缘膜30的外延层20之上堆积Ti膜41。
然后，进行以Ti膜41的图案化为目的的光刻工序。具体地说，首先，使用针对g线(436nm的谱线)的波长(一个波长)具有感光性的正型光致抗蚀剂，在配置于碳化硅衬底10之上的Ti膜41之上涂敷出抗蚀层60(图3：步骤S10)。优选正型光致抗蚀剂含有酚醛类材料。
然后，使用光掩模，由含有g线(一个波长区域)的光对抗蚀层60进行曝光(图3：步骤S20)。例如能够使用高压水银灯作为光源。
然后，对曝光后的抗蚀层60进行显影(图3：步骤S30)。由此，光掩模的图案被转印至抗蚀层60。即，得到图2所示的半成品衬底100W。
在正型光致抗蚀剂针对g线的波长具有感光性的情况下，在所谓黄色房(yellowroom)那样的、由黄色灯进行照明的环境下进行上述光刻工序。黄色灯是为了防止不期望的感光而截去了小于或等于g线波长的波长的发光后的灯具，优选是为了更可靠地防止感光而截去了小于或等于500nm左右的波长的光后的灯具。
参照图4，通过对抗蚀层60进行显影得到的半成品衬底100W也可以在后述的湿式蚀刻之前保管于具有遮光性的暗箱70(容器)内(图3：步骤S40)。此外，能够省略该步骤S40。
并且，参照图5，在蚀刻装置80中，对半成品衬底100W(图2)进行蚀刻。具体地说，将抗蚀层60用作掩模对Ti膜41进行湿式蚀刻(图3：步骤S50)。
蚀刻装置80设置于黄色房YR的环境下、即由发出小于或等于g线波长的波长被截去后的光YL的黄色灯90(照明装置)进行照明的环境下。该照明通常是为了确保作业者OP的视野而设置的。
蚀刻装置80具有框体部81及槽82。在槽82中保持有用于湿式蚀刻的蚀刻液89。蚀刻液89是含有过氧化氢的水溶液。为了提高蚀刻率，优选该水溶液除过氧化氢以外还含有氨。
在湿式蚀刻之后，去除抗蚀层60。然后，再次参照图1，形成阴极电极51、焊盘电极42以及保护膜52。由此得到功率设备100。
下面，进行对比例的说明。在本对比例中，取代黄色灯90(图5)而使用通常的白色荧光灯。其结果，在抗蚀层的端部，抗蚀层和Ti膜的界面处的Ti膜发生腐蚀，Ti膜的厚度变小(参照图6)。另外，Ti膜的表面中的、抗蚀层端部所在的部分(图7中的区域RG)变得粗糙。如图8所示，变得粗糙的部分的厚度变小25％左右(50nm左右)。关于这些现象发生的原因，下面对本发明人的推测进行说明。
在对比例中，显影后的抗蚀层60接受来自通常的白色荧光灯的光FL(图9A)。虽然抗蚀层60已经受到过显影处理，但是光FL引起在抗蚀层60端部的抗蚀层60和Ti膜41的界面处发生少许感光。由此，由抗蚀层60生成羧酸。该羧酸与蚀刻液中的过氧化氢反应而产生过羧酸69(图9B)。由于过羧酸具有高氧化能力，因此在产生了过羧酸的部位，Ti膜41被腐蚀。即，在抗蚀层60端部的抗蚀层60和Ti膜41的界面处，Ti膜41被腐蚀。其结果，发生Ti膜41的表面变得粗糙以及厚度减小、即湿式蚀刻的图案化的精度降低。
对此，根据本实施方式，蚀刻装置80(图5)设置于黄色房YR的环境下。由此，在作业者OP将半成品衬底100W收容于蚀刻装置80或者从蚀刻装置80取出时，半成品衬底100W接受的光是小于或等于g线波长的波长被截去后的光YL(图10A)。另外，只要框体部81不具有完全的遮光性，则在湿式蚀刻中，半成品衬底100W也接受到来自作业环境的光，该光也是小于或等于g线波长的波长被截去后的光YL。由此，与对比例不同，不会产生由感光引起的不期望的羧酸。由此，不会产生由羧酸和蚀刻液89(图5)的反应所引起的过羧酸69(图9B)(参照图10B)。由此，抑制由正型光致抗蚀剂形成的抗蚀层60的端部处的、抗蚀层60和Ti膜41的界面处的Ti膜41的腐蚀。由此，能够提高通过湿式蚀刻进行的图案化的精度。
优选在抗蚀层60的显影后且在湿式蚀刻前，将半成品衬底100W保管于暗箱70(图4)内。由此，进一步抑制由正型光致抗蚀剂形成的抗蚀层60的端部处的、抗蚀层60和Ti膜41的界面处的Ti膜41的腐蚀。由此，能够进一步提高通过湿式蚀刻进行的图案化的精度。
在使用含有过氧化氢的水溶液作为蚀刻液89的情况下，由于过氧化氢的原因，特别容易发生由正型光致抗蚀剂形成的抗蚀层60的端部处的、抗蚀层60和Ti膜41的界面处的Ti膜41的腐蚀。根据本实施方式，能够抑制上述腐蚀。
在使用Ti膜41作为被蚀刻的金属膜的情况下，由于Ti容易被氧化这一原因，特别容易发生由正型光致抗蚀剂形成的抗蚀层60的端部处的、抗蚀层60和金属膜的界面处的金属膜的腐蚀。根据本实施方式，能够抑制上述腐蚀。
在使用碳化硅衬底10作为半导体衬底的情况下，半导体衬底及Ti膜41形成肖特基结，从而能够将作为功率设备来说有用性高的SiC/Ti肖特基结设置于功率设备100。根据本实施方式，对于上述设备，能够提高作为肖特基电极的Ti膜41的图案化精度。
在由含有酚醛类材料的正型光致抗蚀剂形成抗蚀层60的情况下，由于从酚醛类材料产生羧酸这一原因，特别容易发生抗蚀层60端部处的、抗蚀层60和Ti膜41的界面处的Ti膜41的腐蚀。特别地，在使用含有过氧化氢的水溶液进行湿式蚀刻的情况下，由于来自酚醛类材料的羧酸和过氧化氢的反应，容易产生过羧酸。根据本实施方式，能够抑制上述腐蚀。
关于本发明，在其发明的范围内能够对实施方式适当地进行变形、省略。例如，金属膜不限定于仅由Ti膜构成，也可以除Ti膜以外还含有其他膜，或者也可以是除Ti膜以外的金属膜。半导体装置不限定于肖特基势垒二极管，也可以是PiN二极管等其他二极管，或者也可以是MISFET(Metal Insulator Semiconductor Field Effect Transistor)或者IGBT(Insulated Gate Bipolar Transistor)等晶体管。半导体衬底不限定于由碳化硅制成，也可以由除碳化硅以外的宽带隙半导体制成，或者也可以由硅制成。蚀刻装置不限定于将半导体衬底向保持于槽中的蚀刻液浸渍的蚀刻装置，也可以是向半导体衬底之上供给蚀刻液的蚀刻装置。正型光致抗蚀剂不限定于针对g线波长而具有感光性的光致抗蚀剂，是针对至少一个波长具有感光性的光致抗蚀剂即可，例如也可以是针对h线或者i线的波长具有感光性的光致抗蚀剂。根据上述一个波长的选择的不同，照明装置不限定于进行被感知为黄色的发光的照明装置，例如可以是通过将被截去的波长实质上限于紫外线区域，从而进行被感知为大致白色的发光的照明装置。层间绝缘膜不限定于TEOS膜，也可以是由除TEOS以外的材料制成的二氧化硅膜，或者也可以是由除二氧化硅膜以外的材料制成的绝缘膜。半导体衬底向蚀刻装置的输送或者半导体衬底从蚀刻装置向外的输送不限定于由作业者进行，也可以由机器人等机械进行。第1及第2导电型也可以彼此调换。
详细地说明了本发明，但上述说明在所有方面均为例示，本发明不限定于此。可以理解为，不脱离本发明的范围而能够想到未例示的无数变形例。
标号的说明
10碳化硅衬底(半导体衬底)，11单晶衬底，20外延层，30层间绝缘膜，40阳极电极，41Ti膜，42焊盘电极，51阴极电极，52保护膜，60抗蚀层，70暗箱(容器)，80蚀刻装置，81框体部，82槽，89蚀刻液，90黄色灯(照明装置)，100功率设备(半导体装置)。

Claims (3)

1.一种半导体装置的制造方法，具有下述工序：
在配置于半导体衬底之上的金属膜之上，使用针对至少一个波长具有感光性的正型光致抗蚀剂涂敷出抗蚀层；
由含有所述一个波长区域的光对所述抗蚀层进行曝光；
对曝光后的所述抗蚀层进行显影；以及
在对所述抗蚀层进行显影的工序之后，在蚀刻装置中，将所述抗蚀层用作掩模对所述金属膜进行湿式蚀刻，
所述蚀刻装置设置于由照明装置进行照明的环境下，该照明装置发出小于或等于所述一个波长的波长被截去后的光，
进行所述湿式蚀刻的工序是使用含有过氧化氢的水溶液作为蚀刻液而进行的，所述金属膜包含Ti膜，所述正型光致抗蚀剂包含酚醛类材料。
2.根据权利要求1所述的半导体装置的制造方法，其中，
还具有下述工序，即，在对所述抗蚀层进行显影的工序之后且在进行所述湿式蚀刻的工序之前，在具有遮光性的容器内保管所述半导体衬底。
3.根据权利要求1或2所述的半导体装置的制造方法，其中，
所述半导体衬底是碳化硅衬底，所述碳化硅衬底及所述Ti膜形成肖特基结。
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