CN106252418B - 一种薄膜晶体管 - Google Patents

一种薄膜晶体管 Download PDF

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CN106252418B
CN106252418B CN201610842536.7A CN201610842536A CN106252418B CN 106252418 B CN106252418 B CN 106252418B CN 201610842536 A CN201610842536 A CN 201610842536A CN 106252418 B CN106252418 B CN 106252418B
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layer
tft
grid
source drain
metal layer
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CN106252418A (zh
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黄洪涛
戴超
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Nanjing CEC Panda LCD Technology Co Ltd
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Nanjing Huadong Electronics Information and Technology Co Ltd
Nanjing CEC Panda FPD Technology Co Ltd
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Publication of CN106252418A publication Critical patent/CN106252418A/zh
Priority to US16/306,552 priority patent/US10852611B2/en
Priority to PCT/CN2017/100528 priority patent/WO2018054214A1/zh
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Abstract

本发明公开了一种薄膜晶体管，包括第一金属层栅极、第一绝缘层栅绝缘层、半导体层、第二金属层源极漏极和第三绝缘层钝化层，所述第一金属层栅极形成在衬底玻璃层上，第一绝缘层栅绝缘层位于第一金属层栅极上，半导体层在第一绝缘层栅绝缘层上，第二金属层源极漏极位于半导体层上面，第三绝缘层钝化层在最外层位于第二金属层源极漏极上；所述第一金属层栅极和半导体层设置成镂空结构。薄膜晶体管将栅极、半导体层设计成镂空的形式，使TFT的内部形成多个分布式排列的通光孔，可以增大框胶固化所使用的紫外光的透过率，提高涂覆在TFT上的框胶固化率。镂空式TFT使得框胶涂覆区域可以与TFT充分重叠，从而进一步减小边框宽度。

Description

一种薄膜晶体管
技术领域
本发明涉及平板显示，具体涉及到一种薄膜晶体管。
背景技术
目前，中小尺寸显示面板对窄边框的诉求越来越高。为了减小边框尺寸，面板上都使用GDM(Gate Driver Monolithic)电路，替代IC芯片，作为扫描线的驱动电路。GDM电路是由薄膜晶体管(TFT，Thin Film Transistor)和电容组成，直接构建在TFT基板AA(ActiveArea，LCD的显示区域)区边框上的栅极驱动电路，它比IC占用的边框尺寸更小，GDM电路一定程度减小了面板边框的宽度。
但是由于GDM电路包含的数个面积较大的TFT和电容，会降低框胶固化过程中紫外光的透过率，框胶涂覆区域不能与TFT重叠，最终限制了面板边框宽度的进一步减小。面板厂将GDM电路中的电容设计成镂空形式，以增加紫外光透过率。但电容镂空区域增加了GDM电路占用的边框面积，不能改善大尺寸TFT的透光率。
发明内容
发明目的：为了解决现有技术中存在的问题，本发明提供一种薄膜晶体管，该薄膜晶体管具有镂空结构，增大框胶固化所使用的紫外光的透过率，从而可以与框胶涂覆区充分重叠，进一步减小边框宽度。
技术方案：为了实现上述目的，如本发明所述一种薄膜晶体管，包括第一金属层栅极、第一绝缘层栅绝缘层、半导体层、第二金属层源极漏极和第三绝缘层钝化层，所述第一金属层栅极形成在衬底上，第一绝缘层栅绝缘层位于第一金属层栅极上，半导体层在第一绝缘层栅绝缘层上，第二金属层位于半导体层上面，第三绝缘层钝化层在最外层位于第二金属层上；所述第一金属层栅极和半导体层设置成镂空结构。
其中，所述镂空结构为分布式通光孔。
作为优选，所述通光孔为方形、矩形或圆形。
作为优选所述的薄膜晶体管还包括第二绝缘层刻蚀阻挡层，所述第二绝缘层刻蚀阻挡层位于半导体层和第二金属层源极漏极之间。
作为优选，所述第二金属层源极漏极位于第二绝缘层刻蚀阻挡层上，通过第二绝缘层刻蚀阻挡层上的刻蚀阻挡孔与半导体层接触。
进一步地，所述第一金属层栅极(1)、半导体层(3)和第二金属层源极漏极(4)沿垂直于源极漏极电极的方向被分隔成数个相互间隔的区间。
更进一步地，所述第一金属层栅极(1)、半导体层(3)、刻蚀阻挡孔(8)和第二金属层源极漏极(4)沿垂直于源极漏极电极的方向被分隔成数个相互间隔的区间。
所述相互间隔的区间的第一金属层栅极之间由数个栅极金属线连接；相互间隔的区间的第二金属层源极漏极之间由数个源极漏极金属线连接。
进一步地，所述栅极金属线与源极漏极金属线有重叠，重叠部分形成了电容，此电容由第一金属层、第一绝缘层和第二金属层共同构成。
TFT之间由于栅极金属线与源极漏极金属线有重叠形成了电容，因为TFT里已经形成部分电容，这样就可以减少GDM电路原有电容的大小，从而进一步减小边框宽度。
其中，所述相互间隔的区间之间的间隙与源极漏极的间隙相交的部分形成通光孔。相互间隔的区间之间的间隙指各个金属线之间的空隙。
作为优选，所述相互间隔的区间中的刻蚀阻挡孔打通成一个刻蚀阻挡孔。
作为优选，所述半导体层的材料包括金属氧化物、氢化非晶硅或多晶硅。
作为优选，所述栅极金属层和源极漏极金属层的材料包括Ti、Cu、Al、Mo、Cr中的任一种或几种构成或由其中几种金属的合金。
本发明一种薄膜晶体管，按照堆叠顺序依次包括第一金属层栅极、第一绝缘层栅绝缘层、半导体层、第二绝缘层刻蚀阻挡层、第二金属层源极漏极和第三绝缘层钝化层，其中第二绝缘层刻蚀阻挡层为可选项。
第一金属层直接形成在衬底玻璃层上，栅极由此层金属形成；第一绝缘层位于第一金属层上面，形成栅绝缘层，将栅极和半导体层隔开；半导体层在第一绝缘层栅绝缘层上；第二金属层，用于形成源极和漏极，可位于半导体层上面直接与半导体层接触(无刻蚀阻挡层，BCE结构)，或者位于第二绝缘层上，通过第二绝缘层刻蚀阻挡层上的刻蚀阻挡孔与半导体层接触(有刻蚀阻挡层，ES结构)；第二绝缘层，即刻蚀阻挡层，为可选项，位于半导体层和第二金属层源极漏极之间；第三绝缘层，即钝化层，在最外层，位于第二金属层上，将薄膜晶体管与外界隔离。
有益效果：由现有技术相比，本发明的薄膜晶体管具有以下优点：薄膜晶体管将TFT的栅极、半导体层设计成镂空的形式，使TFT的内部形成多个分布式排列的通光孔。其中栅极、半导体沿垂直于源极漏极电极的方向分隔成数个相互间隔的区间，此间隔区间与源极漏极的间隙相交的部分形成TFT的通光孔，可以增大框胶固化所使用的紫外光的透过率，提高涂覆在TFT上的框胶固化率。镂空式TFT使得框胶涂覆区域可以与TFT充分重叠，从而进一步减小边框宽度。TFT之间由于栅极金属线与源极漏极金属线有重叠形成了电容，可以减少GDM电路原有电容的大小，将镂空式TFT与镂空式电容融合，节省了镂空所浪费的空间，进一步减小了GDM电路所占用的边框宽度，有利于实现极窄边框。
附图说明
图1为本发明一种BCE结构的镂空式TFT；
图2为图1沿A-A的剖面图；
图3为图1沿B-B的剖面图；
图4为图1沿C-C的剖面图；
图5为本发明另一种BCE结构的镂空式TFT；
图6为图5沿A-A的剖面图；
图7为图5沿B-B的剖面图；
图8为图5沿C-C的剖面图；
图9为本发明一种ES结构的镂空式TFT；
图10为图9沿A-A的剖面图；
图11为图9沿B-B的剖面图；
图12为图9沿C-C的剖面图；
图13为本发明另一种ES结构的镂空式TFT；
图14为图13沿A-A的剖面图；
图15为图13沿B-B的剖面图；
图16为图13沿C-C的剖面图；
图17为本发明另一种ES结构的镂空式TFT；
图18为图17沿A-A的剖面图；
图19为图17沿B-B的剖面图；
图20为图17沿C-C的剖面图；
图21为现有技术TFT基板AA区；
图22为含实施例1-5中任意一种镂空式TFT的TFT基板AA区。
具体实施方式
以下结合附图和实施例对本发明作进一步说明。
实施例1
如图1-4所示，为本发明的一种薄膜晶体管，为BCE结构的镂空式TFT，TFT里无电容。该镂空式TFT包括第一金属层栅极(1)、第一绝缘层栅绝缘层(2)、半导体层(3)、第二金属层源极漏极(4)和第三绝缘层钝化层(5)；所述第一金属层栅极(1)直接形成在衬底玻璃层(6)上，栅极由此层金属形成；第一绝缘层位于第一金属层栅极(1)上面，形成栅绝缘层，将栅极和半导体层(3)隔开；半导体层(3)在第一绝缘层栅绝缘层(2)上；第二金属层，用于形成源极和漏极，位于半导体层(3)上面直接与半导体层(3)接触，第三绝缘层钝化层(5)在最外层位于第二金属层源极漏极(4)上，将薄膜晶体管与外界隔离，所述半导体层(3)的材料为氢化非晶硅，所述栅极的材料为Al，源极漏极的材料为Al。
第一金属层栅极(1)、半导体层(3)沿垂直于第二金属层源极漏极(4)电极的方向设置，栅极、半导体层和源极漏极被分隔成数个相互间隔的区间。栅极和半导体层进行了分隔，分隔线与沟道的长度方向平行，即与源极漏极电极的方向垂直，分隔之后的相邻区间之间形成镂空区域，各个相互间隔的区间的栅极之间、源极漏极之间并不是断开的，而是存在与各个层膜材料相同的很细的金属线，即分隔之后相互间隔各个区间的栅极分别由数个栅极金属线连接，分隔之后相互间隔各个区间源极漏极由数个源极漏极金属线连接，以形成统一的栅极、源极和漏极；所述相互间隔的区间之间的间隙与源极漏极的间隙相交的部分形成方形、矩形或圆形分布式通光孔。
实施例2
如图5-8所示，在实施例1的基础上的一种改进薄膜晶体管，为BCE结构的镂空式TFT，TFT里有电容，实施例2与实施例1的区别在于所述栅极金属线与源极漏极金属线有重叠，重叠部分形成了电容。TFT之间由于栅极金属线与源极漏极金属线有重叠形成了电容，此电容由第一金属层、第一绝缘层和第二金属层共同构成。因为TFT里已经形成部分电容，这样就可以减少GDM电路原有电容的大小，从而进一步减小边框宽度。
实施例3
如图9-12所示，为本发明的一种薄膜晶体管，为ES结构的镂空式TFT，TFT里无电容。该镂空式TFT包括第一金属层栅极(1)、第一绝缘层栅绝缘层(2)、半导体层(3)、第二绝缘层刻蚀阻挡层(7)、第二金属层源极漏极(4)和第三绝缘层钝化层(5)，所述第一金属层栅极(1)直接形成在衬底玻璃层(6)上，栅极由此层金属形成；第一绝缘层位于第一金属层栅极(1)上面，形成栅绝缘层，将栅极和半导体层隔开；半导体层(3)在第一绝缘层栅绝缘层(2)上；第二金属层，用于形成源极和漏极，位于第二绝缘层刻蚀阻挡层(7)上，通过第二绝缘层刻蚀阻挡层(7)上的刻蚀阻挡孔(8)与半导体层(3)接触；第二绝缘层，即刻蚀阻挡层，位于半导体层(3)和第二金属层源极漏极(4)之间；第三绝缘层钝化层(5)，在最外层，位于第二金属层源极漏极(4)上，将薄膜晶体管与外界隔离，所述半导体层的材料为金属氧化物，所述栅极的材料为Cu，源极漏极的材料为Cu。
第一金属层栅极(1)、半导体层(3)和刻蚀阻挡孔(8)沿垂直于第二金属层源极漏极(4)电极的方向设置，栅极、半导体层、刻蚀阻挡孔和源极漏极被分隔成数个相互间隔的区间。栅极和半导体层进行了分隔，分隔线与沟道的长度方向平行，即与源极漏极电极的方向垂直，分隔之后的相邻区间之间形成镂空区域，各个相互间隔的区间的栅极之间、源极漏极之间并不是断开的，而是存在与各个层膜材料相同得很细的金属线，即分隔之后相互间隔各个区间的栅极分别由数个栅极金属线连接，分隔之后相互间隔各个区间源极漏极由数个源极漏极金属线连接，以形成统一的栅极、源极和漏极；所述相互间隔的区间之间的间隙与源极漏极的间隙相交的部分形成方形、矩形或圆形分布式通光孔。
实施例4
如图-13-16所示，在实施例3的基础上的一种改进薄膜晶体管，为ES结构的镂空式TFT，TFT里有电容，实施例4与实施例3的区别在于所述栅极金属线与源极漏极金属线有重叠，重叠部分形成了电容。TFT之间由于栅极金属线与源极漏极金属线有重叠形成了电容，此电容由第一金属层、第一绝缘层、刻蚀阻挡孔和第二金属层共同构成。因为TFT里已经形成部分电容，这样就可以减少GDM电路原有电容的大小，从而进一步减小边框宽度。
实施例5
如图17-20所示，在实施例4的基础上的另一种改进薄膜晶体管为ES结构的镂空式TFT，TFT里有电容，实施例5与实施例4的区别在于所述将各区间的刻蚀阻挡孔(8)打通成一个刻蚀阻挡孔(8)。以增大第一金属层、第一绝缘层和第二金属层共同构成的电容，并节省刻蚀阻挡孔所占用的多余空间。
实施例6
图21为现有技术中TFT基板AA区，包括框胶(9)和非镂空式TFT(10)，框胶涂覆区域不能与TFT重叠，否则会降低框胶固化过程中紫外光的透过率，图22为含有本发明实施例1-5中任意一种镂空式TFT的TFT基板AA区，包括框胶(9)、非镂空式TFT(10)和镂空式TFT(11)，镂空式TFT使得框胶涂覆区域可以与镂空TFT充分重叠从而进一步减小边框宽度。

Claims (10)

1.一种薄膜晶体管，其特征在于，包括第一金属层栅极(1)、第一绝缘层栅绝缘层(2)、半导体层(3)、第二金属层源极漏极(4)和第三绝缘层钝化层(5)，所述第一金属层栅极(1)形成在衬底玻璃层(6)上，第一绝缘层栅绝缘层(2)位于第一金属层栅极(1)上，半导体层(3)在第一绝缘层栅绝缘层(2)上，第二金属层源极漏极(4)位于半导体层(3)上面，第三绝缘层钝化层(5)在最外层位于第二金属层源极漏极(4)上；所述第一金属层栅极(1)和半导体层(3)设置成镂空结构；
第一金属层栅极(1)、半导体层(3)沿垂直于第二金属层源极漏极(4)电极的方向设置，栅极和半导体层进行了分隔，分隔线与沟道的长度方向平行，即与源极漏极电极的方向垂直，分隔之后的相邻区间之间形成镂空区域。
2.根据权利要求1所述的薄膜晶体管，其特征在于，所述镂空结构为分布式通光孔。
3.根据权利要求2所述的薄膜晶体管，其特征在于，所述通光孔为方形、矩形或圆形。
4.根据权利要求1所述的薄膜晶体管，其特征在于，还包括第二绝缘层刻蚀阻挡层(7)，所述第二绝缘层刻蚀阻挡层(7)位于半导体层(3)和第二金属层源极漏极(4)之间。
5.根据权利要求4所述的薄膜晶体管，其特征在于，所述第二金属层源极漏极(4)位于第二绝缘层刻蚀阻挡层(7)上，通过第二绝缘层刻蚀阻挡层(7)上的刻蚀阻挡孔(8)与半导体层(3)接触。
6.根据权利要求1所述的薄膜晶体管，其特征在于，所述第一金属层栅极(1)、半导体层(3)和第二金属层源极漏极(4)沿垂直于源极漏极电极的方向被分隔成数个相互间隔的区间。
7.根据权利要求5所述的薄膜晶体管，其特征在于，所述第一金属层栅极(1)、半导体层(3)、刻蚀阻挡孔(8)和第二金属层源极漏极(4)沿垂直于源极漏极电极的方向被分隔成数个相互间隔的区间。
8.根据权利要求6或7所述的薄膜晶体管，其特征在于，所述相互间隔的区间的第一金属层栅极(1)之间由数个栅极金属线连接；相互间隔的区间的第二金属层源极漏极(4)之间由数个源极漏极金属线连接。
9.根据权利要求8所述薄膜晶体管，其特征在于，所述栅极金属线与源极漏极金属线有重叠，重叠部分形成了电容。
10.根据权利要求6或7所述薄膜晶体管，其特征在于，所述相互间隔的区间之间的间隙与第二金属层源极漏极(4)的间隙相交的部分形成通光孔。
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CN110361898B (zh) 2018-11-27 2023-03-14 友达光电股份有限公司 显示面板、驱动电路及显示面板制作方法
CN109616524A (zh) * 2018-11-28 2019-04-12 南京中电熊猫平板显示科技有限公司 薄膜晶体管及其制造方法
TWI683171B (zh) * 2018-12-05 2020-01-21 友達光電股份有限公司 薄膜電晶體
CN110047849A (zh) * 2019-04-02 2019-07-23 福建华佳彩有限公司 一种Demux电路的TFT结构
CN110047940B (zh) * 2019-04-03 2024-04-12 福建华佳彩有限公司 一种双沟道的tft结构
US11189704B2 (en) * 2019-06-10 2021-11-30 Tcl China Star Optofi Fctronics Technology Co.. Ltd. Thin film transistor and electrical circuit
CN111505854B (zh) * 2020-04-29 2023-07-11 京东方科技集团股份有限公司 显示基板及显示装置
CN111627932A (zh) * 2020-05-29 2020-09-04 福建华佳彩有限公司 一种Demux电路结构及显示面板
CN112270891B (zh) * 2020-11-03 2022-09-30 武汉天马微电子有限公司 显示面板及其制备方法、显示装置
CN112838099B (zh) * 2021-01-07 2023-07-04 深圳市华星光电半导体显示技术有限公司 显示面板以及显示装置
CN114967253A (zh) 2021-02-26 2022-08-30 京东方科技集团股份有限公司 阵列基板、显示面板及显示装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103943684A (zh) * 2014-03-26 2014-07-23 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、阵列基板、显示装置
CN104298016A (zh) * 2014-10-28 2015-01-21 合肥鑫晟光电科技有限公司 一种阵列基板及其制备方法、显示面板和显示装置
CN104409513A (zh) * 2014-11-05 2015-03-11 京东方科技集团股份有限公司 一种金属氧化物薄膜晶体管及其制备方法、阵列基板
CN205229635U (zh) * 2015-12-18 2016-05-11 京东方科技集团股份有限公司 像素结构、阵列基板及显示装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100370800B1 (ko) * 2000-06-09 2003-02-05 엘지.필립스 엘시디 주식회사 액정표시장치용 어레이기판 제작방법
JP2009267347A (ja) * 2008-03-31 2009-11-12 Toshiba Corp 半導体装置およびその製造方法
US8723845B2 (en) * 2010-02-08 2014-05-13 Sharp Kabushiki Kaisha Display device
WO2012102152A1 (ja) * 2011-01-25 2012-08-02 シャープ株式会社 貼り合わせ用パネル、表示ユニット及び表示装置
MY167330A (en) * 2012-04-20 2018-08-16 Sharp Kk Display device
TWI644433B (zh) * 2013-03-13 2018-12-11 半導體能源研究所股份有限公司 半導體裝置
CN104155796A (zh) * 2014-09-02 2014-11-19 深圳市华星光电技术有限公司 液晶显示面板结构及其制作方法
CN104658974A (zh) * 2015-03-12 2015-05-27 京东方科技集团股份有限公司 一种薄膜层图案、薄膜晶体管及阵列基板的制备方法
CN105117069B (zh) * 2015-09-18 2018-11-09 上海中航光电子有限公司 一种阵列基板、触控显示面板及触控显示装置
CN106252418B (zh) * 2016-09-22 2018-05-15 南京华东电子信息科技股份有限公司 一种薄膜晶体管

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103943684A (zh) * 2014-03-26 2014-07-23 京东方科技集团股份有限公司 薄膜晶体管及其制作方法、阵列基板、显示装置
CN104298016A (zh) * 2014-10-28 2015-01-21 合肥鑫晟光电科技有限公司 一种阵列基板及其制备方法、显示面板和显示装置
CN104409513A (zh) * 2014-11-05 2015-03-11 京东方科技集团股份有限公司 一种金属氧化物薄膜晶体管及其制备方法、阵列基板
CN205229635U (zh) * 2015-12-18 2016-05-11 京东方科技集团股份有限公司 像素结构、阵列基板及显示装置

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