CN106206480A - 芯片封装结构及其制作方法 - Google Patents

芯片封装结构及其制作方法 Download PDF

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Publication number
CN106206480A
CN106206480A CN201510355820.7A CN201510355820A CN106206480A CN 106206480 A CN106206480 A CN 106206480A CN 201510355820 A CN201510355820 A CN 201510355820A CN 106206480 A CN106206480 A CN 106206480A
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chip
interior pin
solder
solder mask
packaging structure
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CN201510355820.7A
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CN106206480B (zh
Inventor
石智仁
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Chipmos Technologies Inc
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Chipmos Technologies Bermuda Ltd
Chipmos Technologies Inc
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Abstract

本发明提供一种芯片封装结构及其制作方法，芯片封装结构包括导线架、芯片、多个焊料凸块、阻焊层以及封装胶体；导线架具有多个内引脚，各个内引脚具有上表面、下表面、相对的两侧表面及位于上表面的接合区；芯片设置于导线架上，且具有主动表面；各个焊料凸块接合主动表面与各个内引脚的接合区；阻焊层设置于各个内引脚的前述两侧表面或下表面的至少其中之一；封装胶体覆盖导线架、芯片、多个焊料凸块以及阻焊层。本发明可通过阻焊层的设置，在防止熔融的焊料凸块溢流至对应的内引脚的下表面的同时，缩减内引脚的宽度及任意两相邻的内引脚之间的间距，从而达到微间距的需求，且提升了芯片封装结构中的接点密度。

Description

芯片封装结构及其制作方法
技术领域
本发明是有关于一种封装结构及其制作方法，且特别是有关于一种芯片封装结构及其制作方法。
背景技术
近年来，随着电子技术的日新月异，高科技电子产业的相继问世，使得更人性化、功能更佳的电子产品不断地推陈出新，并朝向轻、薄、短、小的趋势设计。就芯片封装的技术而言，每一颗由晶圆切割所形成的芯片，例如是以打线接合或覆晶接合等方式而配置于承载器上，其中前述承载器可为导线架或基板。以导线架形式的覆晶封装结构为例，芯片是以其主动表面朝向导线架，并通过其主动表面上或导线架的引脚上的多个凸块使芯片与导线架接合。接着，当凸块为焊料凸块时，则需再进行回焊步骤，以使得各个凸块与对应的内引脚电性与结构性连接。最后，通过注模处理形成封装胶体，以覆盖导线架、芯片以及凸块，即完成导线架形式的覆晶封装结构的制作。
然而，在进行回焊步骤时，由于焊料凸块会处于熔融的状态，因此凸块与内引脚之间的沾附面积的大小将无法精确地控制。为避免熔融的凸块溢流至内引脚的下表面，可能导致回焊后成形的焊料凸块高度降低或不足，现行的作法是将内引脚的宽度设计为大于凸块的宽度。此举，虽可避免熔融的凸块溢流至内引脚的下表面，却也加大了任意两相邻的内引脚之间的间距，而无法达到微间距(fine pitch)的需求，也无法提升芯片封装结构中的接点密度。
发明内容
本发明提供一种芯片封装结构及其制作方法。
本发明提供一种芯片封装结构，其具有较高的接点密度。
本发明提供一种芯片封装结构的制作方法，其制作所得的芯片封装结构可具有较高的接点密度。
本发明的芯片封装结构，其包括导线架、芯片、多个焊料凸块、阻焊层以及封装胶体；导线架具有多个内引脚，各个内引脚具有上表面、下表面、连接上表面与下表面的相对两侧表面及位于上表面的接合区；芯片设置于导线架上，且具有主动表面；各个焊料凸块接合主动表面与各个内引脚的接合区；阻焊层设置于各个内引脚的前述两侧表面或下表面的至少其中之一，且至少对应各个内引脚的接合区；封装胶体覆盖导线架、芯片、多个焊料凸块以及阻焊层。
在本发明的一实施例中，上述的阻焊层覆盖各个内引脚的接合区正投影至下表面的范围，各个焊料凸块包覆对应的内引脚的上表面以及至少部分前述两侧表面。
在本发明的一实施例中，上述的阻焊层为阻焊胶带，连续地贴合于各个内引脚的下表面。
在本发明的一实施例中，上述的阻焊层还覆盖各个内引脚的接合区垂直延伸至前述两侧表面的部分范围。
在本发明的一实施例中，上述的阻焊层覆盖各个内引脚的接合区垂直延伸至两侧表面的部分范围，且各个焊料凸块包覆对应的内引脚的上表面以及部分前述两侧表面。
在本发明的一实施例中，上述的各个焊料凸块的宽度大于对应的内引脚的宽度。
在本发明的一实施例中，上述的阻焊层的材质包含镍、钛、钛钨合金、钯、铂、银、防焊油墨或绝缘树脂。
本发明提出一种芯片封装结构的制作方法，其包括以下步骤：首先，提供导线架，导线架具有多个内引脚，各个内引脚具有上表面、下表面、连接上表面与下表面的相对两侧表面及位于上表面的接合区；接着，形成阻焊层于各个内引脚的下表面或前述两侧表面的至少其中之一，且至少对应各个内引脚的接合区；覆晶接合芯片于导线架上，其中芯片具有主动表面，并通过多个焊料凸块使主动表面接合于各个内引脚的接合区；接着，回焊这些焊料凸块；之后，形成封装胶体，以覆盖导线架、芯片以及多个焊料凸块。
在本发明的一实施例中，在形成阻焊层于各个内引脚时，阻焊层覆盖各个内引脚的接合区正投影至下表面的范围。
在本发明的一实施例中，在回焊这些焊料凸块时，各个焊料凸块包覆对应的内引脚的上表面以及至少部分前述两侧表面。
在本发明的一实施例中，上述的阻焊层为阻焊胶带，连续地贴合于各个内引脚的下表面。
在本发明的一实施例中，上述的阻焊层还覆盖各个内引脚的接合区垂直延伸至两侧表面的部分范围。
在本发明的一实施例中，在形成阻焊层于各个内引脚时，阻焊层覆盖各个内引脚的接合区垂直延伸至两侧表面的部分范围。
在本发明的一实施例中，在回焊这些焊料凸块时，各个焊料凸块包覆对应的内引脚的上表面以及部分前述两侧表面。
在本发明的一实施例中，上述的芯片封装结构的制作方法还包括在形成封装胶体之前，移除阻焊层。
在本发明的一实施例中，在形成封装胶体时，封装胶体还覆盖阻焊层。
基于上述，本发明是在覆晶接合芯片与导线架之前，先于导线架的内引脚形成阻焊层，其中阻焊层可设置于内引脚的下表面或两侧表面。因此，在回焊位于芯片与导线架之间的焊料凸块以使焊料凸块与内引脚电性与结构性连接时，可防止熔融的焊料凸块溢流至内引脚的下表面，以确保焊料凸块成形后的高度可符合要求。相较于现有技术需将内引脚的宽度设计为大于凸块的宽度，才能避免熔融的凸块溢流至对应的内引脚的下表面，本发明可通过阻焊层的设置，在防止熔融的焊料凸块溢流至对应的内引脚的下表面的同时，缩减内引脚的宽度及任意两相邻的内引脚之间的间距，从而达到微间距的需求，且提升了芯片封装结构中的接点密度。
为让本发明的上述特征和优点能更明显易懂，下文特举实施例，并配合附图作详细说明如下。
附图说明
图1A至图1E为本发明一实施例的芯片封装结构的制作过程示意图；
图1F为图1E的芯片封装结构沿剖线A-A的局部剖面示意图；
图2A为本发明另一实施例的芯片封装结构的示意图；
图2B为图2A的芯片封装结构沿剖线B-B的局部剖面示意图；
图3A为本发明另一实施例的芯片封装结构的示意图；
图3B为图3A的芯片封装结构沿剖线C-C的局部剖面示意图；
图4A为本发明另一实施例的芯片封装结构的示意图；
图4B为图4A的芯片封装结构沿剖线D-D的局部剖面示意图。
附图标记说明：
100、100A～100C：芯片封装结构；
110：导线架；
111：内引脚；
112：上表面；
113：下表面；
114：侧表面；
115：接合区；
120、120a～120c：阻焊层；
130：芯片；
131：主动表面；
132、132a、132b：焊料凸块；
140：封装胶体。
具体实施方式
图1A至图1E为本发明一实施例的芯片封装结构的制作过程示意图。图1F为图1E的芯片封装结构沿剖线A-A的局部剖面示意图。首先，请参考图1A，提供导线架110，以作为承载器。导线架110具有多个内引脚111，其中各个内引脚111具有上表面112、相对于上表面112的下表面113、连接上表面112与下表面113的相对两侧表面114(示出于图1F)及位于上表面112的接合区115。
接着，请参考图1B，形成阻焊层120于各个内引脚111的下表面113，且至少对应各个内引脚111的接合区115。详细而言，阻焊层120例如是通过印刷处理形成于各个内引脚111的下表面113，且覆盖各个内引脚111的接合区115正投影至下表面113的范围，以与对应的内引脚111的接合区115相对准，其中阻焊层120的材质可为镍、钛、钛钨合金、钯、铂、银、防焊油墨或绝缘树脂，但本发明不限于此。
接着，请参考图1C，覆晶接合芯片130与导线架110，其中芯片130具有主动表面131。详细而言，芯片130是以其主动表面131朝向导线架110的各个内引脚111的上表面112而设置于导线架110上，并通过多个焊料凸块132接合于内引脚111的接合区115。如图1C所示，内引脚111的下表面113上的阻焊层120会与接合于内引脚111的接合区115上的焊料凸块132相对应，其中焊料凸块132的材质可为锡、银、铜、镍、铋、铟、锌、锑或上述金属的合金。
接着，请参考图1D，回焊这些焊料凸块132，以使各个焊料凸块132与对应的内引脚111电性与结构性连接。最后，请参考图1E，形成封装胶体140，以覆盖导线架110、芯片130、焊料凸块132以及阻焊层120。一般而言，封装胶体140可为环氧树脂或硅胶，用以防止芯片130、芯片130与导线架110之间的电性接点(即焊料凸块132)受到外界温度、湿气的影响以及杂尘污染。至此，芯片封装结构100的制作已大致完成。值得一提的是，就本实施例的芯片封装结构100的制作步骤而言，其可选择性地在形成封装胶体140之前，移除阻焊层120。
如图1E及图1F所示，经回焊后的各个焊料凸块132会包覆对应的内引脚111的上表面112以及至少部分两侧表面114。由于各个内引脚111的下表面113形成有阻焊层120，阻焊层120对于焊料具有不可润湿性(non-wettable)，因此在回焊各个焊料凸块132时，熔融的各个焊料凸块132因阻焊层120的阻隔及焊料的表面张力和内聚力，并不会溢流至对应的内引脚111的下表面113，而会止于对应的内引脚111的侧表面114并形成球形。另一方面，各个焊料凸块132的宽度可大于对应的内引脚111的宽度，且在各个焊料凸块132包覆对应的内引脚111的上表面112以及至少部分两侧表面114的情况下，可有效提高芯片130与导线架110之间的结合强度。
现有技术需将内引脚的宽度设计为大于凸块的宽度，才能避免熔融的凸块溢流至内引脚的侧表面或下表面。举例来说，当凸块的宽度为80微米(μm)时，内引脚的宽度约需130微米，且内引脚之间距约需250微米。相较于此，本实施例可通过阻焊层120的设置以防止熔融的各个焊料凸块132溢流至对应的内引脚111的下表面113。因此，本实施例的内引脚111的宽度可有效缩减，且内引脚111的间距也可相应地缩小，从而提升芯片封装结构100中的接点密度。举例来说，针对宽度同样为80微米的凸块而言，本实施例的内引脚111的宽度可缩减至约60微米，而内引脚111之间距可缩小至约200微米。
以下将列举其他实施例以作为说明。在此必须说明的是，下述实施例沿用前述实施例的元件附图标记与部分内容，其中采用相同的附图标记来表示相同或近似的元件，并且省略了相同技术内容的说明。关于省略部分的说明可参考前述实施例，下述实施例不再重复赘述。
图2A是本发明另一实施例的芯片封装结构的示意图。图2B为图2A的芯片封装结构沿剖线B-B的局部剖面示意图。请参考图2A与图2B，不同于上述实施例的芯片封装结构100的是，本实施例的芯片封装结构100A的阻焊层120a还覆盖各个内引脚111的接合区115垂直延伸至两侧表面114的部分范围。也就是说，通过在各个内引脚111的两侧表面114设置阻焊层120a，可在回焊各个焊料凸块132a时使熔融的各个焊料凸块132a受到阻焊层120a的阻挡而止于对应的内引脚111的侧表面114。特别说明的是，就本实施例的芯片封装结构100A的制作步骤而言，其是在形成阻焊层120a于各个内引脚111的下表面113的同时，也使阻焊层120a形成于各个内引脚111的两侧表面114的局部，以使阻焊层120a覆盖各个内引脚111的下表面113及其接合区115垂直延伸至两侧表面114的部分范围。值得一提的是，就本实施例的芯片封装结构100A的制作步骤而言，其可选择性地在形成封装胶体140之前，移除阻焊层120a。
另一方面，由于本实施例的芯片封装结构100A的内引脚111的侧表面114上也形成有阻焊层120a，因此回焊熔融后的焊料凸块132a在侧表面114上流动的距离会因为阻焊层120a的设置而缩减，并因受到阻焊层120a的阻隔而内聚成球形。反观上述实施例，其阻焊层120仅形成于各个内引脚111的下表面113，因此回焊熔融后的焊料凸块132可能会流动经过整个侧表面114才因受到阻焊层120的阻隔而内聚成球形。换言之，焊料凸块132a因回焊熔融而下沉的距离会较焊料凸块132小，使得芯片130与内引脚111的上表面112之间维持较大的间距。请同时参照图1F与图2B，本实施例的固化成形后的焊料凸块132a的轮廓外形与上述实施例的固化成形后的焊料凸块132的轮廓外形略有差异。举例来说，本实施例的固化成形后的焊料凸块132a的宽度比上述实施例的固化成形后的焊料凸块132的宽度宽。
图3A为本发明另一实施例的芯片封装结构的示意图。图3B为图3A的芯片封装结构沿剖线C-C的局部剖面示意图。请参考图3A与图3B，不同于上述实施例的芯片封装结构100A的是，本实施例的芯片封装结构100B的阻焊层120b仅覆盖各个内引脚111的接合区115垂直延伸至两侧表面114的部分范围，其中阻焊层120b例如是位于各个内引脚111相对靠近下表面113的一侧，惟局部设置于两侧表面114的阻焊层120b的所在位置当视实际需求而有所调整，本发明对此不加以限制。在其他实施例中，阻焊层120b也可自靠近下表面113的一侧延伸至靠近上表面112的另一侧。因此，本实施例的固化成形后的焊料凸块132b的轮廓外形与上述实施例的固化成形后的焊料凸块132或132a的轮廓外形可能相同或不同。特别说明的是，就本实施例的芯片封装结构100B的制作步骤而言，其是在对应各个内引脚111的接合区115垂直延伸至两侧表面114的部分范围形成阻焊层120b，使阻焊层120b仅覆盖各个内引脚111的两侧表面114的局部。值得一提的是，就本实施例的芯片封装结构100B的制作步骤而言，其可选择性地在形成封装胶体140之前，移除阻焊层120b。
图4A为本发明另一实施例的芯片封装结构的示意图。图4B为图4A的芯片封装结构沿剖线D-D的局部剖面示意图。请参考图4A与图4B，不同于上述实施例的芯片封装结构100、芯片封装结构100A或芯片封装结构100B的是，本实施例的芯片封装结构100C的阻焊层120c可为阻焊胶带，且连续地贴合于各个内引脚111的下表面113。特别说明的是，就本实施例的芯片封装结构100C的制作步骤而言，其可选择性地在形成封装胶体140之前，移除阻焊层120c。
综上所述，本发明是在覆晶接合芯片与导线架之前，先于导线架的内引脚形成阻焊层，其中阻焊层可设置于内引脚的下表面或两侧表面。因此，在回焊位于芯片与导线架之间的焊料凸块以使焊料凸块与内引脚电性与结构性连接时，可防止熔融的焊料凸块溢流至内引脚的下表面，以确保焊料凸块成形后的高度可符合芯片与导线架间的间距要求。相较于现有技术需将内引脚的宽度设计为大于凸块的宽度，才能避免熔融的凸块溢流至对应的内引脚的下表面，本发明可通过阻焊层的设置，在防止熔融的各个焊料凸块溢流至对应的内引脚的下表面的同时，缩减内引脚的宽度及任意两相邻的内引脚之间的间距，从而达到微间距的需求，且提升了芯片封装结构中的接点密度。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (16)

1.一种芯片封装结构，其特征在于，包括：
导线架，具有多个内引脚，各所述内引脚具有上表面、下表面、连接所述上表面与所述下表面的相对两侧表面及位于所述上表面的接合区；
芯片，设置于所述导线架上，且具有主动表面；
多个焊料凸块，各所述焊料凸块接合所述主动表面与各所述内引脚的所述接合区；
阻焊层，设置于各所述内引脚的所述两侧表面或所述下表面的至少其中之一，且至少对应各所述内引脚的所述接合区；以及
封装胶体，覆盖所述导线架、所述芯片、所述多个焊料凸块以及所述阻焊层。
2.根据权利要求1所述的芯片封装结构，其特征在于，所述阻焊层覆盖各所述内引脚的所述接合区正投影至所述下表面的范围，各所述焊料凸块包覆对应的所述内引脚的所述上表面以及至少部分所述两侧表面。
3.根据权利要求2所述的芯片封装结构，其特征在于，所述阻焊层为阻焊胶带，连续地贴合于各所述内引脚的所述下表面。
4.根据权利要求2所述的芯片封装结构，其特征在于，所述阻焊层还覆盖各所述内引脚的所述接合区垂直延伸至所述两侧表面的部分范围。
5.根据权利要求1所述的芯片封装结构，其特征在于，所述阻焊层覆盖各所述内引脚的所述接合区垂直延伸至所述两侧表面的部分范围，且各所述焊料凸块包覆对应的所述内引脚的所述上表面以及部分所述两侧表面。
6.根据权利要求1所述的芯片封装结构，其特征在于，各所述焊料凸块的宽度大于对应的所述内引脚的宽度。
7.根据权利要求1所述的芯片封装结构，其特征在于，所述阻焊层的材质包含镍、钛、钛钨合金、钯、铂、银、防焊油墨或绝缘树脂。
8.一种芯片封装结构的制作方法，其特征在于，包括：
提供导线架，所述导线架具有多个内引脚，各所述内引脚具有上表面、下表面、连接所述上表面与所述下表面的相对两侧表面及位于所述上表面的接合区；
形成阻焊层于各所述内引脚的所述两侧表面或所述下表面的至少其中之一，且至少对应各所述内引脚的所述接合区；
覆晶接合芯片于所述导线架上，其中所述芯片具有主动表面，并通过多个焊料凸块使所述主动表面接合于各所述内引脚的所述接合区；
回焊所述多个焊料凸块；以及
形成封装胶体，以覆盖所述导线架、所述芯片以及所述多个焊料凸块。
9.根据权利要求8所述的芯片封装结构的制作方法，其特征在于，在形成所述阻焊层于各所述内引脚时，所述阻焊层覆盖各所述内引脚的所述接合区正投影至所述下表面的范围。
10.根据权利要求9所述的芯片封装结构的制作方法，其特征在于，在回焊所述多个焊料凸块时，各所述焊料凸块包覆对应的所述内引脚的所述上表面以及至少部分所述两侧表面。
11.根据权利要求9所述的芯片封装结构的制作方法，其特征在于，所述阻焊层为阻焊胶带，连续地贴合于各所述内引脚的所述下表面。
12.根据权利要求9所述的芯片封装结构的制作方法，其特征在于，所述阻焊层还覆盖各所述内引脚的所述接合区垂直延伸至所述两侧表面的部分范围。
13.根据权利要求8所述的芯片封装结构的制作方法，其特征在于，在形成所述阻焊层于各所述内引脚时，所述阻焊层覆盖各所述内引脚的所述接合区垂直延伸至所述两侧表面的部分范围。
14.根据权利要求13所述的芯片封装结构的制作方法，其特征在于，在回焊所述多个焊料凸块时，各所述焊料凸块包覆对应的所述内引脚的所述上表面以及部分所述两侧表面。
15.根据权利要求8所述的芯片封装结构的制作方法，其特征在于，还包括：
在形成所述封装胶体之前，移除所述阻焊层。
16.根据权利要求8所述的芯片封装结构的制作方法，其特征在于，在形成所述封装胶体时，所述封装胶体还覆盖所述阻焊层。
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