TW201640596A - 晶片封裝結構及其製作方法 - Google Patents

晶片封裝結構及其製作方法 Download PDF

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Publication number
TW201640596A
TW201640596A TW104114146A TW104114146A TW201640596A TW 201640596 A TW201640596 A TW 201640596A TW 104114146 A TW104114146 A TW 104114146A TW 104114146 A TW104114146 A TW 104114146A TW 201640596 A TW201640596 A TW 201640596A
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Taiwan
Prior art keywords
package structure
solder resist
resist layer
inner leads
chip package
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TW104114146A
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English (en)
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TWI562255B (en
Inventor
石智仁
Original Assignee
南茂科技股份有限公司
百慕達南茂科技股份有限公司
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Application filed by 南茂科技股份有限公司, 百慕達南茂科技股份有限公司 filed Critical 南茂科技股份有限公司
Priority to TW104114146A priority Critical patent/TWI562255B/zh
Priority to CN201510355820.7A priority patent/CN106206480B/zh
Priority to US14/874,486 priority patent/US20160329269A1/en
Publication of TW201640596A publication Critical patent/TW201640596A/zh
Application granted granted Critical
Publication of TWI562255B publication Critical patent/TWI562255B/zh

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    • H01L23/495—Lead-frames or other flat leads
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Abstract

一種晶片封裝結構，其包括導線架、晶片、多個焊料凸塊、阻焊層以及封裝膠體。導線架具有多個內引腳。各個內引腳具有上表面、下表面、相對的兩側表面及位於上表面的接合區。晶片設置於導線架上，且具有主動表面。各個焊料凸塊接合主動表面與各個內引腳的接合區。阻焊層設置於各個內引腳的前述兩側表面或下表面的至少其中之一。封裝膠體覆蓋導線架、晶片、這些焊料凸塊以及阻焊層。另提出一種晶片封裝結構的製作方法。

Description

晶片封裝結構及其製作方法
本發明是有關於一種封裝結構及其製作方法，且特別是有關於一種晶片封裝結構及其製作方法。
近年來，隨著電子技術的日新月異，高科技電子產業的相繼問世，使得更人性化、功能更佳的電子產品不斷地推陳出新，並朝向輕、薄、短、小的趨勢設計。就晶片封裝的技術而言，每一顆由晶圓切割所形成的晶片，例如是以打線接合或覆晶接合等方式而配置於承載器上，其中前述承載器可為導線架或基板。以導線架型式的覆晶封裝結構為例，晶片是以其主動表面朝向導線架，並透過其主動表面上或導線架之引腳上的多個凸塊使晶片與導線架接合。接著，當凸塊為焊料凸塊時，則需再進行回焊步驟，以使得各個凸塊與對應的內引腳電性與結構性連接。最後，藉由注模製程形成封裝膠體，以覆蓋導線架、晶片以及凸塊，即完成導線架型式的覆晶封裝結構的製作。
然而，在進行回焊步驟時，由於焊料凸塊會處於熔融的狀態，因此凸塊與內引腳之間的沾附面積的大小將無法精確地控制。為避免熔融的凸塊溢流至內引腳的下表面，可能導致回焊後成形之焊料凸塊高度降低或不足，現行的作法是將內引腳的寬度設計大於凸塊的寬度。此舉，雖可避免熔融的凸塊溢流至內引腳的下表面，卻也加大了任兩相鄰的內引腳之間的間距，而無法達到微間距(fine pitch)的需求，也無法提升晶片封裝結構中的接點密度。
本發明提供一種晶片封裝結構，其具有較高的接點密度。
本發明提供一種晶片封裝結構的製作方法，其製作所得的晶片封裝結構可具有較高的接點密度。
本發明提出一種晶片封裝結構，其包括導線架、晶片、多個焊料凸塊、阻焊層以及封裝膠體。導線架具有多個內引腳。各個內引腳具有上表面、下表面、連接上表面與下表面的相對兩側表面及位於上表面的接合區。晶片設置於導線架上，且具有主動表面。各個焊料凸塊接合主動表面與各個內引腳的接合區。阻焊層設置於各個內引腳的前述兩側表面或下表面的至少其中之一，且至少對應各個內引腳的接合區。封裝膠體覆蓋導線架、晶片、這些焊料凸塊以及阻焊層。
在本發明的一實施例中，上述的阻焊層覆蓋各個內引腳 的接合區正投影至下表面的範圍。各個焊料凸塊包覆對應的內引腳的上表面以及至少部分前述兩側表面。
在本發明的一實施例中，上述的阻焊層為阻焊膠帶，連續地貼合於各個內引腳的下表面。
在本發明的一實施例中，上述的阻焊層更覆蓋各個內引腳的接合區垂直延伸至前述兩側表面的部分範圍。
在本發明的一實施例中，上述的阻焊層覆蓋各個內引腳的接合區垂直延伸至兩側表面的部分範圍，且各個焊料凸塊包覆對應的內引腳的上表面以及部分前述兩側表面。
在本發明的一實施例中，上述的各個焊料凸塊的寬度大於對應的內引腳的寬度。
在本發明的一實施例中，上述的阻焊層的材質包含鎳、鈦、鈦鎢合金、鈀、鉑、銀、防焊油墨或絕緣樹脂。
本發明提出一種晶片封裝結構的製作方法，其包括以下步驟。首先，提供導線架，導線架具有多個內引腳。各個內引腳具有上表面、下表面、連接上表面與下表面的相對兩側表面及位於上表面的接合區。接著，形成阻焊層於各個內引腳的下表面或前述兩側表面的至少其中之一，且至少對應各個內引腳的接合區。覆晶接合晶片於導線架上，其中晶片具有主動表面，並藉由多個焊料凸塊使主動表面接合於各個內引腳的接合區。接著，迴焊這些焊料凸塊。之後，形成封裝膠體，以覆蓋導線架、晶片以及這些焊料凸塊。
在本發明的一實施例中，在形成阻焊層於各個內引腳時，阻焊層覆蓋各個內引腳的接合區正投影至下表面的範圍。
在本發明的一實施例中，在迴焊這些焊料凸塊時，各個焊料凸塊包覆對應的內引腳的上表面以及至少部分前述兩側表面。
在本發明的一實施例中，上述的阻焊層為阻焊膠帶，連續地貼合於各個內引腳的下表面。
在本發明的一實施例中，上述的阻焊層更覆蓋各個內引腳的接合區垂直延伸至兩側表面的部分範圍。
在本發明的一實施例中，在形成阻焊層於各個內引腳時，阻焊層覆蓋各個內引腳的接合區垂直延伸至兩側表面的部分範圍。
在本發明的一實施例中，在迴焊這些焊料凸塊時，各個焊料凸塊包覆對應的內引腳的上表面以及部分前述兩側表面。
在本發明的一實施例中，上述的晶片封裝結構的製作方法更包括在形成封裝膠體之前，移除阻焊層。
在本發明的一實施例中，在形成封裝膠體時，封裝膠體更覆蓋阻焊層。
基於上述，本發明是在覆晶接合晶片與導線架之前，先於導線架的內引腳形成阻焊層，其中阻焊層可設置於內引腳的下表面或兩側表面。因此，在迴焊位於晶片與導線架之間的焊料凸塊以使焊料凸塊與內引腳電性與結構性連接時，可防止熔融的焊 料凸塊溢流至內引腳的下表面，以確保焊料凸塊成形後之高度可符合要求。相較於習知技術需將內引腳的寬度設計大於凸塊的寬度，才能避免熔融的凸塊溢流至對應的內引腳的下表面，本發明可透過阻焊層的設置，在防止熔融的焊料凸塊溢流至對應的內引腳的下表面的同時，縮減內引腳之寬度及任兩相鄰的內引腳之間的間距，從而達到微間距的需求，且提升晶片封裝結構中的接點密度。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
100、100A~100C‧‧‧晶片封裝結構
110‧‧‧導線架
111‧‧‧內引腳
112‧‧‧上表面
113‧‧‧下表面
114‧‧‧側表面
115‧‧‧接合區
120、120a~120c‧‧‧阻焊層
130‧‧‧晶片
131‧‧‧主動表面
132、132a、132b‧‧‧焊料凸塊
140‧‧‧封裝膠體
圖1A至圖1E繪示出本發明一實施例的晶片封裝結構的製作過程。
圖1F是圖1E的晶片封裝結構沿剖線A-A的局部剖面示意圖。
圖2A是本發明另一實施例的晶片封裝結構的示意圖。
圖2B是圖2A的晶片封裝結構沿剖線B-B的局部剖面示意圖。
圖3A是本發明另一實施例的晶片封裝結構的示意圖。
圖3B是圖3A的晶片封裝結構沿剖線C-C的局部剖面示意圖
圖4A是本發明另一實施例的晶片封裝結構的示意圖。
圖4B是圖4A的晶片封裝結構沿剖線D-D的局部剖面示意圖。
圖1A至圖1E繪示出本發明一實施例的晶片封裝結構的製作過程。圖1F是圖1E的晶片封裝結構沿剖線A-A的局部剖面示意圖。首先，請參考圖1A，提供導線架110，以作為承載器。導線架110具有多個內引腳111，其中各個內引腳111具有上表面112、相對於上表面112的下表面113、連接上表面112與下表面113的相對兩側表面114(繪示於圖1F)及位於上表面112的接合區115。
接著，請參考圖1B，形成阻焊層120於各個內引腳111的下表面113，且至少對應各個內引腳111的接合區115。詳細而言，阻焊層120例如是透過印刷製程形成於各個內引腳111的下表面113，且覆蓋各個內引腳111的接合區115正投影至下表面113的範圍，以與對應的內引腳111的接合區115相對準，其中阻焊層120的材質可為鎳、鈦、鈦鎢合金、鈀、鉑、銀、防焊油墨或絕緣樹脂，但本發明不限於此。
接著，請參考圖1C，覆晶接合晶片130與導線架110，其中晶片130具有主動表面131。詳細而言，晶片130是以其主動表面131朝向導線架110的各個內引腳111的上表面112而設置於導線架110上，並藉由多個焊料凸塊132接合於內引腳111的 接合區115。如圖1C所示，內引腳111的下表面113上的阻焊層120會與接合於內引腳111的接合區115上的焊料凸塊132相對應，其中焊料凸塊132的材質可為錫、銀、銅、鎳、鉍、銦、鋅、銻或上述金屬的合金。
接著，請參考圖1D，迴焊這些焊料凸塊132，以使各個焊料凸塊132與對應的內引腳111電性與結構性連接。最後，請參考圖1E，形成封裝膠體140，以覆蓋導線架110、晶片130、焊料凸塊132以及阻焊層120。一般而言，封裝膠體140可為環氧樹脂或矽膠，用以防止晶片130、晶片130與導線架110之間的電性接點(即焊料凸塊132)受到外界溫度、濕氣的影響以及雜塵污染。至此，晶片封裝結構100的製作已大致完成。值得一提的是，就本實施例的晶片封裝結構100的製作步驟而言，其可選擇性地在形成封裝膠體140之前，移除阻焊層120。
如圖1E及圖1F所示，經回焊後的各個焊料凸塊132會包覆對應的內引腳111的上表面112以及至少部分兩側表面114。由於各個內引腳111的下表面113形成有阻焊層120，阻焊層120對於焊料具有不可潤濕性(non-wettable)，因此在回焊各個焊料凸塊132時，熔融的各個焊料凸塊132因阻焊層120的阻隔及焊料的表面張力和內聚力，並不會溢流至對應的內引腳111的下表面113，而會止於對應的內引腳111的側表面114並形成球形。另一方面，各個焊料凸塊132的寬度可大於對應的內引腳111的寬度，且在各個焊料凸塊132包覆對應的內引腳111的上表面112以及 至少部分兩側表面114的情況下，可有效提高晶片130與導線架110之間的結合強度。
習知技術需將內引腳的寬度設計大於凸塊的寬度，才能避免熔融的凸塊溢流至內引腳的側表面或下表面。舉例來說，當凸塊的寬度為80微米(μm)時，內引腳的寬度約需130微米，且內引腳之間距約需250微米。相較於此，本實施例可透過阻焊層120的設置以防止熔融的各個焊料凸塊132溢流至對應的內引腳111的下表面113。因此，本實施例的內引腳111的寬度可有效縮減，且內引腳111的間距亦可相應地縮小，從而提升晶片封裝結構100中的接點密度。舉例來說，針對寬度同樣為80微米的凸塊而言，本實施例的內引腳111之寬度可縮減至約60微米，而內引腳111之間距可縮小至約200微米。
以下將列舉其他實施例以作為說明。在此必須說明的是，下述實施例沿用前述實施例的元件標號與部分內容，其中採用相同的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例，下述實施例不再重複贅述。
圖2A是本發明另一實施例的晶片封裝結構的示意圖。圖2B是圖2A的晶片封裝結構沿剖線B-B的局部剖面示意圖。請參考圖2A與圖2B，不同於上述實施例的晶片封裝結構100的是，本實施例的晶片封裝結構100A的阻焊層120a更覆蓋各個內引腳111的接合區115垂直延伸至兩側表面114的部分範圍。也就是 說，藉由在各個內引腳111的兩側表面114設置阻焊層120a，可於回焊各個焊料凸塊132a時使熔融的各個焊料凸塊132a受到阻焊層120a的阻擋而止於對應的內引腳111的側表面114。特別說明的是，就本實施例的晶片封裝結構100A的製作步驟而言，其是在形成阻焊層120a於各個內引腳111的下表面113的同時，亦使阻焊層120a形成於各個內引腳111的兩側表面114的局部，以使阻焊層120a覆蓋各個內引腳111的下表面113及其接合區115垂直延伸至兩側表面114的部分範圍。值得一提的是，就本實施例的晶片封裝結構100A的製作步驟而言，其可選擇性地在形成封裝膠體140之前，移除阻焊層120a。
另一方面，由於本實施例的晶片封裝結構100A的內引腳111的側表面114上亦形成有阻焊層120a，因此回焊熔融後的焊料凸塊132a於側表面114上流動的距離會因為阻焊層120a的設置而縮減，並因受到阻焊層120a的阻隔而內聚成球形。反觀上述實施例，其阻焊層120僅形成於各個內引腳111的下表面113，因此回焊熔融後的焊料凸塊132可能會流動經過整個側表面114才因受到阻焊層120的阻隔而內聚成球形。換言之，焊料凸塊132a因回焊熔融而下沉的距離會較焊料凸塊132小，使得晶片130與內引腳111的上表面112之間維持較大之間距。請同時參照圖1F與圖2B，本實施例的固化成形後的焊料凸塊132a的輪廓外型與上述實施例的固化成形後的焊料凸塊132的輪廓外型略有差異。舉例來說，本實施例的固化成形後的焊料凸塊132a的寬度是較上 述實施例的固化成形後的焊料凸塊132的寬度為寬。
圖3A是本發明另一實施例的晶片封裝結構的示意圖。圖3B是圖3A的晶片封裝結構沿剖線C-C的局部剖面示意圖。請參考圖3A與圖3B，不同於上述實施例的晶片封裝結構100A的是，本實施例的晶片封裝結構100B的阻焊層120b僅覆蓋各個內引腳111的接合區115垂直延伸至兩側表面114的部分範圍，其中阻焊層120b例如是位於各個內引腳111相對靠近下表面113的一側，惟局部設置於兩側表面114的阻焊層120b的所在位置當視實際需求而有所調整，本發明對此不加以限制。在其他實施例中，阻焊層120b亦可自靠近下表面113的一側延伸至靠近上表面112的另一側。因此，本實施例的固化成形後的焊料凸塊132b的輪廓外型與上述實施例的固化成形後的焊料凸塊132或132a的輪廓外型可能相同或不同。特別說明的是，就本實施例的晶片封裝結構100B的製作步驟而言，其是在對應各個內引腳111的接合區115垂直延伸至兩側表面114的部分範圍形成阻焊層120b，使阻焊層120b僅覆蓋各個內引腳111的兩側表面114的局部。值得一提的是，就本實施例的晶片封裝結構100B的製作步驟而言，其可選擇性地在形成封裝膠體140之前，移除阻焊層120b。
圖4A是本發明另一實施例的晶片封裝結構的示意圖。圖4B是圖4A的晶片封裝結構沿剖線D-D的局部剖面示意圖。請參考圖4A與圖4B，不同於上述實施例的晶片封裝結構100、晶片封裝結構100A或晶片封裝結構100B的是，本實施例的晶片封裝結 構100C的阻焊層120c可為阻焊膠帶，且連續地貼合於各個內引腳111的下表面113。特別說明的是，就本實施例的晶片封裝結構100C的製作步驟而言，其可選擇性地在形成封裝膠體140之前，移除阻焊層120c。
綜上所述，本發明是在覆晶接合晶片與導線架之前，先於導線架的內引腳形成阻焊層，其中阻焊層可設置於內引腳的下表面或兩側表面。因此，在回焊位於晶片與導線架之間的焊料凸塊以使焊料凸塊與內引腳電性與結構性連接時，可防止熔融的焊料凸塊溢流至內引腳的下表面，以確保焊料凸塊成形後之高度可符合晶片與導線架間之間距要求。相較於習知技術需將內引腳的寬度設計大於凸塊的寬度，才能避免熔融的凸塊溢流至對應的內引腳的下表面，本發明可透過阻焊層的設置，在防止熔融的各個焊料凸塊溢流至對應的內引腳的下表面的同時，縮減內引腳之寬度及任兩相鄰的內引腳之間的間距，從而達到微間距的需求，且提升晶片封裝結構中的接點密度。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100‧‧‧晶片封裝結構
110‧‧‧導線架
111‧‧‧內引腳
112‧‧‧上表面
113‧‧‧下表面
114‧‧‧側表面
120‧‧‧阻焊層
130‧‧‧晶片
131‧‧‧主動表面
132‧‧‧焊料凸塊
140‧‧‧封裝膠體

Claims (16)

  1. 一種晶片封裝結構，包括：一導線架，具有多個內引腳，各該內引腳具有一上表面、一下表面、連接該上表面與該下表面的相對兩側表面及位於該上表面的一接合區；一晶片，設置於該導線架上，且具有一主動表面；多個焊料凸塊，各該焊料凸塊接合該主動表面與各該內引腳的該接合區；一阻焊層，設置於各該內引腳的該兩側表面或該下表面的至少其中之一，且至少對應各該內引腳的該接合區；以及一封裝膠體，覆蓋該導線架、該晶片、該些焊料凸塊以及該阻焊層。
  2. 如申請專利範圍第1項所述的晶片封裝結構，其中該阻焊層覆蓋各該內引腳的該接合區正投影至該下表面的範圍，各該焊料凸塊包覆對應的該內引腳的該上表面以及至少部分該兩側表面。
  3. 如申請專利範圍第2項所述的晶片封裝結構，其中該阻焊層為一阻焊膠帶，連續地貼合於各該內引腳的該下表面。
  4. 如申請專利範圍第2項所述的晶片封裝結構，其中該阻焊層更覆蓋各該內引腳的該接合區垂直延伸至該兩側表面的部分範圍。
  5. 如申請專利範圍第1項所述的晶片封裝結構，其中該阻焊 層覆蓋各該內引腳的該接合區垂直延伸至該兩側表面的部分範圍，且各該焊料凸塊包覆對應的該內引腳的該上表面以及部分該兩側表面。
  6. 如申請專利範圍第1項所述的晶片封裝結構，其中各該焊料凸塊的寬度大於對應的該內引腳的寬度。
  7. 如申請專利範圍第1項所述的晶片封裝結構，其中該阻焊層的材質包含鎳、鈦、鈦鎢合金、鈀、鉑、銀、防焊油墨或絕緣樹脂。
  8. 一種晶片封裝結構的製作方法，包括：提供一導線架，該導線架具有多個內引腳，各該內引腳具有一上表面、一下表面、連接該上表面與該下表面的相對兩側表面及位於該上表面的一接合區；形成一阻焊層於各該內引腳的該兩側表面或該下表面的至少其中之一，且至少對應各該內引腳的該接合區；覆晶接合一晶片於該導線架上，其中該晶片具有一主動表面，並藉由多個焊料凸塊使該主動表面接合於各該內引腳的該接合區；迴焊該些焊料凸塊；以及形成一封裝膠體，以覆蓋該導線架、該晶片以及該些焊料凸塊。
  9. 如申請專利範圍第8項所述的晶片封裝結構的製作方法，其中在形成該阻焊層於各該內引腳時，該阻焊層覆蓋各該內引腳 的該接合區正投影至該下表面的範圍。
  10. 如申請專利範圍第9項所述的晶片封裝結構的製作方法，其中在迴焊該些焊料凸塊時，各該焊料凸塊包覆對應的該內引腳的該上表面以及至少部分該兩側表面。
  11. 如申請專利範圍第9項所述的晶片封裝結構的製作方法，其中該阻焊層為一阻焊膠帶，連續地貼合於各該內引腳的該下表面。
  12. 如申請專利範圍第9項所述的晶片封裝結構的製作方法，其中該阻焊層更覆蓋各該內引腳的該接合區垂直延伸至該兩側表面的部分範圍。
  13. 如申請專利範圍第8項所述的晶片封裝結構的製作方法，其中在形成該阻焊層於各該內引腳時，該阻焊層覆蓋各該內引腳的該接合區垂直延伸至該兩側表面的部分範圍。
  14. 如申請專利範圍第13項所述的晶片封裝結構的製作方法，其中在迴焊該些焊料凸塊時，各該焊料凸塊包覆對應的該內引腳的該上表面以及部分該兩側表面。
  15. 如申請專利範圍第8項所述的晶片封裝結構的製作方法，更包括：在形成該封裝膠體之前，移除該阻焊層。
  16. 如申請專利範圍第8項所述的晶片封裝結構的製作方法，其中在形成該封裝膠體時，該封裝膠體更覆蓋該阻焊層。
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