CN106068565B - 受应力鳍NMOS FinFET的方法和装置 - Google Patents

受应力鳍NMOS FinFET的方法和装置 Download PDF

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Publication number
CN106068565B
CN106068565B CN201580010571.6A CN201580010571A CN106068565B CN 106068565 B CN106068565 B CN 106068565B CN 201580010571 A CN201580010571 A CN 201580010571A CN 106068565 B CN106068565 B CN 106068565B
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CN
China
Prior art keywords
fin
region
embedded
stressor element
channel region
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Expired - Fee Related
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CN201580010571.6A
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English (en)
Chinese (zh)
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CN106068565A (zh
Inventor
J·J·徐
C·F·耶普
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Qualcomm Inc
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Qualcomm Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/798—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being provided in or under the channel regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
CN201580010571.6A 2014-02-28 2015-02-17 受应力鳍NMOS FinFET的方法和装置 Expired - Fee Related CN106068565B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461946105P 2014-02-28 2014-02-28
US61/946,105 2014-02-28
US14/281,660 2014-05-19
US14/281,660 US9306066B2 (en) 2014-02-28 2014-05-19 Method and apparatus of stressed FIN NMOS FinFET
PCT/US2015/016081 WO2015130507A1 (en) 2014-02-28 2015-02-17 Method and apparatus of stressed fin nmos finfet

Publications (2)

Publication Number Publication Date
CN106068565A CN106068565A (zh) 2016-11-02
CN106068565B true CN106068565B (zh) 2019-05-10

Family

ID=54007149

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580010571.6A Expired - Fee Related CN106068565B (zh) 2014-02-28 2015-02-17 受应力鳍NMOS FinFET的方法和装置

Country Status (5)

Country Link
US (1) US9306066B2 (enExample)
EP (1) EP3111481A1 (enExample)
JP (1) JP2017506830A (enExample)
CN (1) CN106068565B (enExample)
WO (1) WO2015130507A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9391074B1 (en) * 2015-04-21 2016-07-12 International Business Machines Corporation Structure for FinFET fins
CN106549053B (zh) * 2015-09-17 2021-07-27 联华电子股份有限公司 半导体结构及其制作方法
US9904758B2 (en) * 2016-05-18 2018-02-27 Samsung Electronics Co., Ltd. Using deep sub-micron stress effects and proximity effects to create a high performance standard cell
US10644112B2 (en) 2016-09-28 2020-05-05 Intel Corporation Systems, methods and devices for isolation for subfin leakage
US10276693B1 (en) * 2017-10-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10374089B2 (en) 2017-12-22 2019-08-06 International Business Machines Corporation Tensile strain in NFET channel

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030111699A1 (en) * 2001-12-14 2003-06-19 Christoph Wasshuber Methods and apparatus for inducing stress in a semiconductor device
US20110198695A1 (en) * 2010-02-18 2011-08-18 International Business Machines Corporation Strained Semiconductor Structures and Method of Fabricating Strained Semiconductor Structures
CN101924107B (zh) * 2010-07-15 2012-09-26 电子科技大学 一种应力增强的cmos晶体管结构

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6887751B2 (en) 2003-09-12 2005-05-03 International Business Machines Corporation MOSFET performance improvement using deformation in SOI structure
US8450806B2 (en) * 2004-03-31 2013-05-28 International Business Machines Corporation Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby
JP2007088158A (ja) * 2005-09-21 2007-04-05 Toshiba Corp 半導体装置およびその製造方法
US20070257310A1 (en) 2006-05-02 2007-11-08 Honeywell International Inc. Body-tied MOSFET device with strained active area
US7462916B2 (en) 2006-07-19 2008-12-09 International Business Machines Corporation Semiconductor devices having torsional stresses
US20080121948A1 (en) 2006-08-16 2008-05-29 International Business Machines Corporation FINFET drive strength de-quantization using multiple orientation fins
US8623728B2 (en) 2009-07-28 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming high germanium concentration SiGe stressor
WO2011121776A1 (ja) 2010-03-31 2011-10-06 株式会社 東芝 半導体装置の製造方法
US8278175B2 (en) 2010-06-10 2012-10-02 International Business Machines Corporation Compressively stressed FET device structures
US8647935B2 (en) 2010-12-17 2014-02-11 International Business Machines Corporation Buried oxidation for enhanced mobility
US8492235B2 (en) * 2010-12-29 2013-07-23 Globalfoundries Singapore Pte. Ltd. FinFET with stressors
US8981481B2 (en) 2012-06-28 2015-03-17 Intel Corporation High voltage three-dimensional devices having dielectric liners
US8823060B1 (en) 2013-02-20 2014-09-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method for inducing strain in FinFET channels
US8969155B2 (en) * 2013-05-10 2015-03-03 International Business Machines Corporation Fin structure with varying isolation thickness

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030111699A1 (en) * 2001-12-14 2003-06-19 Christoph Wasshuber Methods and apparatus for inducing stress in a semiconductor device
US20110198695A1 (en) * 2010-02-18 2011-08-18 International Business Machines Corporation Strained Semiconductor Structures and Method of Fabricating Strained Semiconductor Structures
CN101924107B (zh) * 2010-07-15 2012-09-26 电子科技大学 一种应力增强的cmos晶体管结构

Also Published As

Publication number Publication date
WO2015130507A1 (en) 2015-09-03
US9306066B2 (en) 2016-04-05
US20150249155A1 (en) 2015-09-03
JP2017506830A (ja) 2017-03-09
EP3111481A1 (en) 2017-01-04
CN106068565A (zh) 2016-11-02

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