CN106057768A - 具有不连续聚合物层的扇出pop结构 - Google Patents

具有不连续聚合物层的扇出pop结构 Download PDF

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Publication number
CN106057768A
CN106057768A CN201610230022.6A CN201610230022A CN106057768A CN 106057768 A CN106057768 A CN 106057768A CN 201610230022 A CN201610230022 A CN 201610230022A CN 106057768 A CN106057768 A CN 106057768A
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China
Prior art keywords
dielectric layer
opening
hole
packaging part
tube core
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CN201610230022.6A
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CN106057768B (zh
Inventor
蔡宜霖
张智尧
林俊成
刘乃玮
符策忠
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种封装件包括器件管芯、其中模制器件管芯的至少一部分的模制材料以及基本穿透模制材料的通孔。该封装件还包括接触通孔和模制材料的介电层以及附接至器件管芯的背侧的管芯附接膜。管芯附接膜包括延伸到介电层中的部分。本发明还提供了具有不连续聚合物层的扇出POP结构。

Description

具有不连续聚合物层的扇出POP结构
技术领域
本发明一般地涉及半导体技术领域，更具体地，涉及封装件及其制造方法。
背景技术
现代电路的制造通常包括多个步骤。首先在包含多个完全相同的半导体芯片(每一个都包括集成电路)的半导体晶圆上制造集成电路。然后，从晶圆锯切半导体芯片并进行封装。封装工艺具有两个主要目的：保护易损坏的半导体芯片以及将内部集成电路连接至外部管脚。
随着对更多功能的需求的日益增加，开发了堆叠封装(PoP)技术，其中两个或多个封装件被接合以扩展封装件的集成能力。随着高度的集成，得益于部件之间缩短的连接路径，可以提高所得到的PoP封装件的电性能。通过使用PoP技术，封装设计变得更加灵活且复杂度降低。还减少了上市时间。
发明内容
为了解决现有技术中所存在的缺陷，根据本发明的一方面，提供了一种封装件，包括：器件管芯；模制材料，其中模制所述器件管芯的至少一部分；通孔，基本穿透所述模制材料；介电层，接触所述通孔和所述模制材料；以及管芯附接膜，附接至所述器件管芯的背侧，其中所述管芯附接膜包括延伸到所述介电层中的部分。
根据本发明的另一方面，提供了一种封装件，包括：聚合物层，其中具有开口；管芯附接膜，至少一部分位于所述开口中；器件管芯，具有附接至所述管芯附接膜的背侧；以及模塑料，所述器件管芯模制在所述模塑料中，所述聚合物层接触所述模塑料。
根据本发明的又一方面，提供了一种方法，包括：在载体上方形成聚合物层；图案化所述聚合物层以形成第一开口；在图案化的聚合物层上方形成通孔；放置器件管芯，附接至所述器件管芯的管芯附接膜的至少一部分位于所述第一开口中；在模塑料中模制所述器件管芯和所述通孔；形成电耦合至所述器件管芯和所述通孔的再分布线；从所述聚合物层去除所述载体；以及在所述聚合物层中形成第二开口以露出所述通孔。
附图说明
当阅读附图时，根据以下详细的描述来更好地理解本发明的各个方面。注意，根据工业的标准实践，各个部件没有按比例绘制。实际上，为了讨论的清楚，可以任意地增加或减小各个部件的尺寸。
图1至图15A示出了根据一些实施例的形成扇出堆叠封装(PoP)封装件的中间阶段的截面图；
图15B示出了根据可选实施例的扇出PoP封装件的截面图；
图16A和图16B示出了根据一些实施例的扇出PoP封装件的俯视图；以及
图17示出了根据一些实施例的用于形成PoP封装件的工艺流程。
具体实施方式
以下公开内容提供了许多不同的用于实施本发明主题的不同特征的实施例或实例。以下描述部件或配置的具体实例以简化本发明。当然，这些仅仅是实例而不用于限制。例如，在以下的描述中，在第二部件上方或之上形成第一部件可以包括第一部件和第二部件被形成为直接接触的实施例，并且也可以包括可以在第一部件和第二部件形成附件部件使得第一部件和第二部分没有直接接触的实施例。此外，本发明可以在各个实例中重复参考标号和/或字母。这些重复是为了简化和清楚，其本身并不表示所讨论的各个实施例和/或结构之间的关系。
此外，为了易于描述，可以使用空间相对术语(诸如“在…下方”、“之下”、“下部”、“上方”、“上部”等)以描述图中所示一个元件或部件与另一个元件或部件的关系。除图中所示的定向之外，空间相对术语意欲还包括使用或操作中设备的不同定向。装置可以以其他方式定向(旋转90度或处于其他定向)，本文所使用的空间相对描述可因此进行类似的解释。
根据各个示例性实施例，提供了扇出(fan-out，又称多输出)堆叠封装(PoP)结构/封装件以及形成封装件的方法。讨论的实施例的变形例。在各个附图和所示实施例中，相同的参考标号用于表示相同的元件。
图1至图15A示出了根据一些实施例的形成封装件的中间阶段的截面图。还在图17所示的工艺流程200中示意性示出了图1至图15B所示的步骤。在随后讨论中，参照图17中的工艺步骤讨论图1至图15A所示的工艺步骤。
参照图1，提供了载体30，并且在载体30上方设置粘合层32。载体30可以是空白玻璃载体、空白陶瓷载体等，并且在俯视图中可以具有圆形的半导体晶圆的形状。载体30有时被称为载体晶圆。粘合层32例如可以由光热转换(LTHC)材料形成，但是还可以使用其他类型的粘合剂。根据本发明的一些实施例，粘合层32能够在光加热的情况下分解，因此可以从形成在其上的结构释放载体30。
介电层34形成在粘合层32上方。在图17所示的工艺流程中将对应步骤示出为步骤202。根据本发明的一些实施例，介电层34是由聚合物形成的聚合物层，其可以是诸如聚苯并恶唑(PCB)、聚酰亚胺等的光敏聚合物。根据可选实施例，介电层34由氮化物(诸如氮化硅)、氧化物(诸如氧化硅)、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、掺硼磷硅酸盐玻璃(BPSG)等形成。
参照图2，介电层34被图案化以在其中形成开口38。在图17所示的工艺流程中将对应步骤示出为步骤204。开口38是通孔。因此，根据本发明的一些实施例，通过开口38露出粘合层32。应该理解，虽然图2示出了一个开口38，但在介电层34中可以形成多个开口38，每一个都用于放置一个或多个器件管芯。此外，开口38可以分配为阵列。在介电层34由光敏材料形成的实施例中，介电层34可以通过使用图案化光刻掩模(未示出)的曝光进行图案化，接着显影介电层34。根据可选实施例，介电层34的图案化包括在介电层34上方涂覆光刻胶(未示出)，图案化光刻胶，然后将光刻胶用作蚀刻掩模来蚀刻介电层34。
参照图3，例如通过物理气相沉积(PVD)在介电层34上方形成导电晶种层40。在图17所示的工艺流程中将对应步骤示出为步骤206。导电晶种层40可以是金属晶种层，包括铜、铝、钛、它们的合金或它们的多层。根据本发明的一些实施例，导电晶种层40包括诸如钛层(未示出)的第一金属层和位于第一金属层上方的诸如铜层(未示出)的第二金属层。在这些实施例中，导电晶种层40具有延伸到开口38的部分，该部分可以与粘合层32接触。根据本发明的可选实施例，导电晶种层40包括单个金属层(诸如铜层)，其可以由基本纯的铜或铜合金形成。
图4至图7示出了通孔的形成。如图4所示，图案化掩模层42(诸如光刻胶)被涂覆在导电晶种层40上方，然后使用光刻掩模进行图案化。在图17所示的工艺流程中将对应步骤示出为步骤208。根据本发明的一些实施例，光刻胶42是干膜，其被层压在导电晶种层40上。根据可选实施例，通过旋涂形成光刻胶42。作为图案化(曝光和显影)的结果，在光刻胶42中形成开口44，通过该开口露出导电晶种层40的一些部分。通过随后放置的器件管芯48(图8)的厚度来确定光刻胶42的厚度。根据本发明的一些实施例，光刻胶42的厚度大于器件管芯48的厚度。
如图5所示，通过镀(可以是电镀或化学镀)在开口44中形成通孔46。在图17所示的工艺流程中将对应步骤示出为步骤210。在导电晶种层40的暴露部分上镀通孔46。通孔46是导电的，并且可以是包括铜、铝、钨、镍或它们的合金的金属通孔。在俯视图中通孔46的形状包括但不限于矩形、正方形、圆形等。根据本发明的一些实施例，通过随后放置的器件管芯48(图8)的厚度来确定通孔46的高度，其中通孔46的高度稍大于或等于器件管芯48的厚度。
在镀通孔46之后，去除光刻胶42，并且在图6中示出了所得到的结构。在图17所示的工艺流程中将对应步骤示出为步骤212。结果，露出了导电晶种层40先前被光刻胶42覆盖的部分。
接下来，如图7所示，执行蚀刻步骤以去除导电晶种层40的暴露部分，其中蚀刻可以是各向异性蚀刻或各向同性蚀刻。在图17所示的工艺流程中将对应步骤示出为步骤212。另一方面，导电晶种层40与通孔46重叠的部分保持未被蚀刻。在整个说明书中，导电晶种层40的剩余下面的部分被称为通孔46的底部。尽管导电晶种层40被示为具有与通孔46的上覆部分相区别的界面，但是当导电晶种层40由与对应上覆的通孔46相似或相同的材料形成时，导电晶种层40可以与通孔46合并而在它们之间没有可区别的界面。例如，导电晶种层40中的铜层可以与通孔46合并而没有可区别的界面。根据可选实施例，在导电晶种层40与通孔46的对应上覆的镀部分之间存在可区别的界面。例如，导电晶种层40中的钛层可以与含铜通孔46区别开。作为导电晶种层40的蚀刻的结果，露出介电层34。此外，显示开口38，并且通过开口38露出介电层34下方的层(诸如粘合层32)。
图8示出了在粘合层32上方放置器件管芯48。在图17所示的工艺流程中将对应步骤示出为步骤214。器件管芯48可以通过管芯附接膜50粘合至粘合层32。管芯附接膜50的边缘可以与器件管芯48的对应边缘共端面(co-terminus)。管芯附接膜50是粘合膜。尽管图8示出了单个器件管芯48的放置，但也可以在粘合层32上方放置与器件管芯48相同的多个器件管芯，每个器件管芯都被设置为对应于一个开口38。此外，每个开口38都可以设置有单个或一个以上的器件管芯。多个放置的器件管芯48可以配置为包括多行和多列的阵列。器件管芯48可以包括半导体衬底，其具有与管芯附接膜50物理接触的背面(面朝下的表面)。器件管芯48在半导体衬底的正面(面朝上的表面)还包括集成电路器件(诸如有源器件，例如包括晶体管，未示出)。器件管芯48可以包括逻辑管芯，诸如中央处理单元(CPU)管芯、图形处理单元(GPU)管芯、移动应用管芯等。
器件管芯48可以包括位于其顶面处的金属柱54。金属柱54电耦合至器件管芯48内的集成电路。根据本公开的一些示例性实施例，如图8所示，露出金属柱54的顶面。金属柱54可以是铜柱，并且还可以包括其他导电/金属材料，诸如铝、镍等。根据本发明的一些实施例，金属柱54的顶面与介电层55的顶面共面。根据本发明的可选实施例，金属柱54嵌入介电层55中，介电层55的顶面高于金属柱54的顶面。介电层55可以由聚合物形成，其可以包括PBO、聚酰亚胺等。
此外，参照图9，模制材料52被模制在器件管芯48和通孔48上。在图17所示的工艺流程中将对应步骤示出为步骤216。模制材料52被分配为流体，然后例如在热固化工艺中被固化。模制材料52填充器件管芯48和通孔46之间的间隙，并且可以与介电层34接触。模制材料52可以包括模塑料、模制底部填充物、环氧树脂或树脂。在模制工艺之后，模制材料52的顶面高于金属柱54和通孔46的顶端。
接下来，执行诸如化学机械抛光(CMP)步骤或研磨步骤的平坦化步骤以平坦化模制材料52，直到露出通孔46为止。在图17所示的工艺流程中将对应步骤示出为步骤216。在图10中示出了所得到的结构。作为平坦化的结果，还露出了器件管芯48的金属柱54。由于平坦化，通孔46的顶面与金属柱54的顶面基本平齐(共面)，并且与模制材料52的顶面基本平齐(共面)。
参照图11，在模制材料52、通孔46和金属柱54上方形成介电层56和对应再分布线(RDL)58的一层或多层。在图17所示的工艺流程中将对应步骤示出为步骤218。RDL 58被称为前侧RDL，因为它们位于器件管芯48的前侧。根据本发明的一些实施例，介电层56由诸如PBO、聚酰亚胺等的聚合物形成。根据本发明的可选实施例，介电层56由无机介电材料形成，诸如氮化硅、氧化硅、氮氧化硅等。
RDL 58被形成为电耦合至金属柱54和通孔46。RDL 58还可以将金属柱54和通孔46相互互连。RDL 58可以包括金属迹线(金属线)以及位于金属迹线下方且连接至金属迹线的通孔。根据本发明的一些实施例，通过镀工艺形成RDL 58，其中每个RDL 58都包括晶种层(未示出)和位于晶种层上方的镀金属材料。晶种层和镀金属材料可以由相同材料或不同材料形成。
图12示出了根据本发明的一些示例性实施例的电连接件60的形成。电连接件60电耦合至RDL 58、金属柱54和/或通孔46。电连接件60的形成可以包括置于RDL 58上方的焊球，然后回流焊球。根据本发明的可选实施例，电连接件60的形成包括执行镀步骤以在RDL 58上方形成焊料区域然后回流焊料区域。电连接件60还可以包括金属柱或者金属柱和焊料盖，它们也可以通过镀来形成。在整个说明书中，包括器件管芯48、通孔46、模制材料52、RDL 58和介电层56的组合结构将被称为封装件62，其可以是包括多个器件管芯48的组合晶圆。
接下来，执行测试以确定封装件162是否正确工作而没有缺陷。可以通过使用探针卡(未示出)探测电连接件60来执行测试。通过测试，确定封装件162中的缺陷封装件，使得在封装件162被锯切为单独的封装件之后，有缺陷的单独封装件不被用于形成PoP封装件。
图12示出了两个RDL层58。根据可选实施例，根据对应封装件的布线要求，可以具有单层的RDL 58或两层以上的RDL 58。根据本发明的又一可选实施例，没有RDL，并且电连接件60直接形成在通孔46和金属柱54上方，而在连接件60与下方的通孔46和金属柱54之间没有RDL。
接下来，封装件62与载体30分离。根据一些示例性分离工艺，切割带64(图13)附接至封装件62以保护电连接件60，其中切割带64被固定至切割框66。例如，通过在粘合层32(图12)上投射UV光或激光来执行分离。例如，当粘合层32由LTHC形成时，由光或激光所生成的热量使得LTHC被分解，因此载体30与封装件62分离。在图13中示出了所得到的结构。
图14示出了用于在介电层34中形成开口63的图案化。在图17所示的工艺流程中将对应步骤示出为步骤220所示。例如，当介电层34是聚合物层时，其可以使用激光钻孔来图案化以去除与通孔46重叠的部分，使得通过开口63露出通孔46。
在导电晶种层40的一部分由钛形成的实施例中，还可以去除导电晶种层40的钛层。例如，氟化氢(HF)气体或稀释HF溶液可用于蚀刻钛。露出导电晶种层40中的铜，因此可以在其上形成随后形成的背侧RDL或诸如焊料区域的电连接件。
根据本发明的一些实施例，此时不在封装件62的背侧上形成焊料区域。此外，不形成背侧RDL。根据本发明的可选实施例，在器件管芯48的背侧(图14中示出的顶侧)上形成背侧RDL(未示出)和/或电连接件，其中背侧RDL电耦合至通孔46。根据本发明的一些示例性实施例，具有单个背侧RDL层。根据可选实施例，具有多个RDL层，其中通孔被形成为互连多个RDL层中的不同金属迹线。背侧介电层还可以由聚合物(诸如PBO、BCB、聚酰亚胺)或无机材料(诸如氧化硅、氮化硅、氮氧化硅)等形成。可以形成诸如焊料区域、具有焊料盖的金属柱的电连接件。
在后续步骤中，封装件62被锯切成多个封装件162，每一个都包括一个器件管芯48和对应的通孔46。在图17所示的工艺流程中将对应步骤示出为步骤222。在图15A中示出了一个封装件162。
图15A示出了将封装件300接合至封装件162，因此形成PoP封装件20。在图17所示的工艺流程中将对应步骤示出为步骤224。封装件300和162还被分别称为PoP封装件20的顶部封装件和底部封装件。在如图15A所示的示例性实施例中，没有示出背侧RDL，而可以根据可选实施例形成背侧RDL。通过焊料区域70(将通孔46接合至上覆封装件300中的金属焊盘)执行接合。在一些实施例中，封装件300包括器件管芯304，其可以是存储器管芯，诸如静态随机存取存储器(SRAM)管芯、动态随机存取存储器(DRAM)管芯等。在一些示例性实施例中，存储器管芯还可以接合至封装衬底302。
在顶部封装件300接合至底部封装件162之后，在顶部封装件300和底部封装件162之间的间隙中设置底部填充物72，然后被固化。由此，所得到的底部填充物72与管芯附接膜50接触。
如图15A所示，介电层34的顶面与管芯附接膜50的顶面共面。根据本发明的一些实施例，通孔46的顶面的一些部分与介电层34的底面接触。管芯附接膜50和器件管芯48延伸到介电层34中，介电层34的边缘与管芯附接膜50的边缘物理接触。这些实施例可以通过精确地设计开口38(参见图7和图8)的尺寸来实现，使得管芯附接膜50和器件管芯48精确地安装到开口38中，没有额外的空间来将管芯附接膜50和器件管芯48的边缘与介电层34的对应边缘分离。当管芯附接膜50薄于介电层34时，介电层34的边缘还可以与器件管芯48的边缘物理接触。
根据本发明的可选实施例，如图15B所示，开口38(参见图7)的尺寸大于管芯附接膜50和器件管芯48的尺寸。因此，留下一些空间来将管芯附接膜50和器件管芯48的边缘与介电层34的对应边缘分离。如图15B所示，底部填充物72可以与模制材料52延伸到介电层34中的部分物理接触。
图16A和图16B分别示出了图15A和图15B所示PoP封装件20的一些部分的俯视图。参照图16A，介电层34环绕管芯附接膜50和器件管芯48。此外，通孔46和焊料区域70与环绕管芯附接膜50和器件管芯48的环对齐。管芯附接膜50的边缘(以及可能地，器件管芯48的边缘)与介电层34的内边缘接触，其中内边缘面对开口。参照图16B，介电层34再次环绕管芯附接膜50和器件管芯48，其中一些间距将介电层34与管芯附接膜50和器件管芯48分离。模塑料52填充该间距。根据本发明的一些实施例，该间距形成环绕管芯附接膜50和器件管芯48的环。根据本发明的可选实施例，管芯附接膜50的一个边缘或两个边缘可以与介电层34的对应内边缘接触，而管芯附接膜50的其他边缘与介电层34的对应内边缘隔开。
本发明的实施例具有一些有利特征。通过图案化粘合层上方的介电层(聚合物层)，聚合物层其中具有大开口。这在聚合物层中生成不连续性，减小了由聚合物层对所得到的PoP封装件引起的应力。因此可以减小封装件的翘曲。此外，聚合物层是相对软的材料，因此如果器件管芯被放置在聚合物层上，则由于施加于聚合物的不同部分上可能不均匀的压力，所得到的聚合物层的厚度会是不均匀的，并且因此所得到的器件管芯的顶面可以不平行于载体的表面，在随后的工艺中产生工艺困难。然而，在本发明的实施例中，器件管芯不被放置在聚合物层上，因此消除了上述问题。此外，聚合物层中的开口具有限制器件管芯和管芯附接膜的移动的功能，使得不太可能发生管芯偏移。
根据本发明的一些实施例，一种封装件包括器件管芯、其中模制器件管芯的至少一部分的模制材料以及基本穿过模制材料的通孔。封装件还包括接触通孔和模制材料的介电层以及附接至器件管芯的背侧的管芯附接膜。管芯附接膜包括延伸到介电层中的部分。
在封装件中，所述介电层包括开口，所述管芯附接膜延伸到所述开口中。
在封装件中，所述介电层包括暴露给所述开口的边缘，并且所述管芯附接膜包括与所述介电层的边缘接触的边缘。
在封装件中，所述介电层包括暴露给所述开口的边缘，并且所述管芯附接膜包括以间距与所述介电层的边缘分离的边缘，所述模制材料填充所述开口。
该封装件还包括焊料区域，所述焊料区域延伸到所述介电层中以接触所述通孔。
该封装件还包括接合至所述焊料区域的顶部封装件。
在封装件中，所述介电层包括聚合物。
在封装件中，所述介电层还与所述器件管芯中的金属柱接触。
根据本发明的可选实施例，封装件包括其中具有通孔的聚合物层、至少一部分在通孔中的管芯附接膜、背侧附接至管芯附接膜的器件管芯以及模塑料。器件管芯被模制在模塑料中，并且聚合物层接触模塑料。
在封装件中，所述管芯附接膜的表面与所述聚合物层的表面共面。
在封装件中，所述管芯附接膜的边缘与所述器件管芯的对应边缘共端面。
在封装件中，所述器件管芯包括位于前侧的金属柱，并且所述模塑料的表面与所述金属柱的表面共面。
该封装件还包括：通孔，穿透所述模塑料；顶部封装件；焊料区域，将所述顶部封装件接合至所述通孔；以及底部填充物，位于所述聚合物层和所述顶部封装件之间的间隙中，所述底部填充物与所述管芯附接膜物理接触。
在封装件中，所述管芯附接膜包括通过所述模塑料的一部分与所述聚合物层的对应边缘分离的边缘，所述底部填充物与所述模塑料的这一部分接触。
根据本发明的可选实施例，一种方法包括：在载体上方形成聚合物层；图案化聚合物层以形成第一开口；在图案化的聚合物层上方形成通孔；以及放置器件管芯，附接至器件管芯的管芯附接膜的至少一部分位于第一开口。该方法还包括：在模塑料中模制器件管芯和通孔；形成电耦合至器件管芯和通孔的再分布线；从聚合物层去除载体；以及在聚合物层中形成第二开口以露出通孔。
该方法还包括：在所述聚合物层的所述第二开口中形成焊料区域。
该方法还包括分配底部填充物以接触所述管芯附接膜。
在该方法中，所述聚合物层形成在粘合层上，并且所述器件管芯通过所述管芯附接膜附接至所述粘合层。
在该方法中，在所述聚合物层中形成所述第二开口包括层钻孔。
在该方法中，形成所述通孔包括：在图案化所述聚合物层以形成所述第一开口之后，在所述聚合物层上方形成导电晶种层并使所述导电晶种层延伸到所述第一开口中；以及在形成所述通孔之后，去除所述导电晶种层未被所述通孔覆盖的部分，以露出位于所述聚合物层下方的粘合层。
上面论述了多个实施例的特征使得本领域技术人员能够更好地理解本发明的各个方面。本领域技术人员应该理解，他们可以容易地以本公开为基础设计或修改用于执行与本文所述实施例相同的目的和/或实现相同优点的其他工艺和结构。本领域技术人员还应该意识到，这些等效结构不背离本发明的精神和范围，并且可以在不背离本发明的精神和范围的情况下做出各种变化、替换和改变。

Claims (10)

1.一种封装件，包括：
器件管芯；
模制材料，其中模制所述器件管芯的至少一部分；
通孔，穿透所述模制材料；
介电层，接触所述通孔和所述模制材料；以及
管芯附接膜，附接至所述器件管芯的背侧，其中所述管芯附接膜包括延伸到所述介电层中的部分。
2.根据权利要求1所述的封装件，其中，所述介电层包括开口，所述管芯附接膜延伸到所述开口中。
3.根据权利要求2所述的封装件，其中，所述介电层包括暴露给所述开口的边缘，并且所述管芯附接膜包括与所述介电层的边缘接触的边缘。
4.根据权利要求2所述的封装件，其中，所述介电层包括暴露给所述开口的边缘，并且所述管芯附接膜包括以间距与所述介电层的边缘分离的边缘，所述模制材料填充所述开口。
5.根据权利要求1所述的封装件，还包括焊料区域，所述焊料区域延伸到所述介电层中以接触所述通孔。
6.根据权利要求5所述的封装件，还包括接合至所述焊料区域的顶部封装件。
7.根据权利要求1所述的封装件，其中，所述介电层包括聚合物。
8.根据权利要求1所述的封装件，其中，所述介电层还与所述器件管芯中的金属柱接触。
9.一种封装件，包括：
聚合物层，其中具有开口；
管芯附接膜，至少一部分位于所述开口中；
器件管芯，具有附接至所述管芯附接膜的背侧；以及
模塑料，所述器件管芯模制在所述模塑料中，所述聚合物层接触所述模塑料。
10.一种方法，包括：
在载体上方形成聚合物层；
图案化所述聚合物层以形成第一开口；
在图案化的聚合物层上方形成通孔；
放置器件管芯，附接至所述器件管芯的管芯附接膜的至少一部分位于所述第一开口中；
在模塑料中模制所述器件管芯和所述通孔；
形成电耦合至所述器件管芯和所述通孔的再分布线；
从所述聚合物层去除所述载体；以及
在所述聚合物层中形成第二开口以露出所述通孔。
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